VirtRegMap.h 7.2 KB

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  1. #pragma once
  2. #ifdef __GNUC__
  3. #pragma GCC diagnostic push
  4. #pragma GCC diagnostic ignored "-Wunused-parameter"
  5. #endif
  6. //===- llvm/CodeGen/VirtRegMap.h - Virtual Register Map ---------*- C++ -*-===//
  7. //
  8. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  9. // See https://llvm.org/LICENSE.txt for license information.
  10. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  11. //
  12. //===----------------------------------------------------------------------===//
  13. //
  14. // This file implements a virtual register map. This maps virtual registers to
  15. // physical registers and virtual registers to stack slots. It is created and
  16. // updated by a register allocator and then used by a machine code rewriter that
  17. // adds spill code and rewrites virtual into physical register references.
  18. //
  19. //===----------------------------------------------------------------------===//
  20. #ifndef LLVM_CODEGEN_VIRTREGMAP_H
  21. #define LLVM_CODEGEN_VIRTREGMAP_H
  22. #include "llvm/ADT/IndexedMap.h"
  23. #include "llvm/CodeGen/MachineFunctionPass.h"
  24. #include "llvm/CodeGen/TargetRegisterInfo.h"
  25. #include "llvm/CodeGen/TileShapeInfo.h"
  26. #include "llvm/Pass.h"
  27. #include <cassert>
  28. namespace llvm {
  29. class MachineFunction;
  30. class MachineRegisterInfo;
  31. class raw_ostream;
  32. class TargetInstrInfo;
  33. class VirtRegMap : public MachineFunctionPass {
  34. public:
  35. enum {
  36. NO_PHYS_REG = 0,
  37. NO_STACK_SLOT = (1L << 30)-1,
  38. MAX_STACK_SLOT = (1L << 18)-1
  39. };
  40. private:
  41. MachineRegisterInfo *MRI = nullptr;
  42. const TargetInstrInfo *TII = nullptr;
  43. const TargetRegisterInfo *TRI = nullptr;
  44. MachineFunction *MF = nullptr;
  45. /// Virt2PhysMap - This is a virtual to physical register
  46. /// mapping. Each virtual register is required to have an entry in
  47. /// it; even spilled virtual registers (the register mapped to a
  48. /// spilled register is the temporary used to load it from the
  49. /// stack).
  50. IndexedMap<Register, VirtReg2IndexFunctor> Virt2PhysMap;
  51. /// Virt2StackSlotMap - This is virtual register to stack slot
  52. /// mapping. Each spilled virtual register has an entry in it
  53. /// which corresponds to the stack slot this register is spilled
  54. /// at.
  55. IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
  56. /// Virt2SplitMap - This is virtual register to splitted virtual register
  57. /// mapping.
  58. IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
  59. /// Virt2ShapeMap - For X86 AMX register whose register is bound shape
  60. /// information.
  61. DenseMap<unsigned, ShapeT> Virt2ShapeMap;
  62. /// createSpillSlot - Allocate a spill slot for RC from MFI.
  63. unsigned createSpillSlot(const TargetRegisterClass *RC);
  64. public:
  65. static char ID;
  66. VirtRegMap()
  67. : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
  68. Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) {}
  69. VirtRegMap(const VirtRegMap &) = delete;
  70. VirtRegMap &operator=(const VirtRegMap &) = delete;
  71. bool runOnMachineFunction(MachineFunction &MF) override;
  72. void getAnalysisUsage(AnalysisUsage &AU) const override {
  73. AU.setPreservesAll();
  74. MachineFunctionPass::getAnalysisUsage(AU);
  75. }
  76. MachineFunction &getMachineFunction() const {
  77. assert(MF && "getMachineFunction called before runOnMachineFunction");
  78. return *MF;
  79. }
  80. MachineRegisterInfo &getRegInfo() const { return *MRI; }
  81. const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
  82. void grow();
  83. /// returns true if the specified virtual register is
  84. /// mapped to a physical register
  85. bool hasPhys(Register virtReg) const {
  86. return getPhys(virtReg) != NO_PHYS_REG;
  87. }
  88. /// returns the physical register mapped to the specified
  89. /// virtual register
  90. MCRegister getPhys(Register virtReg) const {
  91. assert(virtReg.isVirtual());
  92. return MCRegister::from(Virt2PhysMap[virtReg.id()]);
  93. }
  94. /// creates a mapping for the specified virtual register to
  95. /// the specified physical register
  96. void assignVirt2Phys(Register virtReg, MCPhysReg physReg);
  97. bool isShapeMapEmpty() const { return Virt2ShapeMap.empty(); }
  98. bool hasShape(Register virtReg) const {
  99. return getShape(virtReg).isValid();
  100. }
  101. ShapeT getShape(Register virtReg) const {
  102. assert(virtReg.isVirtual());
  103. return Virt2ShapeMap.lookup(virtReg);
  104. }
  105. void assignVirt2Shape(Register virtReg, ShapeT shape) {
  106. Virt2ShapeMap[virtReg.id()] = shape;
  107. }
  108. /// clears the specified virtual register's, physical
  109. /// register mapping
  110. void clearVirt(Register virtReg) {
  111. assert(virtReg.isVirtual());
  112. assert(Virt2PhysMap[virtReg.id()] != NO_PHYS_REG &&
  113. "attempt to clear a not assigned virtual register");
  114. Virt2PhysMap[virtReg.id()] = NO_PHYS_REG;
  115. }
  116. /// clears all virtual to physical register mappings
  117. void clearAllVirt() {
  118. Virt2PhysMap.clear();
  119. grow();
  120. }
  121. /// returns true if VirtReg is assigned to its preferred physreg.
  122. bool hasPreferredPhys(Register VirtReg) const;
  123. /// returns true if VirtReg has a known preferred register.
  124. /// This returns false if VirtReg has a preference that is a virtual
  125. /// register that hasn't been assigned yet.
  126. bool hasKnownPreference(Register VirtReg) const;
  127. /// records virtReg is a split live interval from SReg.
  128. void setIsSplitFromReg(Register virtReg, Register SReg) {
  129. Virt2SplitMap[virtReg.id()] = SReg;
  130. if (hasShape(SReg)) {
  131. Virt2ShapeMap[virtReg.id()] = getShape(SReg);
  132. }
  133. }
  134. /// returns the live interval virtReg is split from.
  135. Register getPreSplitReg(Register virtReg) const {
  136. return Virt2SplitMap[virtReg.id()];
  137. }
  138. /// getOriginal - Return the original virtual register that VirtReg descends
  139. /// from through splitting.
  140. /// A register that was not created by splitting is its own original.
  141. /// This operation is idempotent.
  142. Register getOriginal(Register VirtReg) const {
  143. Register Orig = getPreSplitReg(VirtReg);
  144. return Orig ? Orig : VirtReg;
  145. }
  146. /// returns true if the specified virtual register is not
  147. /// mapped to a stack slot or rematerialized.
  148. bool isAssignedReg(Register virtReg) const {
  149. if (getStackSlot(virtReg) == NO_STACK_SLOT)
  150. return true;
  151. // Split register can be assigned a physical register as well as a
  152. // stack slot or remat id.
  153. return (Virt2SplitMap[virtReg.id()] &&
  154. Virt2PhysMap[virtReg.id()] != NO_PHYS_REG);
  155. }
  156. /// returns the stack slot mapped to the specified virtual
  157. /// register
  158. int getStackSlot(Register virtReg) const {
  159. assert(virtReg.isVirtual());
  160. return Virt2StackSlotMap[virtReg.id()];
  161. }
  162. /// create a mapping for the specifed virtual register to
  163. /// the next available stack slot
  164. int assignVirt2StackSlot(Register virtReg);
  165. /// create a mapping for the specified virtual register to
  166. /// the specified stack slot
  167. void assignVirt2StackSlot(Register virtReg, int SS);
  168. void print(raw_ostream &OS, const Module* M = nullptr) const override;
  169. void dump() const;
  170. };
  171. inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
  172. VRM.print(OS);
  173. return OS;
  174. }
  175. } // end llvm namespace
  176. #endif // LLVM_CODEGEN_VIRTREGMAP_H
  177. #ifdef __GNUC__
  178. #pragma GCC diagnostic pop
  179. #endif