🎨 Detab C/C++

Marlin/src/HAL/DUE/usb/genclk.h

@@ -74,17 +74,17 @@ extern "C" {
 //@{
 
 enum genclk_source {
-	GENCLK_PCK_SRC_SLCK_RC       = 0, //!< Internal 32kHz RC oscillator as PCK source clock
-	GENCLK_PCK_SRC_SLCK_XTAL     = 1, //!< External 32kHz crystal oscillator as PCK source clock
-	GENCLK_PCK_SRC_SLCK_BYPASS   = 2, //!< External 32kHz bypass oscillator as PCK source clock
-	GENCLK_PCK_SRC_MAINCK_4M_RC  = 3, //!< Internal 4MHz RC oscillator as PCK source clock
-	GENCLK_PCK_SRC_MAINCK_8M_RC  = 4, //!< Internal 8MHz RC oscillator as PCK source clock
-	GENCLK_PCK_SRC_MAINCK_12M_RC = 5, //!< Internal 12MHz RC oscillator as PCK source clock
-	GENCLK_PCK_SRC_MAINCK_XTAL   = 6, //!< External crystal oscillator as PCK source clock
-	GENCLK_PCK_SRC_MAINCK_BYPASS = 7, //!< External bypass oscillator as PCK source clock
-	GENCLK_PCK_SRC_PLLACK        = 8, //!< Use PLLACK as PCK source clock
-	GENCLK_PCK_SRC_PLLBCK        = 9, //!< Use PLLBCK as PCK source clock
-	GENCLK_PCK_SRC_MCK           = 10, //!< Use Master Clk as PCK source clock
+  GENCLK_PCK_SRC_SLCK_RC       = 0, //!< Internal 32kHz RC oscillator as PCK source clock
+  GENCLK_PCK_SRC_SLCK_XTAL     = 1, //!< External 32kHz crystal oscillator as PCK source clock
+  GENCLK_PCK_SRC_SLCK_BYPASS   = 2, //!< External 32kHz bypass oscillator as PCK source clock
+  GENCLK_PCK_SRC_MAINCK_4M_RC  = 3, //!< Internal 4MHz RC oscillator as PCK source clock
+  GENCLK_PCK_SRC_MAINCK_8M_RC  = 4, //!< Internal 8MHz RC oscillator as PCK source clock
+  GENCLK_PCK_SRC_MAINCK_12M_RC = 5, //!< Internal 12MHz RC oscillator as PCK source clock
+  GENCLK_PCK_SRC_MAINCK_XTAL   = 6, //!< External crystal oscillator as PCK source clock
+  GENCLK_PCK_SRC_MAINCK_BYPASS = 7, //!< External bypass oscillator as PCK source clock
+  GENCLK_PCK_SRC_PLLACK        = 8, //!< Use PLLACK as PCK source clock
+  GENCLK_PCK_SRC_PLLBCK        = 9, //!< Use PLLBCK as PCK source clock
+  GENCLK_PCK_SRC_MCK           = 10, //!< Use Master Clk as PCK source clock
 };
 
 //@}
@@ -93,176 +93,162 @@ enum genclk_source {
 //@{
 
 enum genclk_divider {
-	GENCLK_PCK_PRES_1  = PMC_PCK_PRES_CLK_1, //!< Set PCK clock prescaler to 1
-	GENCLK_PCK_PRES_2  = PMC_PCK_PRES_CLK_2, //!< Set PCK clock prescaler to 2
-	GENCLK_PCK_PRES_4  = PMC_PCK_PRES_CLK_4, //!< Set PCK clock prescaler to 4
-	GENCLK_PCK_PRES_8  = PMC_PCK_PRES_CLK_8, //!< Set PCK clock prescaler to 8
-	GENCLK_PCK_PRES_16 = PMC_PCK_PRES_CLK_16, //!< Set PCK clock prescaler to 16
-	GENCLK_PCK_PRES_32 = PMC_PCK_PRES_CLK_32, //!< Set PCK clock prescaler to 32
-	GENCLK_PCK_PRES_64 = PMC_PCK_PRES_CLK_64, //!< Set PCK clock prescaler to 64
+  GENCLK_PCK_PRES_1  = PMC_PCK_PRES_CLK_1, //!< Set PCK clock prescaler to 1
+  GENCLK_PCK_PRES_2  = PMC_PCK_PRES_CLK_2, //!< Set PCK clock prescaler to 2
+  GENCLK_PCK_PRES_4  = PMC_PCK_PRES_CLK_4, //!< Set PCK clock prescaler to 4
+  GENCLK_PCK_PRES_8  = PMC_PCK_PRES_CLK_8, //!< Set PCK clock prescaler to 8
+  GENCLK_PCK_PRES_16 = PMC_PCK_PRES_CLK_16, //!< Set PCK clock prescaler to 16
+  GENCLK_PCK_PRES_32 = PMC_PCK_PRES_CLK_32, //!< Set PCK clock prescaler to 32
+  GENCLK_PCK_PRES_64 = PMC_PCK_PRES_CLK_64, //!< Set PCK clock prescaler to 64
 };
 
 //@}
 
 struct genclk_config {
-	uint32_t ctrl;
+  uint32_t ctrl;
 };
 
-static inline void genclk_config_defaults(struct genclk_config *p_cfg,
-		uint32_t ul_id)
-{
-	ul_id = ul_id;
-	p_cfg->ctrl = 0;
+static inline void genclk_config_defaults(struct genclk_config *p_cfg, uint32_t ul_id) {
+  ul_id = ul_id;
+  p_cfg->ctrl = 0;
 }
 
-static inline void genclk_config_read(struct genclk_config *p_cfg,
-		uint32_t ul_id)
-{
-	p_cfg->ctrl = PMC->PMC_PCK[ul_id];
+static inline void genclk_config_read(struct genclk_config *p_cfg, uint32_t ul_id) {
+  p_cfg->ctrl = PMC->PMC_PCK[ul_id];
 }
 
-static inline void genclk_config_write(const struct genclk_config *p_cfg,
-		uint32_t ul_id)
-{
-	PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
+static inline void genclk_config_write(const struct genclk_config *p_cfg, uint32_t ul_id) {
+  PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
 }
 
 //! \name Programmable Clock Source and Prescaler configuration
 //@{
 
-static inline void genclk_config_set_source(struct genclk_config *p_cfg,
-		enum genclk_source e_src)
-{
-	p_cfg->ctrl &= (~PMC_PCK_CSS_Msk);
-
-	switch (e_src) {
-	case GENCLK_PCK_SRC_SLCK_RC:
-	case GENCLK_PCK_SRC_SLCK_XTAL:
-	case GENCLK_PCK_SRC_SLCK_BYPASS:
-		p_cfg->ctrl |= (PMC_PCK_CSS_SLOW_CLK);
-		break;
-
-	case GENCLK_PCK_SRC_MAINCK_4M_RC:
-	case GENCLK_PCK_SRC_MAINCK_8M_RC:
-	case GENCLK_PCK_SRC_MAINCK_12M_RC:
-	case GENCLK_PCK_SRC_MAINCK_XTAL:
-	case GENCLK_PCK_SRC_MAINCK_BYPASS:
-		p_cfg->ctrl |= (PMC_PCK_CSS_MAIN_CLK);
-		break;
-
-	case GENCLK_PCK_SRC_PLLACK:
-		p_cfg->ctrl |= (PMC_PCK_CSS_PLLA_CLK);
-		break;
-
-	case GENCLK_PCK_SRC_PLLBCK:
-		p_cfg->ctrl |= (PMC_PCK_CSS_UPLL_CLK);
-		break;
-
-	case GENCLK_PCK_SRC_MCK:
-		p_cfg->ctrl |= (PMC_PCK_CSS_MCK);
-		break;
-	}
+static inline void genclk_config_set_source(struct genclk_config *p_cfg, enum genclk_source e_src) {
+  p_cfg->ctrl &= (~PMC_PCK_CSS_Msk);
+
+  switch (e_src) {
+  case GENCLK_PCK_SRC_SLCK_RC:
+  case GENCLK_PCK_SRC_SLCK_XTAL:
+  case GENCLK_PCK_SRC_SLCK_BYPASS:
+    p_cfg->ctrl |= (PMC_PCK_CSS_SLOW_CLK);
+    break;
+
+  case GENCLK_PCK_SRC_MAINCK_4M_RC:
+  case GENCLK_PCK_SRC_MAINCK_8M_RC:
+  case GENCLK_PCK_SRC_MAINCK_12M_RC:
+  case GENCLK_PCK_SRC_MAINCK_XTAL:
+  case GENCLK_PCK_SRC_MAINCK_BYPASS:
+    p_cfg->ctrl |= (PMC_PCK_CSS_MAIN_CLK);
+    break;
+
+  case GENCLK_PCK_SRC_PLLACK:
+    p_cfg->ctrl |= (PMC_PCK_CSS_PLLA_CLK);
+    break;
+
+  case GENCLK_PCK_SRC_PLLBCK:
+    p_cfg->ctrl |= (PMC_PCK_CSS_UPLL_CLK);
+    break;
+
+  case GENCLK_PCK_SRC_MCK:
+    p_cfg->ctrl |= (PMC_PCK_CSS_MCK);
+    break;
+  }
 }
 
-static inline void genclk_config_set_divider(struct genclk_config *p_cfg,
-		uint32_t e_divider)
-{
-	p_cfg->ctrl &= ~PMC_PCK_PRES_Msk;
-	p_cfg->ctrl |= e_divider;
+static inline void genclk_config_set_divider(struct genclk_config *p_cfg, uint32_t e_divider) {
+  p_cfg->ctrl &= ~PMC_PCK_PRES_Msk;
+  p_cfg->ctrl |= e_divider;
 }
 
 //@}
 
-static inline void genclk_enable(const struct genclk_config *p_cfg,
-		uint32_t ul_id)
-{
-	PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
-	pmc_enable_pck(ul_id);
+static inline void genclk_enable(const struct genclk_config *p_cfg, uint32_t ul_id) {
+  PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
+  pmc_enable_pck(ul_id);
 }
 
-static inline void genclk_disable(uint32_t ul_id)
-{
-	pmc_disable_pck(ul_id);
+static inline void genclk_disable(uint32_t ul_id) {
+  pmc_disable_pck(ul_id);
 }
 
-static inline void genclk_enable_source(enum genclk_source e_src)
-{
-	switch (e_src) {
-	case GENCLK_PCK_SRC_SLCK_RC:
-		if (!osc_is_ready(OSC_SLCK_32K_RC)) {
-			osc_enable(OSC_SLCK_32K_RC);
-			osc_wait_ready(OSC_SLCK_32K_RC);
-		}
-		break;
-
-	case GENCLK_PCK_SRC_SLCK_XTAL:
-		if (!osc_is_ready(OSC_SLCK_32K_XTAL)) {
-			osc_enable(OSC_SLCK_32K_XTAL);
-			osc_wait_ready(OSC_SLCK_32K_XTAL);
-		}
-		break;
-
-	case GENCLK_PCK_SRC_SLCK_BYPASS:
-		if (!osc_is_ready(OSC_SLCK_32K_BYPASS)) {
-			osc_enable(OSC_SLCK_32K_BYPASS);
-			osc_wait_ready(OSC_SLCK_32K_BYPASS);
-		}
-		break;
-
-	case GENCLK_PCK_SRC_MAINCK_4M_RC:
-		if (!osc_is_ready(OSC_MAINCK_4M_RC)) {
-			osc_enable(OSC_MAINCK_4M_RC);
-			osc_wait_ready(OSC_MAINCK_4M_RC);
-		}
-		break;
-
-	case GENCLK_PCK_SRC_MAINCK_8M_RC:
-		if (!osc_is_ready(OSC_MAINCK_8M_RC)) {
-			osc_enable(OSC_MAINCK_8M_RC);
-			osc_wait_ready(OSC_MAINCK_8M_RC);
-		}
-		break;
-
-	case GENCLK_PCK_SRC_MAINCK_12M_RC:
-		if (!osc_is_ready(OSC_MAINCK_12M_RC)) {
-			osc_enable(OSC_MAINCK_12M_RC);
-			osc_wait_ready(OSC_MAINCK_12M_RC);
-		}
-		break;
-
-	case GENCLK_PCK_SRC_MAINCK_XTAL:
-		if (!osc_is_ready(OSC_MAINCK_XTAL)) {
-			osc_enable(OSC_MAINCK_XTAL);
-			osc_wait_ready(OSC_MAINCK_XTAL);
-		}
-		break;
-
-	case GENCLK_PCK_SRC_MAINCK_BYPASS:
-		if (!osc_is_ready(OSC_MAINCK_BYPASS)) {
-			osc_enable(OSC_MAINCK_BYPASS);
-			osc_wait_ready(OSC_MAINCK_BYPASS);
-		}
-		break;
-
-#ifdef CONFIG_PLL0_SOURCE
-	case GENCLK_PCK_SRC_PLLACK:
-		pll_enable_config_defaults(0);
-		break;
-#endif
-
-#ifdef CONFIG_PLL1_SOURCE
-	case GENCLK_PCK_SRC_PLLBCK:
-		pll_enable_config_defaults(1);
-		break;
-#endif
-
-	case GENCLK_PCK_SRC_MCK:
-		break;
-
-	default:
-		Assert(false);
-		break;
-	}
+static inline void genclk_enable_source(enum genclk_source e_src) {
+  switch (e_src) {
+  case GENCLK_PCK_SRC_SLCK_RC:
+    if (!osc_is_ready(OSC_SLCK_32K_RC)) {
+      osc_enable(OSC_SLCK_32K_RC);
+      osc_wait_ready(OSC_SLCK_32K_RC);
+    }
+    break;
+
+  case GENCLK_PCK_SRC_SLCK_XTAL:
+    if (!osc_is_ready(OSC_SLCK_32K_XTAL)) {
+      osc_enable(OSC_SLCK_32K_XTAL);
+      osc_wait_ready(OSC_SLCK_32K_XTAL);
+    }
+    break;
+
+  case GENCLK_PCK_SRC_SLCK_BYPASS:
+    if (!osc_is_ready(OSC_SLCK_32K_BYPASS)) {
+      osc_enable(OSC_SLCK_32K_BYPASS);
+      osc_wait_ready(OSC_SLCK_32K_BYPASS);
+    }
+    break;
+
+  case GENCLK_PCK_SRC_MAINCK_4M_RC:
+    if (!osc_is_ready(OSC_MAINCK_4M_RC)) {
+      osc_enable(OSC_MAINCK_4M_RC);
+      osc_wait_ready(OSC_MAINCK_4M_RC);
+    }
+    break;
+
+  case GENCLK_PCK_SRC_MAINCK_8M_RC:
+    if (!osc_is_ready(OSC_MAINCK_8M_RC)) {
+      osc_enable(OSC_MAINCK_8M_RC);
+      osc_wait_ready(OSC_MAINCK_8M_RC);
+    }
+    break;
+
+  case GENCLK_PCK_SRC_MAINCK_12M_RC:
+    if (!osc_is_ready(OSC_MAINCK_12M_RC)) {
+      osc_enable(OSC_MAINCK_12M_RC);
+      osc_wait_ready(OSC_MAINCK_12M_RC);
+    }
+    break;
+
+  case GENCLK_PCK_SRC_MAINCK_XTAL:
+    if (!osc_is_ready(OSC_MAINCK_XTAL)) {
+      osc_enable(OSC_MAINCK_XTAL);
+      osc_wait_ready(OSC_MAINCK_XTAL);
+    }
+    break;
+
+  case GENCLK_PCK_SRC_MAINCK_BYPASS:
+    if (!osc_is_ready(OSC_MAINCK_BYPASS)) {
+      osc_enable(OSC_MAINCK_BYPASS);
+      osc_wait_ready(OSC_MAINCK_BYPASS);
+    }
+    break;
+
+  #ifdef CONFIG_PLL0_SOURCE
+    case GENCLK_PCK_SRC_PLLACK:
+      pll_enable_config_defaults(0);
+      break;
+  #endif
+
+  #ifdef CONFIG_PLL1_SOURCE
+    case GENCLK_PCK_SRC_PLLBCK:
+      pll_enable_config_defaults(1);
+      break;
+  #endif
+
+  case GENCLK_PCK_SRC_MCK:
+    break;
+
+  default:
+    Assert(false);
+    break;
+  }
 }
 
 //! @}

Marlin/src/HAL/DUE/usb/osc.h

@@ -62,28 +62,28 @@ extern "C" {
  * should be defined by the board code, otherwise default value are used.
  */
 #ifndef BOARD_FREQ_SLCK_XTAL
-#  warning The board slow clock xtal frequency has not been defined.
-#  define BOARD_FREQ_SLCK_XTAL      (32768UL)
+  #warning The board slow clock xtal frequency has not been defined.
+  #define BOARD_FREQ_SLCK_XTAL      (32768UL)
 #endif
 
 #ifndef BOARD_FREQ_SLCK_BYPASS
-#  warning The board slow clock bypass frequency has not been defined.
-#  define BOARD_FREQ_SLCK_BYPASS    (32768UL)
+  #warning The board slow clock bypass frequency has not been defined.
+  #define BOARD_FREQ_SLCK_BYPASS    (32768UL)
 #endif
 
 #ifndef BOARD_FREQ_MAINCK_XTAL
-#  warning The board main clock xtal frequency has not been defined.
-#  define BOARD_FREQ_MAINCK_XTAL    (12000000UL)
+  #warning The board main clock xtal frequency has not been defined.
+  #define BOARD_FREQ_MAINCK_XTAL    (12000000UL)
 #endif
 
 #ifndef BOARD_FREQ_MAINCK_BYPASS
-#  warning The board main clock bypass frequency has not been defined.
-#  define BOARD_FREQ_MAINCK_BYPASS  (12000000UL)
+  #warning The board main clock bypass frequency has not been defined.
+  #define BOARD_FREQ_MAINCK_BYPASS  (12000000UL)
 #endif
 
 #ifndef BOARD_OSC_STARTUP_US
-#  warning The board main clock xtal startup time has not been defined.
-#  define BOARD_OSC_STARTUP_US      (15625UL)
+  #warning The board main clock xtal startup time has not been defined.
+  #define BOARD_OSC_STARTUP_US      (15625UL)
 #endif
 
 /**
@@ -115,122 +115,118 @@ extern "C" {
 #define OSC_MAINCK_BYPASS_HZ        BOARD_FREQ_MAINCK_BYPASS        //!< External bypass oscillator.
 //@}
 
-static inline void osc_enable(uint32_t ul_id)
-{
-	switch (ul_id) {
-	case OSC_SLCK_32K_RC:
-		break;
+static inline void osc_enable(uint32_t ul_id) {
+  switch (ul_id) {
+  case OSC_SLCK_32K_RC:
+    break;
 
-	case OSC_SLCK_32K_XTAL:
-		pmc_switch_sclk_to_32kxtal(PMC_OSC_XTAL);
-		break;
+  case OSC_SLCK_32K_XTAL:
+    pmc_switch_sclk_to_32kxtal(PMC_OSC_XTAL);
+    break;
 
-	case OSC_SLCK_32K_BYPASS:
-		pmc_switch_sclk_to_32kxtal(PMC_OSC_BYPASS);
-		break;
+  case OSC_SLCK_32K_BYPASS:
+    pmc_switch_sclk_to_32kxtal(PMC_OSC_BYPASS);
+    break;
 
 
-	case OSC_MAINCK_4M_RC:
-		pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_4_MHz);
-		break;
+  case OSC_MAINCK_4M_RC:
+    pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_4_MHz);
+    break;
 
-	case OSC_MAINCK_8M_RC:
-		pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_8_MHz);
-		break;
+  case OSC_MAINCK_8M_RC:
+    pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_8_MHz);
+    break;
 
-	case OSC_MAINCK_12M_RC:
-		pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_12_MHz);
-		break;
+  case OSC_MAINCK_12M_RC:
+    pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_12_MHz);
+    break;
 
 
-	case OSC_MAINCK_XTAL:
-		pmc_switch_mainck_to_xtal(PMC_OSC_XTAL/*,
-			pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
-				OSC_SLCK_32K_RC_HZ)*/);
-		break;
+  case OSC_MAINCK_XTAL:
+    pmc_switch_mainck_to_xtal(PMC_OSC_XTAL/*,
+      pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
+        OSC_SLCK_32K_RC_HZ)*/);
+    break;
 
-	case OSC_MAINCK_BYPASS:
-		pmc_switch_mainck_to_xtal(PMC_OSC_BYPASS/*,
-			pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
-				OSC_SLCK_32K_RC_HZ)*/);
-		break;
-	}
+  case OSC_MAINCK_BYPASS:
+    pmc_switch_mainck_to_xtal(PMC_OSC_BYPASS/*,
+      pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
+        OSC_SLCK_32K_RC_HZ)*/);
+    break;
+  }
 }
 
-static inline void osc_disable(uint32_t ul_id)
-{
-	switch (ul_id) {
-	case OSC_SLCK_32K_RC:
-	case OSC_SLCK_32K_XTAL:
-	case OSC_SLCK_32K_BYPASS:
-		break;
-
-	case OSC_MAINCK_4M_RC:
-	case OSC_MAINCK_8M_RC:
-	case OSC_MAINCK_12M_RC:
-		pmc_osc_disable_fastrc();
-		break;
-
-	case OSC_MAINCK_XTAL:
-		pmc_osc_disable_xtal(PMC_OSC_XTAL);
-		break;
-
-	case OSC_MAINCK_BYPASS:
-		pmc_osc_disable_xtal(PMC_OSC_BYPASS);
-		break;
-	}
+static inline void osc_disable(uint32_t ul_id) {
+  switch (ul_id) {
+  case OSC_SLCK_32K_RC:
+  case OSC_SLCK_32K_XTAL:
+  case OSC_SLCK_32K_BYPASS:
+    break;
+
+  case OSC_MAINCK_4M_RC:
+  case OSC_MAINCK_8M_RC:
+  case OSC_MAINCK_12M_RC:
+    pmc_osc_disable_fastrc();
+    break;
+
+  case OSC_MAINCK_XTAL:
+    pmc_osc_disable_xtal(PMC_OSC_XTAL);
+    break;
+
+  case OSC_MAINCK_BYPASS:
+    pmc_osc_disable_xtal(PMC_OSC_BYPASS);
+    break;
+  }
 }
 
-static inline bool osc_is_ready(uint32_t ul_id)
-{
-	switch (ul_id) {
-	case OSC_SLCK_32K_RC:
-		return 1;
-
-	case OSC_SLCK_32K_XTAL:
-	case OSC_SLCK_32K_BYPASS:
-		return pmc_osc_is_ready_32kxtal();
-
-	case OSC_MAINCK_4M_RC:
-	case OSC_MAINCK_8M_RC:
-	case OSC_MAINCK_12M_RC:
-	case OSC_MAINCK_XTAL:
-	case OSC_MAINCK_BYPASS:
-		return pmc_osc_is_ready_mainck();
-	}
-
-	return 0;
+static inline bool osc_is_ready(uint32_t ul_id) {
+  switch (ul_id) {
+  case OSC_SLCK_32K_RC:
+    return 1;
+
+  case OSC_SLCK_32K_XTAL:
+  case OSC_SLCK_32K_BYPASS:
+    return pmc_osc_is_ready_32kxtal();
+
+  case OSC_MAINCK_4M_RC:
+  case OSC_MAINCK_8M_RC:
+  case OSC_MAINCK_12M_RC:
+  case OSC_MAINCK_XTAL:
+  case OSC_MAINCK_BYPASS:
+    return pmc_osc_is_ready_mainck();
+  }
+
+  return 0;
 }
 
-static inline uint32_t osc_get_rate(uint32_t ul_id)
-{
-	switch (ul_id) {
-	case OSC_SLCK_32K_RC:
-		return OSC_SLCK_32K_RC_HZ;
+static inline uint32_t osc_get_rate(uint32_t ul_id) {
+  switch (ul_id) {
+  case OSC_SLCK_32K_RC:
+    return OSC_SLCK_32K_RC_HZ;
 
-	case OSC_SLCK_32K_XTAL:
-		return BOARD_FREQ_SLCK_XTAL;
+  case OSC_SLCK_32K_XTAL:
+    return BOARD_FREQ_SLCK_XTAL;
 
-	case OSC_SLCK_32K_BYPASS:
-		return BOARD_FREQ_SLCK_BYPASS;
+  case OSC_SLCK_32K_BYPASS:
+    return BOARD_FREQ_SLCK_BYPASS;
 
-	case OSC_MAINCK_4M_RC:
-		return OSC_MAINCK_4M_RC_HZ;
+  case OSC_MAINCK_4M_RC:
+    return OSC_MAINCK_4M_RC_HZ;
 
-	case OSC_MAINCK_8M_RC:
-		return OSC_MAINCK_8M_RC_HZ;
+  case OSC_MAINCK_8M_RC:
+    return OSC_MAINCK_8M_RC_HZ;
 
-	case OSC_MAINCK_12M_RC:
-		return OSC_MAINCK_12M_RC_HZ;
+  case OSC_MAINCK_12M_RC:
+    return OSC_MAINCK_12M_RC_HZ;
 
-	case OSC_MAINCK_XTAL:
-		return BOARD_FREQ_MAINCK_XTAL;
+  case OSC_MAINCK_XTAL:
+    return BOARD_FREQ_MAINCK_XTAL;
 
-	case OSC_MAINCK_BYPASS:
-		return BOARD_FREQ_MAINCK_BYPASS;
-	}
+  case OSC_MAINCK_BYPASS:
+    return BOARD_FREQ_MAINCK_BYPASS;
+  }
 
-	return 0;
+  return 0;
 }
 
 /**
@@ -241,11 +237,10 @@ static inline uint32_t osc_get_rate(uint32_t ul_id)
  *
  * \param id A number identifying the oscillator to wait for.
  */
-static inline void osc_wait_ready(uint8_t id)
-{
-	while (!osc_is_ready(id)) {
-		/* Do nothing */
-	}
+static inline void osc_wait_ready(uint8_t id) {
+  while (!osc_is_ready(id)) {
+    /* Do nothing */
+  }
 }
 
 //! @}

Marlin/src/HAL/DUE/usb/pll.h

@@ -77,22 +77,22 @@ extern "C" {
 #define PLL_COUNT           0x3FU
 
 enum pll_source {
-	PLL_SRC_MAINCK_4M_RC        = OSC_MAINCK_4M_RC,     //!< Internal 4MHz RC oscillator.
-	PLL_SRC_MAINCK_8M_RC        = OSC_MAINCK_8M_RC,     //!< Internal 8MHz RC oscillator.
-	PLL_SRC_MAINCK_12M_RC       = OSC_MAINCK_12M_RC,    //!< Internal 12MHz RC oscillator.
-	PLL_SRC_MAINCK_XTAL         = OSC_MAINCK_XTAL,      //!< External crystal oscillator.
-	PLL_SRC_MAINCK_BYPASS       = OSC_MAINCK_BYPASS,    //!< External bypass oscillator.
-	PLL_NR_SOURCES,                                     //!< Number of PLL sources.
+  PLL_SRC_MAINCK_4M_RC        = OSC_MAINCK_4M_RC,     //!< Internal 4MHz RC oscillator.
+  PLL_SRC_MAINCK_8M_RC        = OSC_MAINCK_8M_RC,     //!< Internal 8MHz RC oscillator.
+  PLL_SRC_MAINCK_12M_RC       = OSC_MAINCK_12M_RC,    //!< Internal 12MHz RC oscillator.
+  PLL_SRC_MAINCK_XTAL         = OSC_MAINCK_XTAL,      //!< External crystal oscillator.
+  PLL_SRC_MAINCK_BYPASS       = OSC_MAINCK_BYPASS,    //!< External bypass oscillator.
+  PLL_NR_SOURCES,                                     //!< Number of PLL sources.
 };
 
 struct pll_config {
-	uint32_t ctrl;
+  uint32_t ctrl;
 };
 
 #define pll_get_default_rate(pll_id)                                       \
-	((osc_get_rate(CONFIG_PLL##pll_id##_SOURCE)                            \
-			* CONFIG_PLL##pll_id##_MUL)                                    \
-			/ CONFIG_PLL##pll_id##_DIV)
+  ((osc_get_rate(CONFIG_PLL##pll_id##_SOURCE)                            \
+      * CONFIG_PLL##pll_id##_MUL)                                    \
+      / CONFIG_PLL##pll_id##_DIV)
 
 /* Force UTMI PLL parameters (Hardware defined) */
 #ifdef CONFIG_PLL1_SOURCE
@@ -113,145 +113,130 @@ struct pll_config {
  * is hidden in this implementation. Use mul as mul effective value.
  */
 static inline void pll_config_init(struct pll_config *p_cfg,
-		enum pll_source e_src, uint32_t ul_div, uint32_t ul_mul)
-{
-	uint32_t vco_hz;
-
-	Assert(e_src < PLL_NR_SOURCES);
-
-	if (ul_div == 0 && ul_mul == 0) { /* Must only be true for UTMI PLL */
-		p_cfg->ctrl = CKGR_UCKR_UPLLCOUNT(PLL_COUNT);
-	} else { /* PLLA */
-		/* Calculate internal VCO frequency */
-		vco_hz = osc_get_rate(e_src) / ul_div;
-		Assert(vco_hz >= PLL_INPUT_MIN_HZ);
-		Assert(vco_hz <= PLL_INPUT_MAX_HZ);
-
-		vco_hz *= ul_mul;
-		Assert(vco_hz >= PLL_OUTPUT_MIN_HZ);
-		Assert(vco_hz <= PLL_OUTPUT_MAX_HZ);
-
-		/* PMC hardware will automatically make it mul+1 */
-		p_cfg->ctrl = CKGR_PLLAR_MULA(ul_mul - 1) | CKGR_PLLAR_DIVA(ul_div) | CKGR_PLLAR_PLLACOUNT(PLL_COUNT);
-	}
+    enum pll_source e_src, uint32_t ul_div, uint32_t ul_mul) {
+  uint32_t vco_hz;
+
+  Assert(e_src < PLL_NR_SOURCES);
+
+  if (ul_div == 0 && ul_mul == 0) { /* Must only be true for UTMI PLL */
+    p_cfg->ctrl = CKGR_UCKR_UPLLCOUNT(PLL_COUNT);
+  }
+  else { /* PLLA */
+    /* Calculate internal VCO frequency */
+    vco_hz = osc_get_rate(e_src) / ul_div;
+    Assert(vco_hz >= PLL_INPUT_MIN_HZ);
+    Assert(vco_hz <= PLL_INPUT_MAX_HZ);
+
+    vco_hz *= ul_mul;
+    Assert(vco_hz >= PLL_OUTPUT_MIN_HZ);
+    Assert(vco_hz <= PLL_OUTPUT_MAX_HZ);
+
+    /* PMC hardware will automatically make it mul+1 */
+    p_cfg->ctrl = CKGR_PLLAR_MULA(ul_mul - 1) | CKGR_PLLAR_DIVA(ul_div) | CKGR_PLLAR_PLLACOUNT(PLL_COUNT);
+  }
 }
 
-#define pll_config_defaults(cfg, pll_id)                                   \
-	pll_config_init(cfg,                                                   \
-			CONFIG_PLL##pll_id##_SOURCE,                                   \
-			CONFIG_PLL##pll_id##_DIV,                                      \
-			CONFIG_PLL##pll_id##_MUL)
-
-static inline void pll_config_read(struct pll_config *p_cfg, uint32_t ul_pll_id)
-{
-	Assert(ul_pll_id < NR_PLLS);
-
-	if (ul_pll_id == PLLA_ID) {
-		p_cfg->ctrl = PMC->CKGR_PLLAR;
-	} else {
-		p_cfg->ctrl = PMC->CKGR_UCKR;
-	}
+#define pll_config_defaults(cfg, pll_id)  \
+  pll_config_init(cfg,                    \
+      CONFIG_PLL##pll_id##_SOURCE,        \
+      CONFIG_PLL##pll_id##_DIV,           \
+      CONFIG_PLL##pll_id##_MUL)
+
+static inline void pll_config_read(struct pll_config *p_cfg, uint32_t ul_pll_id) {
+  Assert(ul_pll_id < NR_PLLS);
+  p_cfg->ctrl = ul_pll_id == PLLA_ID ? PMC->CKGR_PLLAR : PMC->CKGR_UCKR;
 }
 
-static inline void pll_config_write(const struct pll_config *p_cfg, uint32_t ul_pll_id)
-{
-	Assert(ul_pll_id < NR_PLLS);
+static inline void pll_config_write(const struct pll_config *p_cfg, uint32_t ul_pll_id) {
+  Assert(ul_pll_id < NR_PLLS);
 
-	if (ul_pll_id == PLLA_ID) {
-		pmc_disable_pllack(); // Always stop PLL first!
-		PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
-	} else {
-		PMC->CKGR_UCKR = p_cfg->ctrl;
-	}
+  if (ul_pll_id == PLLA_ID) {
+    pmc_disable_pllack(); // Always stop PLL first!
+    PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
+  }
+  else
+    PMC->CKGR_UCKR = p_cfg->ctrl;
 }
 
-static inline void pll_enable(const struct pll_config *p_cfg, uint32_t ul_pll_id)
-{
-	Assert(ul_pll_id < NR_PLLS);
+static inline void pll_enable(const struct pll_config *p_cfg, uint32_t ul_pll_id) {
+  Assert(ul_pll_id < NR_PLLS);
 
-	if (ul_pll_id == PLLA_ID) {
-		pmc_disable_pllack(); // Always stop PLL first!
-		PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
-	} else {
-		PMC->CKGR_UCKR = p_cfg->ctrl | CKGR_UCKR_UPLLEN;
-	}
+  if (ul_pll_id == PLLA_ID) {
+    pmc_disable_pllack(); // Always stop PLL first!
+    PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
+  }
+  else
+    PMC->CKGR_UCKR = p_cfg->ctrl | CKGR_UCKR_UPLLEN;
 }
 
 /**
  * \note This will only disable the selected PLL, not the underlying oscillator (mainck).
  */
-static inline void pll_disable(uint32_t ul_pll_id)
-{
-	Assert(ul_pll_id < NR_PLLS);
-
-	if (ul_pll_id == PLLA_ID) {
-		pmc_disable_pllack();
-	} else {
-		PMC->CKGR_UCKR &= ~CKGR_UCKR_UPLLEN;
-	}
+static inline void pll_disable(uint32_t ul_pll_id) {
+  Assert(ul_pll_id < NR_PLLS);
+
+  if (ul_pll_id == PLLA_ID)
+    pmc_disable_pllack();
+  else
+    PMC->CKGR_UCKR &= ~CKGR_UCKR_UPLLEN;
 }
 
-static inline uint32_t pll_is_locked(uint32_t ul_pll_id)
-{
-	Assert(ul_pll_id < NR_PLLS);
+static inline uint32_t pll_is_locked(uint32_t ul_pll_id) {
+  Assert(ul_pll_id < NR_PLLS);
 
-	if (ul_pll_id == PLLA_ID) {
-		return pmc_is_locked_pllack();
-	} else {
-		return pmc_is_locked_upll();
-	}
+  if (ul_pll_id == PLLA_ID)
+    return pmc_is_locked_pllack();
+  else
+    return pmc_is_locked_upll();
 }
 
-static inline void pll_enable_source(enum pll_source e_src)
-{
-	switch (e_src) {
-	case PLL_SRC_MAINCK_4M_RC:
-	case PLL_SRC_MAINCK_8M_RC:
-	case PLL_SRC_MAINCK_12M_RC:
-	case PLL_SRC_MAINCK_XTAL:
-	case PLL_SRC_MAINCK_BYPASS:
-		osc_enable(e_src);
-		osc_wait_ready(e_src);
-		break;
-
-	default:
-		Assert(false);
-		break;
-	}
+static inline void pll_enable_source(enum pll_source e_src) {
+  switch (e_src) {
+  case PLL_SRC_MAINCK_4M_RC:
+  case PLL_SRC_MAINCK_8M_RC:
+  case PLL_SRC_MAINCK_12M_RC:
+  case PLL_SRC_MAINCK_XTAL:
+  case PLL_SRC_MAINCK_BYPASS:
+    osc_enable(e_src);
+    osc_wait_ready(e_src);
+    break;
+
+  default:
+    Assert(false);
+    break;
+  }
 }
 
-static inline void pll_enable_config_defaults(unsigned int ul_pll_id)
-{
-	struct pll_config pllcfg;
-
-	if (pll_is_locked(ul_pll_id)) {
-		return; // Pll already running
-	}
-	switch (ul_pll_id) {
-#ifdef CONFIG_PLL0_SOURCE
-	case 0:
-		pll_enable_source(CONFIG_PLL0_SOURCE);
-		pll_config_init(&pllcfg,
-				CONFIG_PLL0_SOURCE,
-				CONFIG_PLL0_DIV,
-				CONFIG_PLL0_MUL);
-		break;
-#endif
-#ifdef CONFIG_PLL1_SOURCE
-	case 1:
-		pll_enable_source(CONFIG_PLL1_SOURCE);
-		pll_config_init(&pllcfg,
-				CONFIG_PLL1_SOURCE,
-				CONFIG_PLL1_DIV,
-				CONFIG_PLL1_MUL);
-		break;
-#endif
-	default:
-		Assert(false);
-		break;
-	}
-	pll_enable(&pllcfg, ul_pll_id);
-	while (!pll_is_locked(ul_pll_id));
+static inline void pll_enable_config_defaults(unsigned int ul_pll_id) {
+  struct pll_config pllcfg;
+
+  if (pll_is_locked(ul_pll_id)) return; // Pll already running
+
+  switch (ul_pll_id) {
+    #ifdef CONFIG_PLL0_SOURCE
+      case 0:
+        pll_enable_source(CONFIG_PLL0_SOURCE);
+        pll_config_init(&pllcfg,
+            CONFIG_PLL0_SOURCE,
+            CONFIG_PLL0_DIV,
+            CONFIG_PLL0_MUL);
+        break;
+    #endif
+    #ifdef CONFIG_PLL1_SOURCE
+      case 1:
+        pll_enable_source(CONFIG_PLL1_SOURCE);
+        pll_config_init(&pllcfg,
+            CONFIG_PLL1_SOURCE,
+            CONFIG_PLL1_DIV,
+            CONFIG_PLL1_MUL);
+        break;
+    #endif
+    default:
+      Assert(false);
+      break;
+  }
+  pll_enable(&pllcfg, ul_pll_id);
+  while (!pll_is_locked(ul_pll_id));
 }
 
 /**
@@ -264,15 +249,12 @@ static inline void pll_enable_config_defaults(unsigned int ul_pll_id)
  * \retval STATUS_OK The PLL is now locked.
  * \retval ERR_TIMEOUT Timed out waiting for PLL to become locked.
  */
-static inline int pll_wait_for_lock(unsigned int pll_id)
-{
-	Assert(pll_id < NR_PLLS);
+static inline int pll_wait_for_lock(unsigned int pll_id) {
+  Assert(pll_id < NR_PLLS);
 
-	while (!pll_is_locked(pll_id)) {
-		/* Do nothing */
-	}
+  while (!pll_is_locked(pll_id)) { /* Do nothing */ }
 
-	return 0;
+  return 0;
 }
 
 //! @}

Marlin/src/HAL/DUE/usb/sbc_protocol.h

@@ -57,7 +57,6 @@
 #ifndef _SBC_PROTOCOL_H_
 #define _SBC_PROTOCOL_H_
 
-
 /**
  * \ingroup usb_msc_protocol
  * \defgroup usb_sbc_protocol SCSI Block Commands protocol definitions
@@ -81,82 +80,82 @@
 //@{
 
 enum scsi_sbc_mode {
-	SCSI_MS_MODE_RW_ERR_RECOV = 0x01,	//!< Read-Write Error Recovery mode page
-	SCSI_MS_MODE_FORMAT_DEVICE = 0x03,	//!< Format Device mode page
-	SCSI_MS_MODE_FLEXIBLE_DISK = 0x05,	//!< Flexible Disk mode page
-	SCSI_MS_MODE_CACHING = 0x08,	//!< Caching mode page
+  SCSI_MS_MODE_RW_ERR_RECOV = 0x01,   //!< Read-Write Error Recovery mode page
+  SCSI_MS_MODE_FORMAT_DEVICE = 0x03,  //!< Format Device mode page
+  SCSI_MS_MODE_FLEXIBLE_DISK = 0x05,  //!< Flexible Disk mode page
+  SCSI_MS_MODE_CACHING = 0x08,    //!< Caching mode page
 };
 
 
 //! \name SBC-2 Device-Specific Parameter
 //@{
-#define SCSI_MS_SBC_WP              0x80	//!< Write Protected
-#define SCSI_MS_SBC_DPOFUA          0x10	//!< DPO and FUA supported
+#define SCSI_MS_SBC_WP              0x80    //!< Write Protected
+#define SCSI_MS_SBC_DPOFUA          0x10    //!< DPO and FUA supported
 //@}
 
 /**
  * \brief SBC-2 Short LBA mode parameter block descriptor
  */
 struct sbc_slba_block_desc {
-	be32_t nr_blocks;	//!< Number of Blocks
-	be32_t block_len;	//!< Block Length
-#define SBC_SLBA_BLOCK_LEN_MASK   0x00FFFFFFU	//!< Mask reserved bits
+  be32_t nr_blocks;   //!< Number of Blocks
+  be32_t block_len;   //!< Block Length
+#define SBC_SLBA_BLOCK_LEN_MASK   0x00FFFFFFU   //!< Mask reserved bits
 };
 
 /**
  * \brief SBC-2 Caching mode page
  */
 struct sbc_caching_mode_page {
-	uint8_t page_code;
-	uint8_t page_length;
-	uint8_t flags2;
-#define  SBC_MP_CACHE_IC      (1 << 7)	//!< Initiator Control
-#define  SBC_MP_CACHE_ABPF    (1 << 6)	//!< Abort Pre-Fetch
-#define  SBC_MP_CACHE_CAP     (1 << 5)	//!< Catching Analysis Permitted
-#define  SBC_MP_CACHE_DISC    (1 << 4)	//!< Discontinuity
-#define  SBC_MP_CACHE_SIZE    (1 << 3)	//!< Size enable
-#define  SBC_MP_CACHE_WCE     (1 << 2)	//!< Write back Cache Enable
-#define  SBC_MP_CACHE_MF      (1 << 1)	//!< Multiplication Factor
-#define  SBC_MP_CACHE_RCD     (1 << 0)	//!< Read Cache Disable
-	uint8_t retention;
-	be16_t dis_pf_transfer_len;
-	be16_t min_prefetch;
-	be16_t max_prefetch;
-	be16_t max_prefetch_ceil;
-	uint8_t flags12;
-#define  SBC_MP_CACHE_FSW     (1 << 7)	//!< Force Sequential Write
-#define  SBC_MP_CACHE_LBCSS   (1 << 6)	//!< Logical Blk Cache Seg Sz
-#define  SBC_MP_CACHE_DRA     (1 << 5)	//!< Disable Read-Ahead
-#define  SBC_MP_CACHE_NV_DIS  (1 << 0)	//!< Non-Volatile Cache Disable
-	uint8_t nr_cache_segments;
-	be16_t cache_segment_size;
-	uint8_t reserved[4];
+  uint8_t page_code;
+  uint8_t page_length;
+  uint8_t flags2;
+#define  SBC_MP_CACHE_IC      (1 << 7)  //!< Initiator Control
+#define  SBC_MP_CACHE_ABPF    (1 << 6)  //!< Abort Pre-Fetch
+#define  SBC_MP_CACHE_CAP     (1 << 5)  //!< Catching Analysis Permitted
+#define  SBC_MP_CACHE_DISC    (1 << 4)  //!< Discontinuity
+#define  SBC_MP_CACHE_SIZE    (1 << 3)  //!< Size enable
+#define  SBC_MP_CACHE_WCE     (1 << 2)  //!< Write back Cache Enable
+#define  SBC_MP_CACHE_MF      (1 << 1)  //!< Multiplication Factor
+#define  SBC_MP_CACHE_RCD     (1 << 0)  //!< Read Cache Disable
+  uint8_t retention;
+  be16_t dis_pf_transfer_len;
+  be16_t min_prefetch;
+  be16_t max_prefetch;
+  be16_t max_prefetch_ceil;
+  uint8_t flags12;
+#define  SBC_MP_CACHE_FSW     (1 << 7)  //!< Force Sequential Write
+#define  SBC_MP_CACHE_LBCSS   (1 << 6)  //!< Logical Blk Cache Seg Sz
+#define  SBC_MP_CACHE_DRA     (1 << 5)  //!< Disable Read-Ahead
+#define  SBC_MP_CACHE_NV_DIS  (1 << 0)  //!< Non-Volatile Cache Disable
+  uint8_t nr_cache_segments;
+  be16_t cache_segment_size;
+  uint8_t reserved[4];
 };
 
 /**
  * \brief SBC-2 Read-Write Error Recovery mode page
  */
 struct sbc_rdwr_error_recovery_mode_page {
-	uint8_t page_code;
-	uint8_t page_length;
-#define  SPC_MP_RW_ERR_RECOV_PAGE_LENGTH    0x0A
-	uint8_t flags1;
-#define  SBC_MP_RW_ERR_RECOV_AWRE   (1 << 7)
-#define  SBC_MP_RW_ERR_RECOV_ARRE   (1 << 6)
-#define  SBC_MP_RW_ERR_RECOV_TB     (1 << 5)
-#define  SBC_MP_RW_ERR_RECOV_RC     (1 << 4)
-#define  SBC_MP_RW_ERR_RECOV_ERR    (1 << 3)
-#define  SBC_MP_RW_ERR_RECOV_PER    (1 << 2)
-#define  SBC_MP_RW_ERR_RECOV_DTE    (1 << 1)
-#define  SBC_MP_RW_ERR_RECOV_DCR    (1 << 0)
-	uint8_t read_retry_count;
-	uint8_t correction_span;
-	uint8_t head_offset_count;
-	uint8_t data_strobe_offset_count;
-	uint8_t flags2;
-	uint8_t write_retry_count;
-	uint8_t flags3;
-	be16_t recovery_time_limit;
+  uint8_t page_code;
+  uint8_t page_length;
+  #define  SPC_MP_RW_ERR_RECOV_PAGE_LENGTH    0x0A
+  uint8_t flags1;
+  #define  SBC_MP_RW_ERR_RECOV_AWRE   (1 << 7)
+  #define  SBC_MP_RW_ERR_RECOV_ARRE   (1 << 6)
+  #define  SBC_MP_RW_ERR_RECOV_TB     (1 << 5)
+  #define  SBC_MP_RW_ERR_RECOV_RC     (1 << 4)
+  #define  SBC_MP_RW_ERR_RECOV_ERR    (1 << 3)
+  #define  SBC_MP_RW_ERR_RECOV_PER    (1 << 2)
+  #define  SBC_MP_RW_ERR_RECOV_DTE    (1 << 1)
+  #define  SBC_MP_RW_ERR_RECOV_DCR    (1 << 0)
+  uint8_t read_retry_count;
+  uint8_t correction_span;
+  uint8_t head_offset_count;
+  uint8_t data_strobe_offset_count;
+  uint8_t flags2;
+  uint8_t write_retry_count;
+  uint8_t flags3;
+  be16_t recovery_time_limit;
 };
 //@}
 
@@ -164,8 +163,8 @@ struct sbc_rdwr_error_recovery_mode_page {
  * \brief SBC-2 READ CAPACITY (10) parameter data
  */
 struct sbc_read_capacity10_data {
-	be32_t max_lba;	//!< LBA of last logical block
-	be32_t block_len;	//!< Number of bytes in the last logical block
+  be32_t max_lba; //!< LBA of last logical block
+  be32_t block_len;   //!< Number of bytes in the last logical block
 };
 
 //@}

Marlin/src/HAL/DUE/usb/spc_protocol.h

@@ -59,23 +59,23 @@
 
 //! \name SCSI commands defined by SPC-2
 //@{
-#define  SPC_TEST_UNIT_READY              0x00
-#define  SPC_REQUEST_SENSE                0x03
-#define  SPC_INQUIRY                      0x12
-#define  SPC_MODE_SELECT6                 0x15
-#define  SPC_MODE_SENSE6                  0x1A
-#define  SPC_SEND_DIAGNOSTIC              0x1D
-#define  SPC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E
-#define  SPC_MODE_SENSE10                 0x5A
-#define  SPC_REPORT_LUNS                  0xA0
+#define SPC_TEST_UNIT_READY              0x00
+#define SPC_REQUEST_SENSE                0x03
+#define SPC_INQUIRY                      0x12
+#define SPC_MODE_SELECT6                 0x15
+#define SPC_MODE_SENSE6                  0x1A
+#define SPC_SEND_DIAGNOSTIC              0x1D
+#define SPC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E
+#define SPC_MODE_SENSE10                 0x5A
+#define SPC_REPORT_LUNS                  0xA0
 //@}
 
 //! \brief May be set in byte 0 of the INQUIRY CDB
 //@{
 //! Enable Vital Product Data
-#define  SCSI_INQ_REQ_EVPD    0x01
+#define SCSI_INQ_REQ_EVPD    0x01
 //! Command Support Data specified by the PAGE OR OPERATION CODE field
-#define  SCSI_INQ_REQ_CMDT    0x02
+#define SCSI_INQ_REQ_CMDT    0x02
 //@}
 
 COMPILER_PACK_SET(1)
@@ -84,110 +84,110 @@ COMPILER_PACK_SET(1)
  * \brief SCSI Standard Inquiry data structure
  */
 struct scsi_inquiry_data {
-	uint8_t pq_pdt; //!< Peripheral Qual / Peripheral Dev Type
-#define  SCSI_INQ_PQ_CONNECTED   0x00   //!< Peripheral connected
-#define  SCSI_INQ_PQ_NOT_CONN    0x20   //!< Peripheral not connected
-#define  SCSI_INQ_PQ_NOT_SUPP    0x60   //!< Peripheral not supported
-#define  SCSI_INQ_DT_DIR_ACCESS  0x00   //!< Direct Access (SBC)
-#define  SCSI_INQ_DT_SEQ_ACCESS  0x01   //!< Sequential Access
-#define  SCSI_INQ_DT_PRINTER     0x02   //!< Printer
-#define  SCSI_INQ_DT_PROCESSOR   0x03   //!< Processor device
-#define  SCSI_INQ_DT_WRITE_ONCE  0x04   //!< Write-once device
-#define  SCSI_INQ_DT_CD_DVD      0x05   //!< CD/DVD device
-#define  SCSI_INQ_DT_OPTICAL     0x07   //!< Optical Memory
-#define  SCSI_INQ_DT_MC          0x08   //!< Medium Changer
-#define  SCSI_INQ_DT_ARRAY       0x0C   //!< Storage Array Controller
-#define  SCSI_INQ_DT_ENCLOSURE   0x0D   //!< Enclosure Services
-#define  SCSI_INQ_DT_RBC         0x0E   //!< Simplified Direct Access
-#define  SCSI_INQ_DT_OCRW        0x0F   //!< Optical card reader/writer
-#define  SCSI_INQ_DT_BCC         0x10   //!< Bridge Controller Commands
-#define  SCSI_INQ_DT_OSD         0x11   //!< Object-based Storage
-#define  SCSI_INQ_DT_NONE        0x1F   //!< No Peripheral
-	uint8_t flags1; //!< Flags (byte 1)
-#define  SCSI_INQ_RMB            0x80   //!< Removable Medium
-	uint8_t version; //!< Version
-#define  SCSI_INQ_VER_NONE       0x00   //!< No standards conformance
-#define  SCSI_INQ_VER_SPC        0x03   //!< SCSI Primary Commands     (link to SBC)
-#define  SCSI_INQ_VER_SPC2       0x04   //!< SCSI Primary Commands - 2 (link to SBC-2)
-#define  SCSI_INQ_VER_SPC3       0x05   //!< SCSI Primary Commands - 3 (link to SBC-2)
-#define  SCSI_INQ_VER_SPC4       0x06   //!< SCSI Primary Commands - 4 (link to SBC-3)
-	uint8_t flags3; //!< Flags (byte 3)
-#define  SCSI_INQ_NORMACA        0x20   //!< Normal ACA Supported
-#define  SCSI_INQ_HISUP          0x10   //!< Hierarchal LUN addressing
-#define  SCSI_INQ_RSP_SPC2       0x02   //!< SPC-2 / SPC-3 response format
-	uint8_t addl_len; //!< Additional Length (n-4)
-#define  SCSI_INQ_ADDL_LEN(tot)  ((tot)-5) //!< Total length is \a tot
-	uint8_t flags5; //!< Flags (byte 5)
-#define  SCSI_INQ_SCCS           0x80
-	uint8_t flags6; //!< Flags (byte 6)
-#define  SCSI_INQ_BQUE           0x80
-#define  SCSI_INQ_ENCSERV        0x40
-#define  SCSI_INQ_MULTIP         0x10
-#define  SCSI_INQ_MCHGR          0x08
-#define  SCSI_INQ_ADDR16         0x01
-	uint8_t flags7; //!< Flags (byte 7)
-#define  SCSI_INQ_WBUS16         0x20
-#define  SCSI_INQ_SYNC           0x10
-#define  SCSI_INQ_LINKED         0x08
-#define  SCSI_INQ_CMDQUE         0x02
-	uint8_t vendor_id[8];   //!< T10 Vendor Identification
-	uint8_t product_id[16]; //!< Product Identification
-	uint8_t product_rev[4]; //!< Product Revision Level
+  uint8_t pq_pdt; //!< Peripheral Qual / Peripheral Dev Type
+  #define SCSI_INQ_PQ_CONNECTED     0x00   //!< Peripheral connected
+  #define SCSI_INQ_PQ_NOT_CONN      0x20   //!< Peripheral not connected
+  #define SCSI_INQ_PQ_NOT_SUPP      0x60   //!< Peripheral not supported
+  #define SCSI_INQ_DT_DIR_ACCESS    0x00   //!< Direct Access (SBC)
+  #define SCSI_INQ_DT_SEQ_ACCESS    0x01   //!< Sequential Access
+  #define SCSI_INQ_DT_PRINTER       0x02   //!< Printer
+  #define SCSI_INQ_DT_PROCESSOR     0x03   //!< Processor device
+  #define SCSI_INQ_DT_WRITE_ONCE    0x04   //!< Write-once device
+  #define SCSI_INQ_DT_CD_DVD        0x05   //!< CD/DVD device
+  #define SCSI_INQ_DT_OPTICAL       0x07   //!< Optical Memory
+  #define SCSI_INQ_DT_MC            0x08   //!< Medium Changer
+  #define SCSI_INQ_DT_ARRAY         0x0C   //!< Storage Array Controller
+  #define SCSI_INQ_DT_ENCLOSURE     0x0D   //!< Enclosure Services
+  #define SCSI_INQ_DT_RBC           0x0E   //!< Simplified Direct Access
+  #define SCSI_INQ_DT_OCRW          0x0F   //!< Optical card reader/writer
+  #define SCSI_INQ_DT_BCC           0x10   //!< Bridge Controller Commands
+  #define SCSI_INQ_DT_OSD           0x11   //!< Object-based Storage
+  #define SCSI_INQ_DT_NONE          0x1F   //!< No Peripheral
+  uint8_t flags1; //!< Flags (byte 1)
+  #define SCSI_INQ_RMB              0x80   //!< Removable Medium
+  uint8_t version; //!< Version
+  #define SCSI_INQ_VER_NONE         0x00   //!< No standards conformance
+  #define SCSI_INQ_VER_SPC          0x03   //!< SCSI Primary Commands     (link to SBC)
+  #define SCSI_INQ_VER_SPC2         0x04   //!< SCSI Primary Commands - 2 (link to SBC-2)
+  #define SCSI_INQ_VER_SPC3         0x05   //!< SCSI Primary Commands - 3 (link to SBC-2)
+  #define SCSI_INQ_VER_SPC4         0x06   //!< SCSI Primary Commands - 4 (link to SBC-3)
+  uint8_t flags3; //!< Flags (byte 3)
+  #define SCSI_INQ_NORMACA          0x20   //!< Normal ACA Supported
+  #define SCSI_INQ_HISUP            0x10   //!< Hierarchal LUN addressing
+  #define SCSI_INQ_RSP_SPC2         0x02   //!< SPC-2 / SPC-3 response format
+  uint8_t addl_len; //!< Additional Length (n-4)
+  #define SCSI_INQ_ADDL_LEN(tot)  ((tot)-5) //!< Total length is \a tot
+  uint8_t flags5; //!< Flags (byte 5)
+  #define SCSI_INQ_SCCS             0x80
+  uint8_t flags6; //!< Flags (byte 6)
+  #define SCSI_INQ_BQUE             0x80
+  #define SCSI_INQ_ENCSERV          0x40
+  #define SCSI_INQ_MULTIP           0x10
+  #define SCSI_INQ_MCHGR            0x08
+  #define SCSI_INQ_ADDR16           0x01
+  uint8_t flags7; //!< Flags (byte 7)
+  #define SCSI_INQ_WBUS16           0x20
+  #define SCSI_INQ_SYNC             0x10
+  #define SCSI_INQ_LINKED           0x08
+  #define SCSI_INQ_CMDQUE           0x02
+  uint8_t vendor_id[8];   //!< T10 Vendor Identification
+  uint8_t product_id[16]; //!< Product Identification
+  uint8_t product_rev[4]; //!< Product Revision Level
 };
 
 /**
  * \brief SCSI Standard Request sense data structure
  */
 struct scsi_request_sense_data {
-	/* 1st byte: REQUEST SENSE response flags*/
-	uint8_t valid_reponse_code;
-#define  SCSI_SENSE_VALID              0x80 //!< Indicates the INFORMATION field contains valid information
-#define  SCSI_SENSE_RESPONSE_CODE_MASK 0x7F
-#define  SCSI_SENSE_CURRENT            0x70 //!< Response code 70h (current errors)
-#define  SCSI_SENSE_DEFERRED           0x71
-
-	/* 2nd byte */
-	uint8_t obsolete;
-
-	/* 3rd byte */
-	uint8_t sense_flag_key;
-#define  SCSI_SENSE_FILEMARK        0x80 //!< Indicates that the current command has read a filemark or setmark.
-#define  SCSI_SENSE_EOM             0x40 //!< Indicates that an end-of-medium condition exists.
-#define  SCSI_SENSE_ILI             0x20 //!< Indicates that the requested logical block length did not match the logical block length of the data on the medium.
-#define  SCSI_SENSE_RESERVED        0x10 //!< Reserved
-#define  SCSI_SENSE_KEY(x)          (x&0x0F) //!< Sense Key
-
-	/* 4th to 7th bytes - INFORMATION field */
-	uint8_t information[4];
-
-	/* 8th byte  - ADDITIONAL SENSE LENGTH field */
-	uint8_t AddSenseLen;
-#define  SCSI_SENSE_ADDL_LEN(total_len)   ((total_len) - 8)
-
-	/* 9th to 12th byte  - COMMAND-SPECIFIC INFORMATION field */
-	uint8_t CmdSpecINFO[4];
-
-	/* 13th byte  - ADDITIONAL SENSE CODE field */
-	uint8_t AddSenseCode;
-
-	/* 14th byte  - ADDITIONAL SENSE CODE QUALIFIER field */
-	uint8_t AddSnsCodeQlfr;
-
-	/* 15th byte  - FIELD REPLACEABLE UNIT CODE field */
-	uint8_t FldReplUnitCode;
-
-	/* 16th byte */
-	uint8_t SenseKeySpec[3];
-#define  SCSI_SENSE_SKSV            0x80 //!< Indicates the SENSE-KEY SPECIFIC field contains valid information
+  /* 1st byte: REQUEST SENSE response flags*/
+  uint8_t valid_reponse_code;
+  #define SCSI_SENSE_VALID              0x80 //!< Indicates the INFORMATION field contains valid information
+  #define SCSI_SENSE_RESPONSE_CODE_MASK 0x7F
+  #define SCSI_SENSE_CURRENT            0x70 //!< Response code 70h (current errors)
+  #define SCSI_SENSE_DEFERRED           0x71
+
+  /* 2nd byte */
+  uint8_t obsolete;
+
+  /* 3rd byte */
+  uint8_t sense_flag_key;
+  #define SCSI_SENSE_FILEMARK        0x80 //!< Indicates that the current command has read a filemark or setmark.
+  #define SCSI_SENSE_EOM             0x40 //!< Indicates that an end-of-medium condition exists.
+  #define SCSI_SENSE_ILI             0x20 //!< Indicates that the requested logical block length did not match the logical block length of the data on the medium.
+  #define SCSI_SENSE_RESERVED        0x10 //!< Reserved
+  #define SCSI_SENSE_KEY(x)          (x&0x0F) //!< Sense Key
+
+  /* 4th to 7th bytes - INFORMATION field */
+  uint8_t information[4];
+
+  /* 8th byte  - ADDITIONAL SENSE LENGTH field */
+  uint8_t AddSenseLen;
+  #define SCSI_SENSE_ADDL_LEN(total_len)   ((total_len) - 8)
+
+  /* 9th to 12th byte  - COMMAND-SPECIFIC INFORMATION field */
+  uint8_t CmdSpecINFO[4];
+
+  /* 13th byte  - ADDITIONAL SENSE CODE field */
+  uint8_t AddSenseCode;
+
+  /* 14th byte  - ADDITIONAL SENSE CODE QUALIFIER field */
+  uint8_t AddSnsCodeQlfr;
+
+  /* 15th byte  - FIELD REPLACEABLE UNIT CODE field */
+  uint8_t FldReplUnitCode;
+
+  /* 16th byte */
+  uint8_t SenseKeySpec[3];
+  #define SCSI_SENSE_SKSV            0x80 //!< Indicates the SENSE-KEY SPECIFIC field contains valid information
 };
 
 COMPILER_PACK_RESET()
 
 /* Vital Product Data page codes */
 enum scsi_vpd_page_code {
-	SCSI_VPD_SUPPORTED_PAGES = 0x00,
-	SCSI_VPD_UNIT_SERIAL_NUMBER = 0x80,
-	SCSI_VPD_DEVICE_IDENTIFICATION = 0x83,
+  SCSI_VPD_SUPPORTED_PAGES = 0x00,
+  SCSI_VPD_UNIT_SERIAL_NUMBER = 0x80,
+  SCSI_VPD_DEVICE_IDENTIFICATION = 0x83,
 };
 #define  SCSI_VPD_HEADER_SIZE       4
 
@@ -200,37 +200,36 @@ enum scsi_vpd_page_code {
 
 #define  SCSI_VPD_ID_TYPE_T10       1
 
-
 /* Sense keys */
 enum scsi_sense_key {
-	SCSI_SK_NO_SENSE = 0x0,
-	SCSI_SK_RECOVERED_ERROR = 0x1,
-	SCSI_SK_NOT_READY = 0x2,
-	SCSI_SK_MEDIUM_ERROR = 0x3,
-	SCSI_SK_HARDWARE_ERROR = 0x4,
-	SCSI_SK_ILLEGAL_REQUEST = 0x5,
-	SCSI_SK_UNIT_ATTENTION = 0x6,
-	SCSI_SK_DATA_PROTECT = 0x7,
-	SCSI_SK_BLANK_CHECK = 0x8,
-	SCSI_SK_VENDOR_SPECIFIC = 0x9,
-	SCSI_SK_COPY_ABORTED = 0xA,
-	SCSI_SK_ABORTED_COMMAND = 0xB,
-	SCSI_SK_VOLUME_OVERFLOW = 0xD,
-	SCSI_SK_MISCOMPARE = 0xE,
+  SCSI_SK_NO_SENSE = 0x0,
+  SCSI_SK_RECOVERED_ERROR = 0x1,
+  SCSI_SK_NOT_READY = 0x2,
+  SCSI_SK_MEDIUM_ERROR = 0x3,
+  SCSI_SK_HARDWARE_ERROR = 0x4,
+  SCSI_SK_ILLEGAL_REQUEST = 0x5,
+  SCSI_SK_UNIT_ATTENTION = 0x6,
+  SCSI_SK_DATA_PROTECT = 0x7,
+  SCSI_SK_BLANK_CHECK = 0x8,
+  SCSI_SK_VENDOR_SPECIFIC = 0x9,
+  SCSI_SK_COPY_ABORTED = 0xA,
+  SCSI_SK_ABORTED_COMMAND = 0xB,
+  SCSI_SK_VOLUME_OVERFLOW = 0xD,
+  SCSI_SK_MISCOMPARE = 0xE,
 };
 
 /* Additional Sense Code / Additional Sense Code Qualifier pairs */
 enum scsi_asc_ascq {
-	SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000,
-	SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405,
-	SCSI_ASC_WRITE_ERROR = 0x0C00,
-	SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100,
-	SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000,
-	SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400,
-	SCSI_ASC_WRITE_PROTECTED = 0x2700,
-	SCSI_ASC_NOT_READY_TO_READY_CHANGE = 0x2800,
-	SCSI_ASC_MEDIUM_NOT_PRESENT = 0x3A00,
-	SCSI_ASC_INTERNAL_TARGET_FAILURE = 0x4400,
+  SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000,
+  SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405,
+  SCSI_ASC_WRITE_ERROR = 0x0C00,
+  SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100,
+  SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000,
+  SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400,
+  SCSI_ASC_WRITE_PROTECTED = 0x2700,
+  SCSI_ASC_NOT_READY_TO_READY_CHANGE = 0x2800,
+  SCSI_ASC_MEDIUM_NOT_PRESENT = 0x3A00,
+  SCSI_ASC_INTERNAL_TARGET_FAILURE = 0x4400,
 };
 
 /**
@@ -240,9 +239,9 @@ enum scsi_asc_ascq {
  * that are applicable to all SCSI devices.
  */
 enum scsi_spc_mode {
-	SCSI_MS_MODE_VENDOR_SPEC = 0x00,
-	SCSI_MS_MODE_INFEXP = 0x1C,    // Informational exceptions control page
-	SCSI_MS_MODE_ALL = 0x3F,
+  SCSI_MS_MODE_VENDOR_SPEC = 0x00,
+  SCSI_MS_MODE_INFEXP = 0x1C,    // Informational exceptions control page
+  SCSI_MS_MODE_ALL = 0x3F,
 };
 
 /**
@@ -250,51 +249,45 @@ enum scsi_spc_mode {
  * See chapter 8.3.8
  */
 struct spc_control_page_info_execpt {
-	uint8_t page_code;
-	uint8_t page_length;
-#define  SPC_MP_INFEXP_PAGE_LENGTH     0x0A
-	uint8_t flags1;
-#define  SPC_MP_INFEXP_PERF            (1<<7)   //!< Initiator Control
-#define  SPC_MP_INFEXP_EBF             (1<<5)   //!< Caching Analysis Permitted
-#define  SPC_MP_INFEXP_EWASC           (1<<4)   //!< Discontinuity
-#define  SPC_MP_INFEXP_DEXCPT          (1<<3)   //!< Size enable
-#define  SPC_MP_INFEXP_TEST            (1<<2)   //!< Writeback Cache Enable
-#define  SPC_MP_INFEXP_LOGERR          (1<<0)   //!< Log errors bit
-	uint8_t mrie;
-#define  SPC_MP_INFEXP_MRIE_NO_REPORT           0x00
-#define  SPC_MP_INFEXP_MRIE_ASYNC_EVENT         0x01
-#define  SPC_MP_INFEXP_MRIE_GEN_UNIT            0x02
-#define  SPC_MP_INFEXP_MRIE_COND_RECOV_ERROR    0x03
-#define  SPC_MP_INFEXP_MRIE_UNCOND_RECOV_ERROR  0x04
-#define  SPC_MP_INFEXP_MRIE_NO_SENSE            0x05
-#define  SPC_MP_INFEXP_MRIE_ONLY_REPORT         0x06
-	be32_t interval_timer;
-	be32_t report_count;
+  uint8_t page_code;
+  uint8_t page_length;
+  #define SPC_MP_INFEXP_PAGE_LENGTH             0x0A
+  uint8_t flags1;
+  #define SPC_MP_INFEXP_PERF                    (1<<7)   //!< Initiator Control
+  #define SPC_MP_INFEXP_EBF                     (1<<5)   //!< Caching Analysis Permitted
+  #define SPC_MP_INFEXP_EWASC                   (1<<4)   //!< Discontinuity
+  #define SPC_MP_INFEXP_DEXCPT                  (1<<3)   //!< Size enable
+  #define SPC_MP_INFEXP_TEST                    (1<<2)   //!< Writeback Cache Enable
+  #define SPC_MP_INFEXP_LOGERR                  (1<<0)   //!< Log errors bit
+  uint8_t mrie;
+  #define SPC_MP_INFEXP_MRIE_NO_REPORT          0x00
+  #define SPC_MP_INFEXP_MRIE_ASYNC_EVENT        0x01
+  #define SPC_MP_INFEXP_MRIE_GEN_UNIT           0x02
+  #define SPC_MP_INFEXP_MRIE_COND_RECOV_ERROR   0x03
+  #define SPC_MP_INFEXP_MRIE_UNCOND_RECOV_ERROR 0x04
+  #define SPC_MP_INFEXP_MRIE_NO_SENSE           0x05
+  #define SPC_MP_INFEXP_MRIE_ONLY_REPORT        0x06
+  be32_t interval_timer;
+  be32_t report_count;
 };
 
-
 enum scsi_spc_mode_sense_pc {
-	SCSI_MS_SENSE_PC_CURRENT = 0,
-	SCSI_MS_SENSE_PC_CHANGEABLE = 1,
-	SCSI_MS_SENSE_PC_DEFAULT = 2,
-	SCSI_MS_SENSE_PC_SAVED = 3,
+  SCSI_MS_SENSE_PC_CURRENT = 0,
+  SCSI_MS_SENSE_PC_CHANGEABLE = 1,
+  SCSI_MS_SENSE_PC_DEFAULT = 2,
+  SCSI_MS_SENSE_PC_SAVED = 3,
 };
 
-
-
-static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb)
-{
-	return (cdb[1] >> 3) & 1;
+static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb) {
+  return (cdb[1] >> 3) & 1;
 }
 
-static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb)
-{
-	return cdb[2] & 0x3F;
+static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb) {
+  return cdb[2] & 0x3F;
 }
 
-static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb)
-{
-	return cdb[2] >> 6;
+static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb) {
+  return cdb[2] >> 6;
 }
 
 /**
@@ -302,10 +295,10 @@ static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb)
  * SENSE(6)
  */
 struct scsi_mode_param_header6 {
-	uint8_t mode_data_length;	//!< Number of bytes after this
-	uint8_t medium_type;	//!< Medium Type
-	uint8_t device_specific_parameter;	//!< Defined by command set
-	uint8_t block_descriptor_length;	//!< Length of block descriptors
+  uint8_t mode_data_length; //!< Number of bytes after this
+  uint8_t medium_type;  //!< Medium Type
+  uint8_t device_specific_parameter;  //!< Defined by command set
+  uint8_t block_descriptor_length;  //!< Length of block descriptors
 };
 
 /**
@@ -313,23 +306,23 @@ struct scsi_mode_param_header6 {
  * SENSE(10)
  */
 struct scsi_mode_param_header10 {
-	be16_t mode_data_length;	//!< Number of bytes after this
-	uint8_t medium_type;	//!< Medium Type
-	uint8_t device_specific_parameter;	//!< Defined by command set
-	uint8_t flags4;	//!< LONGLBA in bit 0
-	uint8_t reserved;
-	be16_t block_descriptor_length;	//!< Length of block descriptors
+  be16_t mode_data_length;  //!< Number of bytes after this
+  uint8_t medium_type;  //!< Medium Type
+  uint8_t device_specific_parameter;  //!< Defined by command set
+  uint8_t flags4; //!< LONGLBA in bit 0
+  uint8_t reserved;
+  be16_t block_descriptor_length; //!< Length of block descriptors
 };
 
 /**
  * \brief SCSI Page_0 Mode Page header (SPF not set)
  */
 struct scsi_mode_page_0_header {
-	uint8_t page_code;
-#define  SCSI_PAGE_CODE_PS          (1 << 7)	//!< Parameters Saveable
-#define  SCSI_PAGE_CODE_SPF         (1 << 6)	//!< SubPage Format
-	uint8_t page_length;	//!< Number of bytes after this
-#define  SCSI_MS_PAGE_LEN(total)   ((total) - 2)
+  uint8_t page_code;
+#define SCSI_PAGE_CODE_PS          (1 << 7)  //!< Parameters Saveable
+#define SCSI_PAGE_CODE_SPF         (1 << 6)  //!< SubPage Format
+  uint8_t page_length;  //!< Number of bytes after this
+#define SCSI_MS_PAGE_LEN(total)   ((total) - 2)
 };
 
 //@}

Marlin/src/HAL/DUE/usb/sysclk.h

@@ -71,7 +71,7 @@
  * \subsection sysclk_quickstart_use_case_1_setup_steps Initialization code
  * Add to the application initialization code:
  * \code
-	sysclk_init();
+  sysclk_init();
 \endcode
  *
  * \subsection sysclk_quickstart_use_case_1_setup_steps_workflow Workflow
@@ -82,15 +82,15 @@
  *   Add or uncomment the following in your conf_clock.h header file, commenting out all other
  *   definitions of the same symbol(s):
  *   \code
-	   #define CONFIG_SYSCLK_SOURCE        SYSCLK_SRC_PLLACK
+     #define CONFIG_SYSCLK_SOURCE        SYSCLK_SRC_PLLACK
 
-	   // Fpll0 = (Fclk * PLL_mul) / PLL_div
-	   #define CONFIG_PLL0_SOURCE          PLL_SRC_MAINCK_XTAL
-	   #define CONFIG_PLL0_MUL             (84000000UL / BOARD_FREQ_MAINCK_XTAL)
-	   #define CONFIG_PLL0_DIV             1
+     // Fpll0 = (Fclk * PLL_mul) / PLL_div
+     #define CONFIG_PLL0_SOURCE          PLL_SRC_MAINCK_XTAL
+     #define CONFIG_PLL0_MUL             (84000000UL / BOARD_FREQ_MAINCK_XTAL)
+     #define CONFIG_PLL0_DIV             1
 
-	   // Fbus = Fsys / BUS_div
-	   #define CONFIG_SYSCLK_PRES          SYSCLK_PRES_1
+     // Fbus = Fsys / BUS_div
+     #define CONFIG_SYSCLK_PRES          SYSCLK_PRES_1
 \endcode
  *
  * \subsection sysclk_quickstart_use_case_1_example_workflow Workflow
@@ -100,14 +100,14 @@
  *   \code #define CONFIG_PLL0_SOURCE            PLL_SRC_MAINCK_XTAL \endcode
  *  -# Configure the PLL module to multiply the external fast crystal oscillator frequency up to 84MHz:
  *   \code
-	#define CONFIG_PLL0_MUL             (84000000UL / BOARD_FREQ_MAINCK_XTAL)
-	#define CONFIG_PLL0_DIV             1
+  #define CONFIG_PLL0_MUL             (84000000UL / BOARD_FREQ_MAINCK_XTAL)
+  #define CONFIG_PLL0_DIV             1
 \endcode
  *   \note For user boards, \c BOARD_FREQ_MAINCK_XTAL should be defined in the board \c conf_board.h configuration
  *         file as the frequency of the fast crystal attached to the microcontroller.
  *  -# Configure the main clock to run at the full 84MHz, disable scaling of the main system clock speed:
  *    \code
-	#define CONFIG_SYSCLK_PRES         SYSCLK_PRES_1
+  #define CONFIG_SYSCLK_PRES         SYSCLK_PRES_1
 \endcode
  *    \note Some dividers are powers of two, while others are integer division factors. Refer to the
  *          formulas in the conf_clock.h template commented above each division define.
@@ -136,7 +136,7 @@ extern "C" {
  * initialization.
  */
 #ifndef CONFIG_SYSCLK_SOURCE
-# define CONFIG_SYSCLK_SOURCE   SYSCLK_SRC_MAINCK_4M_RC
+  #define CONFIG_SYSCLK_SOURCE   SYSCLK_SRC_MAINCK_4M_RC
 #endif
 /**
  * \def CONFIG_SYSCLK_PRES
@@ -149,7 +149,7 @@ extern "C" {
  * after initialization.
  */
 #ifndef CONFIG_SYSCLK_PRES
-# define CONFIG_SYSCLK_PRES  0
+  #define CONFIG_SYSCLK_PRES  0
 #endif
 
 //@}
@@ -197,7 +197,7 @@ extern "C" {
  * USB is not required.
  */
 #ifdef __DOXYGEN__
-# define CONFIG_USBCLK_SOURCE
+  #define CONFIG_USBCLK_SOURCE
 #endif
 
 /**
@@ -209,7 +209,7 @@ extern "C" {
  * defined.
  */
 #ifdef __DOXYGEN__
-# define CONFIG_USBCLK_DIV
+  #define CONFIG_USBCLK_DIV
 #endif
 
 

Marlin/src/HAL/DUE/usb/udc.h

@@ -144,15 +144,15 @@ extern "C" {
  * \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
  * User C file contains:
  * \code
-	// Authorize VBUS monitoring
-	if (!udc_include_vbus_monitoring()) {
-	  // Implement custom VBUS monitoring via GPIO or other
-	}
-	Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other
-	{
-	  // Attach USB Device
-	  udc_attach();
-	}
+  // Authorize VBUS monitoring
+  if (!udc_include_vbus_monitoring()) {
+    // Implement custom VBUS monitoring via GPIO or other
+  }
+  Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other
+  {
+    // Attach USB Device
+    udc_attach();
+  }
 \endcode
  *
  * - Case of battery charging. conf_usb.h file contains define
@@ -160,21 +160,20 @@ extern "C" {
  * \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
  * User C file contains:
  * \code
-	Event VBUS present() // VBUS interrupt or GPIO interrupt or ..
-	{
-	  // Authorize battery charging, but wait key press to start USB.
-	}
-	Event Key press()
-	{
-	  // Stop batteries charging
-	  // Start USB
-	  udc_attach();
-	}
+  Event VBUS present() // VBUS interrupt or GPIO interrupt or ..
+  {
+    // Authorize battery charging, but wait key press to start USB.
+  }
+  Event Key press()
+  {
+    // Stop batteries charging
+    // Start USB
+    udc_attach();
+  }
 \endcode
  */
-static inline bool udc_include_vbus_monitoring(void)
-{
-	return udd_include_vbus_monitoring();
+static inline bool udc_include_vbus_monitoring(void) {
+  return udd_include_vbus_monitoring();
 }
 
 /*! \brief Start the USB Device stack
@@ -192,32 +191,26 @@ void udc_stop(void);
  * then it will attach device when an acceptable Vbus
  * level from the host is detected.
  */
-static inline void udc_attach(void)
-{
-	udd_attach();
+static inline void udc_attach(void) {
+  udd_attach();
 }
 
-
 /**
  * \brief Detaches the device from the bus
  *
  * The driver must remove pull-up on USB line D- or D+.
  */
-static inline void udc_detach(void)
-{
-	udd_detach();
+static inline void udc_detach(void) {
+  udd_detach();
 }
 
-
 /*! \brief The USB driver sends a resume signal called \e "Upstream Resume"
  * This is authorized only when the remote wakeup feature is enabled by host.
  */
-static inline void udc_remotewakeup(void)
-{
-	udd_send_remotewakeup();
+static inline void udc_remotewakeup(void) {
+  udd_send_remotewakeup();
 }
 
-
 /**
  * \brief Returns a pointer on the current interface descriptor
  *
@@ -296,23 +289,23 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
  *
  * for AVR and SAM3/4 devices, add to the initialization code:
  * \code
-	sysclk_init();
-	irq_initialize_vectors();
-	cpu_irq_enable();
-	board_init();
-	sleepmgr_init(); // Optional
+  sysclk_init();
+  irq_initialize_vectors();
+  cpu_irq_enable();
+  board_init();
+  sleepmgr_init(); // Optional
 \endcode
  *
  * For SAMD devices, add to the initialization code:
  * \code
-	system_init();
-	irq_initialize_vectors();
-	cpu_irq_enable();
-	sleepmgr_init(); // Optional
+  system_init();
+  irq_initialize_vectors();
+  cpu_irq_enable();
+  sleepmgr_init(); // Optional
 \endcode
  * Add to the main IDLE loop:
  * \code
-	sleepmgr_enter_sleep(); // Optional
+  sleepmgr_enter_sleep(); // Optional
 \endcode
  *
  */
@@ -324,20 +317,20 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
  *
  * Content of conf_usb.h:
  * \code
-	#define USB_DEVICE_VENDOR_ID 0x03EB
-	#define USB_DEVICE_PRODUCT_ID 0xXXXX
-	#define USB_DEVICE_MAJOR_VERSION 1
-	#define USB_DEVICE_MINOR_VERSION 0
-	#define USB_DEVICE_POWER 100
-	#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED
+  #define USB_DEVICE_VENDOR_ID 0x03EB
+  #define USB_DEVICE_PRODUCT_ID 0xXXXX
+  #define USB_DEVICE_MAJOR_VERSION 1
+  #define USB_DEVICE_MINOR_VERSION 0
+  #define USB_DEVICE_POWER 100
+  #define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED
 \endcode
  *
  * Add to application C-file:
  * \code
-	void usb_init(void)
-	{
-	  udc_start();
-	}
+  void usb_init(void)
+  {
+    udc_start();
+  }
 \endcode
  */
 
@@ -349,17 +342,17 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
  * -# Ensure that conf_usb.h is available and contains the following configuration
  * which is the main USB device configuration:
  *   - \code // Vendor ID provided by USB org (ATMEL 0x03EB)
-	#define USB_DEVICE_VENDOR_ID 0x03EB // Type Word
-	// Product ID (Atmel PID referenced in usb_atmel.h)
-	#define USB_DEVICE_PRODUCT_ID 0xXXXX // Type Word
-	// Major version of the device
-	#define USB_DEVICE_MAJOR_VERSION 1 // Type Byte
-	// Minor version of the device
-	#define USB_DEVICE_MINOR_VERSION 0 // Type Byte
-	// Maximum device power (mA)
-	#define USB_DEVICE_POWER 100 // Type 9-bits
-	// USB attributes to enable features
-	#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED // Flags \endcode
+  #define USB_DEVICE_VENDOR_ID 0x03EB // Type Word
+  // Product ID (Atmel PID referenced in usb_atmel.h)
+  #define USB_DEVICE_PRODUCT_ID 0xXXXX // Type Word
+  // Major version of the device
+  #define USB_DEVICE_MAJOR_VERSION 1 // Type Byte
+  // Minor version of the device
+  #define USB_DEVICE_MINOR_VERSION 0 // Type Byte
+  // Maximum device power (mA)
+  #define USB_DEVICE_POWER 100 // Type 9-bits
+  // USB attributes to enable features
+  #define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED // Flags \endcode
  * -# Call the USB device stack start function to enable stack and start USB:
  *   - \code udc_start(); \endcode
  *     \note In case of USB dual roles (Device and Host) managed through USB OTG connector
@@ -372,90 +365,90 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
  *
  * Content of XMEGA conf_clock.h:
  * \code
-	// Configuration based on internal RC:
-	// USB clock need of 48Mhz
-	#define CONFIG_USBCLK_SOURCE        USBCLK_SRC_RCOSC
-	#define CONFIG_OSC_RC32_CAL         48000000UL
-	#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC  OSC_ID_USBSOF
-	// CPU clock need of clock > 12MHz to run with USB (Here 24MHz)
-	#define CONFIG_SYSCLK_SOURCE     SYSCLK_SRC_RC32MHZ
-	#define CONFIG_SYSCLK_PSADIV     SYSCLK_PSADIV_2
-	#define CONFIG_SYSCLK_PSBCDIV    SYSCLK_PSBCDIV_1_1
+  // Configuration based on internal RC:
+  // USB clock need of 48Mhz
+  #define CONFIG_USBCLK_SOURCE        USBCLK_SRC_RCOSC
+  #define CONFIG_OSC_RC32_CAL         48000000UL
+  #define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC  OSC_ID_USBSOF
+  // CPU clock need of clock > 12MHz to run with USB (Here 24MHz)
+  #define CONFIG_SYSCLK_SOURCE     SYSCLK_SRC_RC32MHZ
+  #define CONFIG_SYSCLK_PSADIV     SYSCLK_PSADIV_2
+  #define CONFIG_SYSCLK_PSBCDIV    SYSCLK_PSBCDIV_1_1
 \endcode
  *
  * Content of conf_clock.h for AT32UC3A0, AT32UC3A1, AT32UC3B devices (USBB):
  * \code
-	// Configuration based on 12MHz external OSC:
-	#define CONFIG_PLL1_SOURCE          PLL_SRC_OSC0
-	#define CONFIG_PLL1_MUL             8
-	#define CONFIG_PLL1_DIV             2
-	#define CONFIG_USBCLK_SOURCE        USBCLK_SRC_PLL1
-	#define CONFIG_USBCLK_DIV           1 // Fusb = Fsys/(2 ^ USB_div)
+  // Configuration based on 12MHz external OSC:
+  #define CONFIG_PLL1_SOURCE          PLL_SRC_OSC0
+  #define CONFIG_PLL1_MUL             8
+  #define CONFIG_PLL1_DIV             2
+  #define CONFIG_USBCLK_SOURCE        USBCLK_SRC_PLL1
+  #define CONFIG_USBCLK_DIV           1 // Fusb = Fsys/(2 ^ USB_div)
 \endcode
  *
  * Content of conf_clock.h for AT32UC3A3, AT32UC3A4 devices (USBB with high speed support):
  * \code
-	// Configuration based on 12MHz external OSC:
-	#define CONFIG_USBCLK_SOURCE        USBCLK_SRC_OSC0
-	#define CONFIG_USBCLK_DIV           1 // Fusb = Fsys/(2 ^ USB_div)
+  // Configuration based on 12MHz external OSC:
+  #define CONFIG_USBCLK_SOURCE        USBCLK_SRC_OSC0
+  #define CONFIG_USBCLK_DIV           1 // Fusb = Fsys/(2 ^ USB_div)
 \endcode
  *
  * Content of conf_clock.h for AT32UC3C, ATUCXXD, ATUCXXL3U, ATUCXXL4U devices (USBC):
  * \code
-	// Configuration based on 12MHz external OSC:
-	#define CONFIG_PLL1_SOURCE          PLL_SRC_OSC0
-	#define CONFIG_PLL1_MUL             8
-	#define CONFIG_PLL1_DIV             2
-	#define CONFIG_USBCLK_SOURCE        USBCLK_SRC_PLL1
-	#define CONFIG_USBCLK_DIV           1 // Fusb = Fsys/(2 ^ USB_div)
-	// CPU clock need of clock > 25MHz to run with USBC
-	#define CONFIG_SYSCLK_SOURCE        SYSCLK_SRC_PLL1
+  // Configuration based on 12MHz external OSC:
+  #define CONFIG_PLL1_SOURCE          PLL_SRC_OSC0
+  #define CONFIG_PLL1_MUL             8
+  #define CONFIG_PLL1_DIV             2
+  #define CONFIG_USBCLK_SOURCE        USBCLK_SRC_PLL1
+  #define CONFIG_USBCLK_DIV           1 // Fusb = Fsys/(2 ^ USB_div)
+  // CPU clock need of clock > 25MHz to run with USBC
+  #define CONFIG_SYSCLK_SOURCE        SYSCLK_SRC_PLL1
 \endcode
  *
  * Content of conf_clock.h for SAM3S, SAM3SD, SAM4S devices (UPD: USB Peripheral Device):
  * \code
-	// PLL1 (B) Options   (Fpll = (Fclk * PLL_mul) / PLL_div)
-	#define CONFIG_PLL1_SOURCE          PLL_SRC_MAINCK_XTAL
-	#define CONFIG_PLL1_MUL             16
-	#define CONFIG_PLL1_DIV             2
-	// USB Clock Source Options   (Fusb = FpllX / USB_div)
-	#define CONFIG_USBCLK_SOURCE        USBCLK_SRC_PLL1
-	#define CONFIG_USBCLK_DIV           2
+  // PLL1 (B) Options   (Fpll = (Fclk * PLL_mul) / PLL_div)
+  #define CONFIG_PLL1_SOURCE          PLL_SRC_MAINCK_XTAL
+  #define CONFIG_PLL1_MUL             16
+  #define CONFIG_PLL1_DIV             2
+  // USB Clock Source Options   (Fusb = FpllX / USB_div)
+  #define CONFIG_USBCLK_SOURCE        USBCLK_SRC_PLL1
+  #define CONFIG_USBCLK_DIV           2
 \endcode
  *
  * Content of conf_clock.h for SAM3U device (UPDHS: USB Peripheral Device High Speed):
  * \code
-	// USB Clock Source fixed at UPLL.
+  // USB Clock Source fixed at UPLL.
 \endcode
  *
  * Content of conf_clock.h for SAM3X, SAM3A devices (UOTGHS: USB OTG High Speed):
  * \code
-	// USB Clock Source fixed at UPLL.
-	#define CONFIG_USBCLK_SOURCE        USBCLK_SRC_UPLL
-	#define CONFIG_USBCLK_DIV           1
+  // USB Clock Source fixed at UPLL.
+  #define CONFIG_USBCLK_SOURCE        USBCLK_SRC_UPLL
+  #define CONFIG_USBCLK_DIV           1
 \endcode
  *
  * Content of conf_clocks.h for SAMD devices (USB):
  * \code
-	// System clock bus configuration
-	#  define CONF_CLOCK_FLASH_WAIT_STATES            2
-
-	// USB Clock Source fixed at DFLL.
-	// SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop
-	#  define CONF_CLOCK_DFLL_ENABLE                  true
-	#  define CONF_CLOCK_DFLL_LOOP_MODE               SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY
-	#  define CONF_CLOCK_DFLL_ON_DEMAND               true
-
-	// Set this to true to configure the GCLK when running clocks_init.
-	// If set to false, none of the GCLK generators will be configured in clocks_init().
-	#  define CONF_CLOCK_CONFIGURE_GCLK               true
-
-	// Configure GCLK generator 0 (Main Clock)
-	#  define CONF_CLOCK_GCLK_0_ENABLE                true
-	#  define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY        true
-	#  define CONF_CLOCK_GCLK_0_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_DFLL
-	#  define CONF_CLOCK_GCLK_0_PRESCALER             1
-	#  define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE         false
+  // System clock bus configuration
+  #  define CONF_CLOCK_FLASH_WAIT_STATES            2
+
+  // USB Clock Source fixed at DFLL.
+  // SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop
+  #  define CONF_CLOCK_DFLL_ENABLE                  true
+  #  define CONF_CLOCK_DFLL_LOOP_MODE               SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY
+  #  define CONF_CLOCK_DFLL_ON_DEMAND               true
+
+  // Set this to true to configure the GCLK when running clocks_init.
+  // If set to false, none of the GCLK generators will be configured in clocks_init().
+  #  define CONF_CLOCK_CONFIGURE_GCLK               true
+
+  // Configure GCLK generator 0 (Main Clock)
+  #  define CONF_CLOCK_GCLK_0_ENABLE                true
+  #  define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY        true
+  #  define CONF_CLOCK_GCLK_0_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_DFLL
+  #  define CONF_CLOCK_GCLK_0_PRESCALER             1
+  #  define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE         false
 \endcode
  */
 
@@ -474,34 +467,34 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
  * \subsection udc_use_case_1_usage_code Example code
  * Content of conf_usb.h:
  * \code
-	 #if // Low speed
-	 #define USB_DEVICE_LOW_SPEED
-	 // #define USB_DEVICE_HS_SUPPORT
+   #if // Low speed
+   #define USB_DEVICE_LOW_SPEED
+   // #define USB_DEVICE_HS_SUPPORT
 
-	 #elif // Full speed
-	 // #define USB_DEVICE_LOW_SPEED
-	 // #define USB_DEVICE_HS_SUPPORT
+   #elif // Full speed
+   // #define USB_DEVICE_LOW_SPEED
+   // #define USB_DEVICE_HS_SUPPORT
 
-	 #elif // High speed
-	 // #define USB_DEVICE_LOW_SPEED
-	 #define USB_DEVICE_HS_SUPPORT
+   #elif // High speed
+   // #define USB_DEVICE_LOW_SPEED
+   #define USB_DEVICE_HS_SUPPORT
 
-	 #endif
+   #endif
 \endcode
  *
  * \subsection udc_use_case_1_usage_flow Workflow
  * -# Ensure that conf_usb.h is available and contains the following parameters
  * required for a USB device low speed (1.5Mbit/s):
  *   - \code #define USB_DEVICE_LOW_SPEED
-	 //#define  USB_DEVICE_HS_SUPPORT \endcode
+   //#define  USB_DEVICE_HS_SUPPORT \endcode
  * -# Ensure that conf_usb.h contains the following parameters
  * required for a USB device full speed (12Mbit/s):
  *   - \code //#define USB_DEVICE_LOW_SPEED
-	 //#define  USB_DEVICE_HS_SUPPORT \endcode
+   //#define  USB_DEVICE_HS_SUPPORT \endcode
  * -# Ensure that conf_usb.h contains the following parameters
  * required for a USB device high speed (480Mbit/s):
  *   - \code //#define USB_DEVICE_LOW_SPEED
-	 #define  USB_DEVICE_HS_SUPPORT \endcode
+   #define  USB_DEVICE_HS_SUPPORT \endcode
  */
 
 /**
@@ -518,20 +511,20 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
  * \subsection udc_use_case_2_usage_code Example code
  * Content of conf_usb.h:
  * \code
-	#define  USB_DEVICE_MANUFACTURE_NAME      "Manufacture name"
-	#define  USB_DEVICE_PRODUCT_NAME          "Product name"
-	#define  USB_DEVICE_SERIAL_NAME           "12...EF"
+  #define  USB_DEVICE_MANUFACTURE_NAME      "Manufacture name"
+  #define  USB_DEVICE_PRODUCT_NAME          "Product name"
+  #define  USB_DEVICE_SERIAL_NAME           "12...EF"
 \endcode
  *
  * \subsection udc_use_case_2_usage_flow Workflow
  * -# Ensure that conf_usb.h is available and contains the following parameters
  * required to enable different USB strings:
  *   - \code // Static ASCII name for the manufacture
-	#define  USB_DEVICE_MANUFACTURE_NAME "Manufacture name" \endcode
+  #define  USB_DEVICE_MANUFACTURE_NAME "Manufacture name" \endcode
  *   - \code // Static ASCII name for the product
-	#define  USB_DEVICE_PRODUCT_NAME "Product name" \endcode
+  #define  USB_DEVICE_PRODUCT_NAME "Product name" \endcode
  *   - \code // Static ASCII name to enable and set a serial number
-	#define  USB_DEVICE_SERIAL_NAME "12...EF" \endcode
+  #define  USB_DEVICE_SERIAL_NAME "12...EF" \endcode
  */
 
 /**
@@ -548,42 +541,42 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
  * \subsection udc_use_case_3_usage_code Example code
  * Content of conf_usb.h:
  * \code
-	#define  USB_DEVICE_ATTR \
-	  (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED)
-	#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
-	extern void my_callback_remotewakeup_enable(void);
-	#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
-	extern void my_callback_remotewakeup_disable(void);
+  #define  USB_DEVICE_ATTR \
+    (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED)
+  #define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
+  extern void my_callback_remotewakeup_enable(void);
+  #define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
+  extern void my_callback_remotewakeup_disable(void);
 \endcode
  *
  * Add to application C-file:
  * \code
-	 void my_callback_remotewakeup_enable(void)
-	 {
-	    // Enable application wakeup events (e.g. enable GPIO interrupt)
-	 }
-	 void my_callback_remotewakeup_disable(void)
-	 {
-	    // Disable application wakeup events (e.g. disable GPIO interrupt)
-	 }
-
-	 void my_interrupt_event(void)
-	 {
-	    udc_remotewakeup();
-	 }
+   void my_callback_remotewakeup_enable(void)
+   {
+      // Enable application wakeup events (e.g. enable GPIO interrupt)
+   }
+   void my_callback_remotewakeup_disable(void)
+   {
+      // Disable application wakeup events (e.g. disable GPIO interrupt)
+   }
+
+   void my_interrupt_event(void)
+   {
+      udc_remotewakeup();
+   }
 \endcode
  *
  * \subsection udc_use_case_3_usage_flow Workflow
  * -# Ensure that conf_usb.h is available and contains the following parameters
  * required to enable remote wakeup feature:
  *   - \code // Authorizes the remote wakeup feature
-	     #define  USB_DEVICE_ATTR (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED) \endcode
+       #define  USB_DEVICE_ATTR (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED) \endcode
  *   - \code // Define callback called when the host enables the remotewakeup feature
-	#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
-	extern void my_callback_remotewakeup_enable(void); \endcode
+  #define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
+  extern void my_callback_remotewakeup_enable(void); \endcode
  *   - \code // Define callback called when the host disables the remotewakeup feature
-	#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
-	extern void my_callback_remotewakeup_disable(void); \endcode
+  #define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
+  extern void my_callback_remotewakeup_disable(void); \endcode
  * -# Send a remote wakeup (USB upstream):
  *   - \code udc_remotewakeup(); \endcode
  */
@@ -603,40 +596,40 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
  * \subsection udc_use_case_5_usage_code Example code
  * Content of conf_usb.h:
  * \code
-	#define  USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED)
-	#define  UDC_SUSPEND_EVENT()         user_callback_suspend_action()
-	extern void user_callback_suspend_action(void)
-	#define  UDC_RESUME_EVENT()          user_callback_resume_action()
-	extern void user_callback_resume_action(void)
+  #define  USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED)
+  #define  UDC_SUSPEND_EVENT()         user_callback_suspend_action()
+  extern void user_callback_suspend_action(void)
+  #define  UDC_RESUME_EVENT()          user_callback_resume_action()
+  extern void user_callback_resume_action(void)
 \endcode
  *
  * Add to application C-file:
  * \code
-	void user_callback_suspend_action(void)
-	{
-	   // Disable hardware component to reduce power consumption
-	}
-	void user_callback_resume_action(void)
-	{
-	   // Re-enable hardware component
-	}
+  void user_callback_suspend_action(void)
+  {
+     // Disable hardware component to reduce power consumption
+  }
+  void user_callback_resume_action(void)
+  {
+     // Re-enable hardware component
+  }
 \endcode
  *
  * \subsection udc_use_case_5_usage_flow Workflow
  * -# Ensure that conf_usb.h is available and contains the following parameters:
  *   - \code // Authorizes the BUS power feature
-	#define  USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED) \endcode
+  #define  USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED) \endcode
  *   - \code // Define callback called when the host suspend the USB line
-	#define UDC_SUSPEND_EVENT() user_callback_suspend_action()
-	extern void user_callback_suspend_action(void); \endcode
+  #define UDC_SUSPEND_EVENT() user_callback_suspend_action()
+  extern void user_callback_suspend_action(void); \endcode
  *   - \code // Define callback called when the host or device resume the USB line
-	#define UDC_RESUME_EVENT() user_callback_resume_action()
-	extern void user_callback_resume_action(void); \endcode
+  #define UDC_RESUME_EVENT() user_callback_resume_action()
+  extern void user_callback_resume_action(void); \endcode
  * -# Reduce power consumption in suspend mode (max. 2.5mA on Vbus):
  *   - \code void user_callback_suspend_action(void)
-	{
-	turn_off_components();
-	} \endcode
+  {
+  turn_off_components();
+  } \endcode
  */
 
 /**
@@ -654,42 +647,42 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
  * \subsection udc_use_case_6_usage_code Example code
  * Content of conf_usb.h:
  * \code
-	#define  USB_DEVICE_SERIAL_NAME
-	#define  USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number
-	#define  USB_DEVICE_GET_SERIAL_NAME_LENGTH  12
-	extern uint8_t serial_number[];
+  #define  USB_DEVICE_SERIAL_NAME
+  #define  USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number
+  #define  USB_DEVICE_GET_SERIAL_NAME_LENGTH  12
+  extern uint8_t serial_number[];
 \endcode
  *
  * Add to application C-file:
  * \code
-	 uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
+   uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
 
-	 void init_build_usb_serial_number(void)
-	 {
-	 serial_number[0] = 'A';
-	 serial_number[1] = 'B';
-	 ...
-	 serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
-	 } \endcode
+   void init_build_usb_serial_number(void)
+   {
+   serial_number[0] = 'A';
+   serial_number[1] = 'B';
+   ...
+   serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
+   } \endcode
  *
  * \subsection udc_use_case_6_usage_flow Workflow
  * -# Ensure that conf_usb.h is available and contains the following parameters
  * required to enable a USB serial number strings dynamically:
  *   - \code #define  USB_DEVICE_SERIAL_NAME // Define this empty
-	#define  USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number // Give serial array pointer
-	#define  USB_DEVICE_GET_SERIAL_NAME_LENGTH  12 // Give size of serial array
-	extern uint8_t serial_number[]; // Declare external serial array \endcode
+  #define  USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number // Give serial array pointer
+  #define  USB_DEVICE_GET_SERIAL_NAME_LENGTH  12 // Give size of serial array
+  extern uint8_t serial_number[]; // Declare external serial array \endcode
  * -# Before start USB stack, initialize the serial array
  *   - \code
-	 uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
-
-	 void init_build_usb_serial_number(void)
-	 {
-	 serial_number[0] = 'A';
-	 serial_number[1] = 'B';
-	 ...
-	 serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
-	 } \endcode
+   uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
+
+   void init_build_usb_serial_number(void)
+   {
+   serial_number[0] = 'A';
+   serial_number[1] = 'B';
+   ...
+   serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
+   } \endcode
  */
 
 

Marlin/src/HAL/DUE/usb/udc_desc.h

@@ -78,50 +78,47 @@ extern "C" {
  * For Mega application used "code".
  */
 #define  UDC_DESC_STORAGE
-	// Descriptor storage in internal RAM
+  // Descriptor storage in internal RAM
 #if (defined UDC_DATA_USE_HRAM_SUPPORT)
-#	if defined(__GNUC__)
-#		define UDC_DATA(x)              COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0")))
-#		define UDC_BSS(x)               COMPILER_ALIGNED(x)   __attribute__((__section__(".bss_hram0")))
-#	elif defined(__ICCAVR32__)
-#		define UDC_DATA(x)              COMPILER_ALIGNED(x)   __data32
-#		define UDC_BSS(x)               COMPILER_ALIGNED(x)   __data32
-#	endif
+  #if defined(__GNUC__)
+  #define UDC_DATA(x)   COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0")))
+  #define UDC_BSS(x)    COMPILER_ALIGNED(x)   __attribute__((__section__(".bss_hram0")))
+#elif defined(__ICCAVR32__)
+  #define UDC_DATA(x)   COMPILER_ALIGNED(x)   __data32
+  #define UDC_BSS(x)    COMPILER_ALIGNED(x)   __data32
+#endif
 #else
-#	define UDC_DATA(x)              COMPILER_ALIGNED(x)
-#	define UDC_BSS(x)               COMPILER_ALIGNED(x)
+  #define UDC_DATA(x)   COMPILER_ALIGNED(x)
+  #define UDC_BSS(x)    COMPILER_ALIGNED(x)
 #endif
 
-
-
 /**
  * \brief Configuration descriptor and UDI link for one USB speed
  */
 typedef struct {
-	//! USB configuration descriptor
-	usb_conf_desc_t UDC_DESC_STORAGE *desc;
-	//! Array of UDI API pointer
-	udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis;
+  //! USB configuration descriptor
+  usb_conf_desc_t UDC_DESC_STORAGE *desc;
+  //! Array of UDI API pointer
+  udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis;
 } udc_config_speed_t;
 
-
 /**
  * \brief All information about the USB Device
  */
 typedef struct {
-	//! USB device descriptor for low or full speed
-	usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs;
-	//! USB configuration descriptor and UDI API pointers for low or full speed
-	udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs;
-#ifdef USB_DEVICE_HS_SUPPORT
-	//! USB device descriptor for high speed
-	usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs;
-	//! USB device qualifier, only use in high speed mode
-	usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier;
-	//! USB configuration descriptor and UDI API pointers for high speed
-	udc_config_speed_t UDC_DESC_STORAGE *conf_hs;
-#endif
-	usb_dev_bos_desc_t UDC_DESC_STORAGE *conf_bos;
+  //! USB device descriptor for low or full speed
+  usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs;
+  //! USB configuration descriptor and UDI API pointers for low or full speed
+  udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs;
+  #ifdef USB_DEVICE_HS_SUPPORT
+    //! USB device descriptor for high speed
+    usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs;
+    //! USB device qualifier, only use in high speed mode
+    usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier;
+    //! USB configuration descriptor and UDI API pointers for high speed
+    udc_config_speed_t UDC_DESC_STORAGE *conf_hs;
+  #endif
+  usb_dev_bos_desc_t UDC_DESC_STORAGE *conf_bos;
 } udc_config_t;
 
 //! Global variables of USB Device Descriptor and UDI links

Marlin/src/HAL/DUE/usb/udd.h

@@ -71,8 +71,8 @@ typedef uint8_t udd_ep_id_t;
 //! \brief Endpoint transfer status
 //! Returned in parameters of callback register via udd_ep_run routine.
 typedef enum {
-	UDD_EP_TRANSFER_OK = 0,
-	UDD_EP_TRANSFER_ABORT = 1,
+  UDD_EP_TRANSFER_OK = 0,
+  UDD_EP_TRANSFER_ABORT = 1,
 } udd_ep_status_t;
 
 /**
@@ -82,41 +82,37 @@ typedef enum {
  * It can be updated by udc_process_setup() from UDC or *setup() from UDIs.
  */
 typedef struct {
-	//! Data received in USB SETUP packet
-	//! Note: The swap of "req.wValues" from uin16_t to le16_t is done by UDD.
-	usb_setup_req_t req;
+  //! Data received in USB SETUP packet
+  //! Note: The swap of "req.wValues" from uin16_t to le16_t is done by UDD.
+  usb_setup_req_t req;
 
-	//! Point to buffer to send or fill with data following SETUP packet
-	//! This buffer must be word align for DATA IN phase (use prefix COMPILER_WORD_ALIGNED for buffer)
-	uint8_t *payload;
+  //! Point to buffer to send or fill with data following SETUP packet
+  //! This buffer must be word align for DATA IN phase (use prefix COMPILER_WORD_ALIGNED for buffer)
+  uint8_t *payload;
 
-	//! Size of buffer to send or fill, and content the number of byte transferred
-	uint16_t payload_size;
+  //! Size of buffer to send or fill, and content the number of byte transferred
+  uint16_t payload_size;
 
-	//! Callback called after reception of ZLP from setup request
-	void (*callback)(void);
+  //! Callback called after reception of ZLP from setup request
+  void (*callback)(void);
 
-	//! Callback called when the buffer given (.payload) is full or empty.
-	//! This one return false to abort data transfer, or true with a new buffer in .payload.
-	bool (*over_under_run)(void);
+  //! Callback called when the buffer given (.payload) is full or empty.
+  //! This one return false to abort data transfer, or true with a new buffer in .payload.
+  bool (*over_under_run)(void);
 } udd_ctrl_request_t;
 extern udd_ctrl_request_t udd_g_ctrlreq;
 
 //! Return true if the setup request \a udd_g_ctrlreq indicates IN data transfer
-#define  Udd_setup_is_in()       \
-      (USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
+#define  Udd_setup_is_in()     (USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
 
 //! Return true if the setup request \a udd_g_ctrlreq indicates OUT data transfer
-#define  Udd_setup_is_out()      \
-      (USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
+#define  Udd_setup_is_out()    (USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
 
 //! Return the type of the SETUP request \a udd_g_ctrlreq. \see usb_reqtype.
-#define  Udd_setup_type()        \
-      (udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK)
+#define  Udd_setup_type()      (udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK)
 
 //! Return the recipient of the SETUP request \a udd_g_ctrlreq. \see usb_recipient
-#define  Udd_setup_recipient()   \
-      (udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK)
+#define  Udd_setup_recipient() (udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK)
 
 /**
  * \brief End of halt callback function type.
@@ -134,8 +130,7 @@ typedef void (*udd_callback_halt_cleared_t)(void);
  * \param status     UDD_EP_TRANSFER_ABORT, if transfer is aborted
  * \param n          number of data transferred
  */
-typedef void (*udd_callback_trans_t) (udd_ep_status_t status,
-		iram_size_t nb_transferred, udd_ep_id_t ep);
+typedef void (*udd_callback_trans_t) (udd_ep_status_t status, iram_size_t nb_transferred, udd_ep_id_t ep);
 
 /**
  * \brief Authorizes the VBUS event
@@ -239,8 +234,7 @@ void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size );
  *
  * \return \c 1 if the endpoint is enabled, otherwise \c 0.
  */
-bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
-		uint16_t MaxEndpointSize);
+bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, uint16_t MaxEndpointSize);
 
 /**
  * \brief Disables an endpoint
@@ -294,8 +288,7 @@ bool udd_ep_clear_halt(udd_ep_id_t ep);
  *
  * \return \c 1 if the register is accepted, otherwise \c 0.
  */
-bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
-		udd_callback_halt_cleared_t callback);
+bool udd_ep_wait_stall_clear(udd_ep_id_t ep, udd_callback_halt_cleared_t callback);
 
 /**
  * \brief Allows to receive or send data on an endpoint
@@ -321,9 +314,8 @@ bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
  *
  * \return \c 1 if function was successfully done, otherwise \c 0.
  */
-bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket,
-		uint8_t * buf, iram_size_t buf_size,
-		udd_callback_trans_t callback);
+bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, uint8_t * buf, iram_size_t buf_size, udd_callback_trans_t callback);
+
 /**
  * \brief Aborts transfer on going on endpoint
  *
@@ -339,7 +331,6 @@ void udd_ep_abort(udd_ep_id_t ep);
 
 //@}
 
-
 /**
  * \name High speed test mode management
  *
@@ -352,7 +343,6 @@ void udd_test_mode_se0_nak(void);
 void udd_test_mode_packet(void);
 //@}
 
-
 /**
  * \name UDC callbacks to provide for UDD
  *

Marlin/src/HAL/DUE/usb/udi.h

@@ -72,57 +72,57 @@ extern "C" {
  * selected by UDC.
  */
 typedef struct {
-	/**
-	 * \brief Enable the interface.
-	 *
-	 * This function is called when the host selects a configuration
-	 * to which this interface belongs through a Set Configuration
-	 * request, and when the host selects an alternate setting of
-	 * this interface through a Set Interface request.
-	 *
-	 * \return \c 1 if function was successfully done, otherwise \c 0.
-	 */
-	bool (*enable)(void);
+  /**
+   * \brief Enable the interface.
+   *
+   * This function is called when the host selects a configuration
+   * to which this interface belongs through a Set Configuration
+   * request, and when the host selects an alternate setting of
+   * this interface through a Set Interface request.
+   *
+   * \return \c 1 if function was successfully done, otherwise \c 0.
+   */
+  bool (*enable)(void);
 
-	/**
-	 * \brief Disable the interface.
-	 *
-	 * This function is called when this interface is currently
-	 * active, and
-	 * - the host selects any configuration through a Set
-	 *   Configuration request, or
-	 * - the host issues a USB reset, or
-	 * - the device is detached from the host (i.e. Vbus is no
-	 *   longer present)
-	 */
-	void (*disable)(void);
+  /**
+   * \brief Disable the interface.
+   *
+   * This function is called when this interface is currently
+   * active, and
+   * - the host selects any configuration through a Set
+   *   Configuration request, or
+   * - the host issues a USB reset, or
+   * - the device is detached from the host (i.e. Vbus is no
+   *   longer present)
+   */
+  void (*disable)(void);
 
-	/**
-	 * \brief Handle a control request directed at an interface.
-	 *
-	 * This function is called when this interface is currently
-	 * active and the host sends a SETUP request
-	 * with this interface as the recipient.
-	 *
-	 * Use udd_g_ctrlreq to decode and response to SETUP request.
-	 *
-	 * \return \c 1 if this interface supports the SETUP request, otherwise \c 0.
-	 */
-	bool (*setup)(void);
+  /**
+   * \brief Handle a control request directed at an interface.
+   *
+   * This function is called when this interface is currently
+   * active and the host sends a SETUP request
+   * with this interface as the recipient.
+   *
+   * Use udd_g_ctrlreq to decode and response to SETUP request.
+   *
+   * \return \c 1 if this interface supports the SETUP request, otherwise \c 0.
+   */
+  bool (*setup)(void);
 
-	/**
-	 * \brief Returns the current setting of the selected interface.
-	 *
-	 * This function is called when UDC when know alternate setting of selected interface.
-	 *
-	 * \return alternate setting of selected interface
-	 */
-	uint8_t (*getsetting)(void);
+  /**
+   * \brief Returns the current setting of the selected interface.
+   *
+   * This function is called when UDC when know alternate setting of selected interface.
+   *
+   * \return alternate setting of selected interface
+   */
+  uint8_t (*getsetting)(void);
 
-	/**
-	 * \brief To signal that a SOF is occurred
-	 */
-	void (*sof_notify)(void);
+  /**
+   * \brief To signal that a SOF is occurred
+   */
+  void (*sof_notify)(void);
 } udi_api_t;
 
 //@}