Pipeline.cpp 2.5 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697
  1. //===--------------------- Pipeline.cpp -------------------------*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. /// \file
  9. ///
  10. /// This file implements an ordered container of stages that simulate the
  11. /// pipeline of a hardware backend.
  12. ///
  13. //===----------------------------------------------------------------------===//
  14. #include "llvm/MCA/Pipeline.h"
  15. #include "llvm/MCA/HWEventListener.h"
  16. #include "llvm/Support/Debug.h"
  17. namespace llvm {
  18. namespace mca {
  19. #define DEBUG_TYPE "llvm-mca"
  20. void Pipeline::addEventListener(HWEventListener *Listener) {
  21. if (Listener)
  22. Listeners.insert(Listener);
  23. for (auto &S : Stages)
  24. S->addListener(Listener);
  25. }
  26. bool Pipeline::hasWorkToProcess() {
  27. return any_of(Stages, [](const std::unique_ptr<Stage> &S) {
  28. return S->hasWorkToComplete();
  29. });
  30. }
  31. Expected<unsigned> Pipeline::run() {
  32. assert(!Stages.empty() && "Unexpected empty pipeline found!");
  33. do {
  34. notifyCycleBegin();
  35. if (Error Err = runCycle())
  36. return std::move(Err);
  37. notifyCycleEnd();
  38. ++Cycles;
  39. } while (hasWorkToProcess());
  40. return Cycles;
  41. }
  42. Error Pipeline::runCycle() {
  43. Error Err = ErrorSuccess();
  44. // Update stages before we start processing new instructions.
  45. for (auto I = Stages.rbegin(), E = Stages.rend(); I != E && !Err; ++I) {
  46. const std::unique_ptr<Stage> &S = *I;
  47. Err = S->cycleStart();
  48. }
  49. // Now fetch and execute new instructions.
  50. InstRef IR;
  51. Stage &FirstStage = *Stages[0];
  52. while (!Err && FirstStage.isAvailable(IR))
  53. Err = FirstStage.execute(IR);
  54. // Update stages in preparation for a new cycle.
  55. for (const std::unique_ptr<Stage> &S : Stages) {
  56. Err = S->cycleEnd();
  57. if (Err)
  58. break;
  59. }
  60. return Err;
  61. }
  62. void Pipeline::appendStage(std::unique_ptr<Stage> S) {
  63. assert(S && "Invalid null stage in input!");
  64. if (!Stages.empty()) {
  65. Stage *Last = Stages.back().get();
  66. Last->setNextInSequence(S.get());
  67. }
  68. Stages.push_back(std::move(S));
  69. }
  70. void Pipeline::notifyCycleBegin() {
  71. LLVM_DEBUG(dbgs() << "\n[E] Cycle begin: " << Cycles << '\n');
  72. for (HWEventListener *Listener : Listeners)
  73. Listener->onCycleBegin();
  74. }
  75. void Pipeline::notifyCycleEnd() {
  76. LLVM_DEBUG(dbgs() << "[E] Cycle end: " << Cycles << "\n");
  77. for (HWEventListener *Listener : Listeners)
  78. Listener->onCycleEnd();
  79. }
  80. } // namespace mca.
  81. } // namespace llvm