LivePhysRegs.h 7.9 KB

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  1. #pragma once
  2. #ifdef __GNUC__
  3. #pragma GCC diagnostic push
  4. #pragma GCC diagnostic ignored "-Wunused-parameter"
  5. #endif
  6. //===- llvm/CodeGen/LivePhysRegs.h - Live Physical Register Set -*- C++ -*-===//
  7. //
  8. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  9. // See https://llvm.org/LICENSE.txt for license information.
  10. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  11. //
  12. //===----------------------------------------------------------------------===//
  13. //
  14. /// \file
  15. /// This file implements the LivePhysRegs utility for tracking liveness of
  16. /// physical registers. This can be used for ad-hoc liveness tracking after
  17. /// register allocation. You can start with the live-ins/live-outs at the
  18. /// beginning/end of a block and update the information while walking the
  19. /// instructions inside the block. This implementation tracks the liveness on a
  20. /// sub-register granularity.
  21. ///
  22. /// We assume that the high bits of a physical super-register are not preserved
  23. /// unless the instruction has an implicit-use operand reading the super-
  24. /// register.
  25. ///
  26. /// X86 Example:
  27. /// %ymm0 = ...
  28. /// %xmm0 = ... (Kills %xmm0, all %xmm0s sub-registers, and %ymm0)
  29. ///
  30. /// %ymm0 = ...
  31. /// %xmm0 = ..., implicit %ymm0 (%ymm0 and all its sub-registers are alive)
  32. //===----------------------------------------------------------------------===//
  33. #ifndef LLVM_CODEGEN_LIVEPHYSREGS_H
  34. #define LLVM_CODEGEN_LIVEPHYSREGS_H
  35. #include "llvm/ADT/SparseSet.h"
  36. #include "llvm/CodeGen/MachineBasicBlock.h"
  37. #include "llvm/CodeGen/TargetRegisterInfo.h"
  38. #include "llvm/MC/MCRegister.h"
  39. #include "llvm/MC/MCRegisterInfo.h"
  40. #include <cassert>
  41. #include <utility>
  42. namespace llvm {
  43. class MachineInstr;
  44. class MachineFunction;
  45. class MachineOperand;
  46. class MachineRegisterInfo;
  47. class raw_ostream;
  48. /// A set of physical registers with utility functions to track liveness
  49. /// when walking backward/forward through a basic block.
  50. class LivePhysRegs {
  51. const TargetRegisterInfo *TRI = nullptr;
  52. using RegisterSet = SparseSet<MCPhysReg, identity<MCPhysReg>>;
  53. RegisterSet LiveRegs;
  54. public:
  55. /// Constructs an unitialized set. init() needs to be called to initialize it.
  56. LivePhysRegs() = default;
  57. /// Constructs and initializes an empty set.
  58. LivePhysRegs(const TargetRegisterInfo &TRI) : TRI(&TRI) {
  59. LiveRegs.setUniverse(TRI.getNumRegs());
  60. }
  61. LivePhysRegs(const LivePhysRegs&) = delete;
  62. LivePhysRegs &operator=(const LivePhysRegs&) = delete;
  63. /// (re-)initializes and clears the set.
  64. void init(const TargetRegisterInfo &TRI) {
  65. this->TRI = &TRI;
  66. LiveRegs.clear();
  67. LiveRegs.setUniverse(TRI.getNumRegs());
  68. }
  69. /// Clears the set.
  70. void clear() { LiveRegs.clear(); }
  71. /// Returns true if the set is empty.
  72. bool empty() const { return LiveRegs.empty(); }
  73. /// Adds a physical register and all its sub-registers to the set.
  74. void addReg(MCPhysReg Reg) {
  75. assert(TRI && "LivePhysRegs is not initialized.");
  76. assert(Reg <= TRI->getNumRegs() && "Expected a physical register.");
  77. for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
  78. SubRegs.isValid(); ++SubRegs)
  79. LiveRegs.insert(*SubRegs);
  80. }
  81. /// Removes a physical register, all its sub-registers, and all its
  82. /// super-registers from the set.
  83. void removeReg(MCPhysReg Reg) {
  84. assert(TRI && "LivePhysRegs is not initialized.");
  85. assert(Reg <= TRI->getNumRegs() && "Expected a physical register.");
  86. for (MCRegAliasIterator R(Reg, TRI, true); R.isValid(); ++R)
  87. LiveRegs.erase(*R);
  88. }
  89. /// Removes physical registers clobbered by the regmask operand \p MO.
  90. void removeRegsInMask(const MachineOperand &MO,
  91. SmallVectorImpl<std::pair<MCPhysReg, const MachineOperand*>> *Clobbers =
  92. nullptr);
  93. /// Returns true if register \p Reg is contained in the set. This also
  94. /// works if only the super register of \p Reg has been defined, because
  95. /// addReg() always adds all sub-registers to the set as well.
  96. /// Note: Returns false if just some sub registers are live, use available()
  97. /// when searching a free register.
  98. bool contains(MCPhysReg Reg) const { return LiveRegs.count(Reg); }
  99. /// Returns true if register \p Reg and no aliasing register is in the set.
  100. bool available(const MachineRegisterInfo &MRI, MCPhysReg Reg) const;
  101. /// Remove defined registers and regmask kills from the set.
  102. void removeDefs(const MachineInstr &MI);
  103. /// Add uses to the set.
  104. void addUses(const MachineInstr &MI);
  105. /// Simulates liveness when stepping backwards over an instruction(bundle).
  106. /// Remove Defs, add uses. This is the recommended way of calculating
  107. /// liveness.
  108. void stepBackward(const MachineInstr &MI);
  109. /// Simulates liveness when stepping forward over an instruction(bundle).
  110. /// Remove killed-uses, add defs. This is the not recommended way, because it
  111. /// depends on accurate kill flags. If possible use stepBackward() instead of
  112. /// this function. The clobbers set will be the list of registers either
  113. /// defined or clobbered by a regmask. The operand will identify whether this
  114. /// is a regmask or register operand.
  115. void stepForward(const MachineInstr &MI,
  116. SmallVectorImpl<std::pair<MCPhysReg, const MachineOperand*>> &Clobbers);
  117. /// Adds all live-in registers of basic block \p MBB.
  118. /// Live in registers are the registers in the blocks live-in list and the
  119. /// pristine registers.
  120. void addLiveIns(const MachineBasicBlock &MBB);
  121. /// Adds all live-in registers of basic block \p MBB but skips pristine
  122. /// registers.
  123. void addLiveInsNoPristines(const MachineBasicBlock &MBB);
  124. /// Adds all live-out registers of basic block \p MBB.
  125. /// Live out registers are the union of the live-in registers of the successor
  126. /// blocks and pristine registers. Live out registers of the end block are the
  127. /// callee saved registers.
  128. /// If a register is not added by this method, it is guaranteed to not be
  129. /// live out from MBB, although a sub-register may be. This is true
  130. /// both before and after regalloc.
  131. void addLiveOuts(const MachineBasicBlock &MBB);
  132. /// Adds all live-out registers of basic block \p MBB but skips pristine
  133. /// registers.
  134. void addLiveOutsNoPristines(const MachineBasicBlock &MBB);
  135. using const_iterator = RegisterSet::const_iterator;
  136. const_iterator begin() const { return LiveRegs.begin(); }
  137. const_iterator end() const { return LiveRegs.end(); }
  138. /// Prints the currently live registers to \p OS.
  139. void print(raw_ostream &OS) const;
  140. /// Dumps the currently live registers to the debug output.
  141. void dump() const;
  142. private:
  143. /// Adds live-in registers from basic block \p MBB, taking associated
  144. /// lane masks into consideration.
  145. void addBlockLiveIns(const MachineBasicBlock &MBB);
  146. /// Adds pristine registers. Pristine registers are callee saved registers
  147. /// that are unused in the function.
  148. void addPristines(const MachineFunction &MF);
  149. };
  150. inline raw_ostream &operator<<(raw_ostream &OS, const LivePhysRegs& LR) {
  151. LR.print(OS);
  152. return OS;
  153. }
  154. /// Computes registers live-in to \p MBB assuming all of its successors
  155. /// live-in lists are up-to-date. Puts the result into the given LivePhysReg
  156. /// instance \p LiveRegs.
  157. void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB);
  158. /// Recomputes dead and kill flags in \p MBB.
  159. void recomputeLivenessFlags(MachineBasicBlock &MBB);
  160. /// Adds registers contained in \p LiveRegs to the block live-in list of \p MBB.
  161. /// Does not add reserved registers.
  162. void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs);
  163. /// Convenience function combining computeLiveIns() and addLiveIns().
  164. void computeAndAddLiveIns(LivePhysRegs &LiveRegs,
  165. MachineBasicBlock &MBB);
  166. /// Convenience function for recomputing live-in's for \p MBB.
  167. static inline void recomputeLiveIns(MachineBasicBlock &MBB) {
  168. LivePhysRegs LPR;
  169. MBB.clearLiveIns();
  170. computeAndAddLiveIns(LPR, MBB);
  171. }
  172. } // end namespace llvm
  173. #endif // LLVM_CODEGEN_LIVEPHYSREGS_H
  174. #ifdef __GNUC__
  175. #pragma GCC diagnostic pop
  176. #endif