X86CustomBehaviour.cpp 2.0 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364
  1. //===------------------- X86CustomBehaviour.cpp -----------------*-C++ -* -===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. /// \file
  9. ///
  10. /// This file implements methods from the X86CustomBehaviour class.
  11. ///
  12. //===----------------------------------------------------------------------===//
  13. #include "X86CustomBehaviour.h"
  14. #include "TargetInfo/X86TargetInfo.h"
  15. #include "X86InstrInfo.h"
  16. #include "llvm/MC/TargetRegistry.h"
  17. #include "llvm/Support/WithColor.h"
  18. namespace llvm {
  19. namespace mca {
  20. void X86InstrPostProcess::setMemBarriers(std::unique_ptr<Instruction> &Inst,
  21. const MCInst &MCI) {
  22. switch (MCI.getOpcode()) {
  23. case X86::MFENCE:
  24. Inst->setLoadBarrier(true);
  25. Inst->setStoreBarrier(true);
  26. break;
  27. case X86::LFENCE:
  28. Inst->setLoadBarrier(true);
  29. break;
  30. case X86::SFENCE:
  31. Inst->setStoreBarrier(true);
  32. break;
  33. }
  34. }
  35. void X86InstrPostProcess::postProcessInstruction(
  36. std::unique_ptr<Instruction> &Inst, const MCInst &MCI) {
  37. // Currently, we only modify certain instructions' IsALoadBarrier and
  38. // IsAStoreBarrier flags.
  39. setMemBarriers(Inst, MCI);
  40. }
  41. } // namespace mca
  42. } // namespace llvm
  43. using namespace llvm;
  44. using namespace mca;
  45. static InstrPostProcess *createX86InstrPostProcess(const MCSubtargetInfo &STI,
  46. const MCInstrInfo &MCII) {
  47. return new X86InstrPostProcess(STI, MCII);
  48. }
  49. /// Extern function to initialize the targets for the X86 backend
  50. extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86TargetMCA() {
  51. TargetRegistry::RegisterInstrPostProcess(getTheX86_32Target(),
  52. createX86InstrPostProcess);
  53. TargetRegistry::RegisterInstrPostProcess(getTheX86_64Target(),
  54. createX86InstrPostProcess);
  55. }