PPCFrameLowering.h 7.5 KB

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  1. //===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. //
  10. //===----------------------------------------------------------------------===//
  11. #ifndef LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H
  12. #define LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H
  13. #include "llvm/ADT/STLExtras.h"
  14. #include "llvm/CodeGen/TargetFrameLowering.h"
  15. #include "llvm/Target/TargetMachine.h"
  16. namespace llvm {
  17. class PPCSubtarget;
  18. class PPCFrameLowering: public TargetFrameLowering {
  19. const PPCSubtarget &Subtarget;
  20. const unsigned ReturnSaveOffset;
  21. const unsigned TOCSaveOffset;
  22. const unsigned FramePointerSaveOffset;
  23. const unsigned LinkageSize;
  24. const unsigned BasePointerSaveOffset;
  25. const unsigned CRSaveOffset;
  26. /**
  27. * Find register[s] that can be used in function prologue and epilogue
  28. *
  29. * Find register[s] that can be use as scratch register[s] in function
  30. * prologue and epilogue to save various registers (Link Register, Base
  31. * Pointer, etc.). Prefer R0/R12, if available. Otherwise choose whatever
  32. * register[s] are available.
  33. *
  34. * This method will return true if it is able to find enough unique scratch
  35. * registers (1 or 2 depending on the requirement). If it is unable to find
  36. * enough available registers in the block, it will return false and set
  37. * any passed output parameter that corresponds to a required unique register
  38. * to PPC::NoRegister.
  39. *
  40. * \param[in] MBB The machine basic block to find an available register for
  41. * \param[in] UseAtEnd Specify whether the scratch register will be used at
  42. * the end of the basic block (i.e., will the scratch
  43. * register kill a register defined in the basic block)
  44. * \param[in] TwoUniqueRegsRequired Specify whether this basic block will
  45. * require two unique scratch registers.
  46. * \param[out] SR1 The scratch register to use
  47. * \param[out] SR2 The second scratch register. If this pointer is not null
  48. * the function will attempt to set it to an available
  49. * register regardless of whether there is a hard requirement
  50. * for two unique scratch registers.
  51. * \return true if the required number of registers was found.
  52. * false if the required number of scratch register weren't available.
  53. * If either output parameter refers to a required scratch register
  54. * that isn't available, it will be set to an invalid value.
  55. */
  56. bool findScratchRegister(MachineBasicBlock *MBB,
  57. bool UseAtEnd,
  58. bool TwoUniqueRegsRequired = false,
  59. Register *SR1 = nullptr,
  60. Register *SR2 = nullptr) const;
  61. bool twoUniqueScratchRegsRequired(MachineBasicBlock *MBB) const;
  62. /**
  63. * Create branch instruction for PPC::TCRETURN* (tail call return)
  64. *
  65. * \param[in] MBB that is terminated by PPC::TCRETURN*
  66. */
  67. void createTailCallBranchInstr(MachineBasicBlock &MBB) const;
  68. /**
  69. * Check if the conditions are correct to allow for the stack update
  70. * to be moved past the CSR save/restore code.
  71. */
  72. bool stackUpdateCanBeMoved(MachineFunction &MF) const;
  73. public:
  74. PPCFrameLowering(const PPCSubtarget &STI);
  75. /**
  76. * Determine the frame layout and update the machine function.
  77. */
  78. unsigned determineFrameLayoutAndUpdate(MachineFunction &MF,
  79. bool UseEstimate = false) const;
  80. /**
  81. * Determine the frame layout but do not update the machine function.
  82. * The MachineFunction object can be const in this case as it is not
  83. * modified.
  84. */
  85. unsigned determineFrameLayout(const MachineFunction &MF,
  86. bool UseEstimate = false,
  87. unsigned *NewMaxCallFrameSize = nullptr) const;
  88. /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
  89. /// the function.
  90. void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
  91. void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
  92. void inlineStackProbe(MachineFunction &MF,
  93. MachineBasicBlock &PrologMBB) const override;
  94. bool hasFP(const MachineFunction &MF) const override;
  95. bool needsFP(const MachineFunction &MF) const;
  96. void replaceFPWithRealFP(MachineFunction &MF) const;
  97. void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
  98. RegScavenger *RS = nullptr) const override;
  99. void processFunctionBeforeFrameFinalized(MachineFunction &MF,
  100. RegScavenger *RS = nullptr) const override;
  101. void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const;
  102. bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
  103. MachineBasicBlock::iterator MI,
  104. ArrayRef<CalleeSavedInfo> CSI,
  105. const TargetRegisterInfo *TRI) const override;
  106. /// This function will assign callee saved gprs to volatile vector registers
  107. /// for prologue spills when applicable. It returns false if there are any
  108. /// registers which were not spilled to volatile vector registers.
  109. bool
  110. assignCalleeSavedSpillSlots(MachineFunction &MF,
  111. const TargetRegisterInfo *TRI,
  112. std::vector<CalleeSavedInfo> &CSI) const override;
  113. MachineBasicBlock::iterator
  114. eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
  115. MachineBasicBlock::iterator I) const override;
  116. bool
  117. restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
  118. MachineBasicBlock::iterator MI,
  119. MutableArrayRef<CalleeSavedInfo> CSI,
  120. const TargetRegisterInfo *TRI) const override;
  121. /// targetHandlesStackFrameRounding - Returns true if the target is
  122. /// responsible for rounding up the stack frame (probably at emitPrologue
  123. /// time).
  124. bool targetHandlesStackFrameRounding() const override { return true; }
  125. /// getReturnSaveOffset - Return the previous frame offset to save the
  126. /// return address.
  127. unsigned getReturnSaveOffset() const { return ReturnSaveOffset; }
  128. /// getTOCSaveOffset - Return the previous frame offset to save the
  129. /// TOC register -- 64-bit SVR4 ABI only.
  130. unsigned getTOCSaveOffset() const;
  131. /// getFramePointerSaveOffset - Return the previous frame offset to save the
  132. /// frame pointer.
  133. unsigned getFramePointerSaveOffset() const;
  134. /// getBasePointerSaveOffset - Return the previous frame offset to save the
  135. /// base pointer.
  136. unsigned getBasePointerSaveOffset() const;
  137. /// getLinkageSize - Return the size of the PowerPC ABI linkage area.
  138. ///
  139. unsigned getLinkageSize() const { return LinkageSize; }
  140. const SpillSlot *
  141. getCalleeSavedSpillSlots(unsigned &NumEntries) const override;
  142. bool enableShrinkWrapping(const MachineFunction &MF) const override;
  143. /// Methods used by shrink wrapping to determine if MBB can be used for the
  144. /// function prologue/epilogue.
  145. bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
  146. bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override;
  147. };
  148. } // End llvm namespace
  149. #endif