IntrinsicsWebAssembly.td 15 KB

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  1. //===- IntrinsicsWebAssembly.td - Defines wasm intrinsics --*- tablegen -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. ///
  9. /// \file
  10. /// This file defines all of the WebAssembly-specific intrinsics.
  11. ///
  12. //===----------------------------------------------------------------------===//
  13. // Type definition for a table in an intrinsic
  14. def llvm_table_ty : LLVMQualPointerType<llvm_i8_ty, 1>;
  15. let TargetPrefix = "wasm" in { // All intrinsics start with "llvm.wasm.".
  16. // Query the current memory size, and increase the current memory size.
  17. // Note that memory.size is not IntrNoMem because it must be sequenced with
  18. // respect to memory.grow calls.
  19. def int_wasm_memory_size :
  20. DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty], [IntrReadMem]>;
  21. def int_wasm_memory_grow :
  22. DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty, LLVMMatchType<0>], []>;
  23. //===----------------------------------------------------------------------===//
  24. // ref.null intrinsics
  25. //===----------------------------------------------------------------------===//
  26. def int_wasm_ref_null_extern :
  27. DefaultAttrsIntrinsic<[llvm_externref_ty], [], [IntrNoMem]>;
  28. def int_wasm_ref_null_func :
  29. DefaultAttrsIntrinsic<[llvm_funcref_ty], [], [IntrNoMem]>;
  30. def int_wasm_ref_is_null_extern :
  31. DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_externref_ty], [IntrNoMem],
  32. "llvm.wasm.ref.is_null.extern">;
  33. def int_wasm_ref_is_null_func :
  34. DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_funcref_ty],
  35. [IntrNoMem], "llvm.wasm.ref.is_null.func">;
  36. //===----------------------------------------------------------------------===//
  37. // Table intrinsics
  38. //===----------------------------------------------------------------------===//
  39. def int_wasm_table_set_externref :
  40. DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_externref_ty],
  41. [IntrWriteMem]>;
  42. def int_wasm_table_set_funcref :
  43. DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_funcref_ty],
  44. [IntrWriteMem]>;
  45. def int_wasm_table_get_externref :
  46. DefaultAttrsIntrinsic<[llvm_externref_ty], [llvm_table_ty, llvm_i32_ty],
  47. [IntrReadMem]>;
  48. def int_wasm_table_get_funcref :
  49. DefaultAttrsIntrinsic<[llvm_funcref_ty], [llvm_table_ty, llvm_i32_ty],
  50. [IntrReadMem]>;
  51. // Query the current table size, and increase the current table size.
  52. def int_wasm_table_size :
  53. DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_table_ty], [IntrReadMem]>;
  54. def int_wasm_table_copy :
  55. DefaultAttrsIntrinsic<[],
  56. [llvm_table_ty, llvm_table_ty, llvm_i32_ty, llvm_i32_ty,
  57. llvm_i32_ty], []>;
  58. def int_wasm_table_grow_externref :
  59. DefaultAttrsIntrinsic<[llvm_i32_ty],
  60. [llvm_table_ty, llvm_externref_ty, llvm_i32_ty], []>;
  61. def int_wasm_table_grow_funcref :
  62. DefaultAttrsIntrinsic<[llvm_i32_ty],
  63. [llvm_table_ty, llvm_funcref_ty, llvm_i32_ty], []>;
  64. def int_wasm_table_fill_externref :
  65. DefaultAttrsIntrinsic<[],
  66. [llvm_table_ty, llvm_i32_ty, llvm_externref_ty,
  67. llvm_i32_ty], []>;
  68. def int_wasm_table_fill_funcref :
  69. DefaultAttrsIntrinsic<[],
  70. [llvm_table_ty, llvm_i32_ty, llvm_funcref_ty,
  71. llvm_i32_ty], []>;
  72. //===----------------------------------------------------------------------===//
  73. // Trapping float-to-int conversions
  74. //===----------------------------------------------------------------------===//
  75. // These don't use default attributes, because they are not willreturn.
  76. def int_wasm_trunc_signed : Intrinsic<[llvm_anyint_ty],
  77. [llvm_anyfloat_ty],
  78. [IntrNoMem]>;
  79. def int_wasm_trunc_unsigned : Intrinsic<[llvm_anyint_ty],
  80. [llvm_anyfloat_ty],
  81. [IntrNoMem]>;
  82. //===----------------------------------------------------------------------===//
  83. // Saturating float-to-int conversions
  84. //===----------------------------------------------------------------------===//
  85. def int_wasm_trunc_saturate_signed :
  86. DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty],
  87. [IntrNoMem, IntrSpeculatable]>;
  88. def int_wasm_trunc_saturate_unsigned :
  89. DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty],
  90. [IntrNoMem, IntrSpeculatable]>;
  91. //===----------------------------------------------------------------------===//
  92. // Exception handling intrinsics
  93. //===----------------------------------------------------------------------===//
  94. // throw / rethrow
  95. // The first immediate argument is an index to a tag, which is 0 for C++
  96. // exception. The second argument is the thrown exception pointer.
  97. def int_wasm_throw : Intrinsic<[], [llvm_i32_ty, llvm_ptr_ty],
  98. [Throws, IntrNoReturn, ImmArg<ArgIndex<0>>]>;
  99. def int_wasm_rethrow : Intrinsic<[], [], [Throws, IntrNoReturn]>;
  100. // Since wasm does not use landingpad instructions, these instructions return
  101. // exception pointer and selector values until we lower them in WasmEHPrepare.
  102. def int_wasm_get_exception :
  103. DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_token_ty], [IntrHasSideEffects]>;
  104. def int_wasm_get_ehselector :
  105. DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_token_ty], [IntrHasSideEffects]>;
  106. // wasm.catch returns the pointer to the exception object caught by wasm 'catch'
  107. // instruction. This returns a single pointer, which is the case for C++
  108. // exceptions. The immediate argument is an index to for a tag, which is 0 for
  109. // C++ exceptions.
  110. def int_wasm_catch :
  111. DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_i32_ty],
  112. [IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
  113. // WebAssembly EH must maintain the landingpads in the order assigned to them
  114. // by WasmEHPrepare pass to generate landingpad table in EHStreamer. This is
  115. // used in order to give them the indices in WasmEHPrepare.
  116. def int_wasm_landingpad_index :
  117. DefaultAttrsIntrinsic<[], [llvm_token_ty, llvm_i32_ty],
  118. [IntrNoMem, ImmArg<ArgIndex<1>>]>;
  119. // Returns LSDA address of the current function.
  120. def int_wasm_lsda : DefaultAttrsIntrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
  121. //===----------------------------------------------------------------------===//
  122. // Atomic intrinsics
  123. //===----------------------------------------------------------------------===//
  124. // wait / notify
  125. // These don't use default attributes, because they are not nosync.
  126. def int_wasm_memory_atomic_wait32 :
  127. Intrinsic<[llvm_i32_ty],
  128. [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty, llvm_i64_ty],
  129. [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
  130. NoCapture<ArgIndex<0>>, IntrHasSideEffects],
  131. "", [SDNPMemOperand]>;
  132. def int_wasm_memory_atomic_wait64 :
  133. Intrinsic<[llvm_i32_ty],
  134. [LLVMPointerType<llvm_i64_ty>, llvm_i64_ty, llvm_i64_ty],
  135. [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
  136. NoCapture<ArgIndex<0>>, IntrHasSideEffects],
  137. "", [SDNPMemOperand]>;
  138. def int_wasm_memory_atomic_notify:
  139. Intrinsic<[llvm_i32_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty],
  140. [IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>,
  141. IntrHasSideEffects],
  142. "", [SDNPMemOperand]>;
  143. //===----------------------------------------------------------------------===//
  144. // SIMD intrinsics
  145. //===----------------------------------------------------------------------===//
  146. def int_wasm_swizzle :
  147. DefaultAttrsIntrinsic<[llvm_v16i8_ty],
  148. [llvm_v16i8_ty, llvm_v16i8_ty],
  149. [IntrNoMem, IntrSpeculatable]>;
  150. def int_wasm_shuffle :
  151. DefaultAttrsIntrinsic<[llvm_v16i8_ty],
  152. [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty,
  153. llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
  154. llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
  155. llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
  156. llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
  157. [IntrNoMem, IntrSpeculatable]>;
  158. def int_wasm_sub_sat_signed :
  159. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  160. [LLVMMatchType<0>, LLVMMatchType<0>],
  161. [IntrNoMem, IntrSpeculatable]>;
  162. def int_wasm_sub_sat_unsigned :
  163. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  164. [LLVMMatchType<0>, LLVMMatchType<0>],
  165. [IntrNoMem, IntrSpeculatable]>;
  166. def int_wasm_avgr_unsigned :
  167. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  168. [LLVMMatchType<0>, LLVMMatchType<0>],
  169. [IntrNoMem, IntrSpeculatable]>;
  170. def int_wasm_bitselect :
  171. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  172. [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
  173. [IntrNoMem, IntrSpeculatable]>;
  174. def int_wasm_anytrue :
  175. DefaultAttrsIntrinsic<[llvm_i32_ty],
  176. [llvm_anyvector_ty],
  177. [IntrNoMem, IntrSpeculatable]>;
  178. def int_wasm_alltrue :
  179. DefaultAttrsIntrinsic<[llvm_i32_ty],
  180. [llvm_anyvector_ty],
  181. [IntrNoMem, IntrSpeculatable]>;
  182. def int_wasm_bitmask :
  183. DefaultAttrsIntrinsic<[llvm_i32_ty],
  184. [llvm_anyvector_ty],
  185. [IntrNoMem, IntrSpeculatable]>;
  186. def int_wasm_dot :
  187. DefaultAttrsIntrinsic<[llvm_v4i32_ty],
  188. [llvm_v8i16_ty, llvm_v8i16_ty],
  189. [IntrNoMem, IntrSpeculatable]>;
  190. def int_wasm_narrow_signed :
  191. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  192. [llvm_anyvector_ty, LLVMMatchType<1>],
  193. [IntrNoMem, IntrSpeculatable]>;
  194. def int_wasm_narrow_unsigned :
  195. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  196. [llvm_anyvector_ty, LLVMMatchType<1>],
  197. [IntrNoMem, IntrSpeculatable]>;
  198. def int_wasm_q15mulr_sat_signed :
  199. DefaultAttrsIntrinsic<[llvm_v8i16_ty],
  200. [llvm_v8i16_ty, llvm_v8i16_ty],
  201. [IntrNoMem, IntrSpeculatable]>;
  202. def int_wasm_pmin :
  203. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  204. [LLVMMatchType<0>, LLVMMatchType<0>],
  205. [IntrNoMem, IntrSpeculatable]>;
  206. def int_wasm_pmax :
  207. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  208. [LLVMMatchType<0>, LLVMMatchType<0>],
  209. [IntrNoMem, IntrSpeculatable]>;
  210. def int_wasm_extadd_pairwise_signed :
  211. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  212. [LLVMSubdivide2VectorType<0>],
  213. [IntrNoMem, IntrSpeculatable]>;
  214. def int_wasm_extadd_pairwise_unsigned :
  215. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  216. [LLVMSubdivide2VectorType<0>],
  217. [IntrNoMem, IntrSpeculatable]>;
  218. //===----------------------------------------------------------------------===//
  219. // Relaxed SIMD intrinsics (experimental)
  220. //===----------------------------------------------------------------------===//
  221. def int_wasm_relaxed_madd :
  222. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  223. [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
  224. [IntrNoMem, IntrSpeculatable]>;
  225. def int_wasm_relaxed_nmadd :
  226. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  227. [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
  228. [IntrNoMem, IntrSpeculatable]>;
  229. def int_wasm_relaxed_laneselect :
  230. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  231. [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
  232. [IntrNoMem, IntrSpeculatable]>;
  233. def int_wasm_relaxed_swizzle :
  234. DefaultAttrsIntrinsic<[llvm_v16i8_ty],
  235. [llvm_v16i8_ty, llvm_v16i8_ty],
  236. [IntrNoMem, IntrSpeculatable]>;
  237. def int_wasm_relaxed_min :
  238. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  239. [LLVMMatchType<0>, LLVMMatchType<0>],
  240. [IntrNoMem, IntrSpeculatable]>;
  241. def int_wasm_relaxed_max :
  242. DefaultAttrsIntrinsic<[llvm_anyvector_ty],
  243. [LLVMMatchType<0>, LLVMMatchType<0>],
  244. [IntrNoMem, IntrSpeculatable]>;
  245. def int_wasm_relaxed_trunc_signed:
  246. DefaultAttrsIntrinsic<[llvm_v4i32_ty],
  247. [llvm_v4f32_ty],
  248. [IntrNoMem, IntrSpeculatable]>;
  249. def int_wasm_relaxed_trunc_unsigned:
  250. DefaultAttrsIntrinsic<[llvm_v4i32_ty],
  251. [llvm_v4f32_ty],
  252. [IntrNoMem, IntrSpeculatable]>;
  253. def int_wasm_relaxed_trunc_signed_zero:
  254. DefaultAttrsIntrinsic<[llvm_v4i32_ty],
  255. [llvm_v2f64_ty],
  256. [IntrNoMem, IntrSpeculatable]>;
  257. def int_wasm_relaxed_trunc_unsigned_zero:
  258. DefaultAttrsIntrinsic<[llvm_v4i32_ty],
  259. [llvm_v2f64_ty],
  260. [IntrNoMem, IntrSpeculatable]>;
  261. def int_wasm_relaxed_q15mulr_signed:
  262. DefaultAttrsIntrinsic<[llvm_v8i16_ty],
  263. [llvm_v8i16_ty, llvm_v8i16_ty],
  264. [IntrNoMem, IntrSpeculatable]>;
  265. def int_wasm_relaxed_dot_i8x16_i7x16_signed:
  266. DefaultAttrsIntrinsic<[llvm_v8i16_ty],
  267. [llvm_v16i8_ty, llvm_v16i8_ty],
  268. [IntrNoMem, IntrSpeculatable]>;
  269. def int_wasm_relaxed_dot_i8x16_i7x16_add_signed:
  270. DefaultAttrsIntrinsic<[llvm_v4i32_ty],
  271. [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty],
  272. [IntrNoMem, IntrSpeculatable]>;
  273. def int_wasm_relaxed_dot_bf16x8_add_f32:
  274. DefaultAttrsIntrinsic<[llvm_v4f32_ty],
  275. [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4f32_ty],
  276. [IntrNoMem, IntrSpeculatable]>;
  277. //===----------------------------------------------------------------------===//
  278. // Thread-local storage intrinsics
  279. //===----------------------------------------------------------------------===//
  280. def int_wasm_tls_size :
  281. DefaultAttrsIntrinsic<[llvm_anyint_ty],
  282. [],
  283. [IntrNoMem, IntrSpeculatable]>;
  284. def int_wasm_tls_align :
  285. DefaultAttrsIntrinsic<[llvm_anyint_ty],
  286. [],
  287. [IntrNoMem, IntrSpeculatable]>;
  288. def int_wasm_tls_base :
  289. DefaultAttrsIntrinsic<[llvm_ptr_ty],
  290. [],
  291. [IntrReadMem]>;
  292. } // TargetPrefix = "wasm"