ThreadSanitizer.cpp 34 KB

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  1. //===-- ThreadSanitizer.cpp - race detector -------------------------------===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // This file is a part of ThreadSanitizer, a race detector.
  10. //
  11. // The tool is under development, for the details about previous versions see
  12. // http://code.google.com/p/data-race-test
  13. //
  14. // The instrumentation phase is quite simple:
  15. // - Insert calls to run-time library before every memory access.
  16. // - Optimizations may apply to avoid instrumenting some of the accesses.
  17. // - Insert calls at function entry/exit.
  18. // The rest is handled by the run-time library.
  19. //===----------------------------------------------------------------------===//
  20. #include "llvm/Transforms/Instrumentation/ThreadSanitizer.h"
  21. #include "llvm/ADT/DenseMap.h"
  22. #include "llvm/ADT/SmallString.h"
  23. #include "llvm/ADT/SmallVector.h"
  24. #include "llvm/ADT/Statistic.h"
  25. #include "llvm/ADT/StringExtras.h"
  26. #include "llvm/Analysis/CaptureTracking.h"
  27. #include "llvm/Analysis/TargetLibraryInfo.h"
  28. #include "llvm/Analysis/ValueTracking.h"
  29. #include "llvm/IR/DataLayout.h"
  30. #include "llvm/IR/Function.h"
  31. #include "llvm/IR/IRBuilder.h"
  32. #include "llvm/IR/Instructions.h"
  33. #include "llvm/IR/IntrinsicInst.h"
  34. #include "llvm/IR/Intrinsics.h"
  35. #include "llvm/IR/LLVMContext.h"
  36. #include "llvm/IR/Metadata.h"
  37. #include "llvm/IR/Module.h"
  38. #include "llvm/IR/Type.h"
  39. #include "llvm/ProfileData/InstrProf.h"
  40. #include "llvm/Support/CommandLine.h"
  41. #include "llvm/Support/Debug.h"
  42. #include "llvm/Support/MathExtras.h"
  43. #include "llvm/Support/raw_ostream.h"
  44. #include "llvm/Transforms/Instrumentation.h"
  45. #include "llvm/Transforms/Utils/BasicBlockUtils.h"
  46. #include "llvm/Transforms/Utils/EscapeEnumerator.h"
  47. #include "llvm/Transforms/Utils/Local.h"
  48. #include "llvm/Transforms/Utils/ModuleUtils.h"
  49. using namespace llvm;
  50. #define DEBUG_TYPE "tsan"
  51. static cl::opt<bool> ClInstrumentMemoryAccesses(
  52. "tsan-instrument-memory-accesses", cl::init(true),
  53. cl::desc("Instrument memory accesses"), cl::Hidden);
  54. static cl::opt<bool>
  55. ClInstrumentFuncEntryExit("tsan-instrument-func-entry-exit", cl::init(true),
  56. cl::desc("Instrument function entry and exit"),
  57. cl::Hidden);
  58. static cl::opt<bool> ClHandleCxxExceptions(
  59. "tsan-handle-cxx-exceptions", cl::init(true),
  60. cl::desc("Handle C++ exceptions (insert cleanup blocks for unwinding)"),
  61. cl::Hidden);
  62. static cl::opt<bool> ClInstrumentAtomics("tsan-instrument-atomics",
  63. cl::init(true),
  64. cl::desc("Instrument atomics"),
  65. cl::Hidden);
  66. static cl::opt<bool> ClInstrumentMemIntrinsics(
  67. "tsan-instrument-memintrinsics", cl::init(true),
  68. cl::desc("Instrument memintrinsics (memset/memcpy/memmove)"), cl::Hidden);
  69. static cl::opt<bool> ClDistinguishVolatile(
  70. "tsan-distinguish-volatile", cl::init(false),
  71. cl::desc("Emit special instrumentation for accesses to volatiles"),
  72. cl::Hidden);
  73. static cl::opt<bool> ClInstrumentReadBeforeWrite(
  74. "tsan-instrument-read-before-write", cl::init(false),
  75. cl::desc("Do not eliminate read instrumentation for read-before-writes"),
  76. cl::Hidden);
  77. static cl::opt<bool> ClCompoundReadBeforeWrite(
  78. "tsan-compound-read-before-write", cl::init(false),
  79. cl::desc("Emit special compound instrumentation for reads-before-writes"),
  80. cl::Hidden);
  81. STATISTIC(NumInstrumentedReads, "Number of instrumented reads");
  82. STATISTIC(NumInstrumentedWrites, "Number of instrumented writes");
  83. STATISTIC(NumOmittedReadsBeforeWrite,
  84. "Number of reads ignored due to following writes");
  85. STATISTIC(NumAccessesWithBadSize, "Number of accesses with bad size");
  86. STATISTIC(NumInstrumentedVtableWrites, "Number of vtable ptr writes");
  87. STATISTIC(NumInstrumentedVtableReads, "Number of vtable ptr reads");
  88. STATISTIC(NumOmittedReadsFromConstantGlobals,
  89. "Number of reads from constant globals");
  90. STATISTIC(NumOmittedReadsFromVtable, "Number of vtable reads");
  91. STATISTIC(NumOmittedNonCaptured, "Number of accesses ignored due to capturing");
  92. const char kTsanModuleCtorName[] = "tsan.module_ctor";
  93. const char kTsanInitName[] = "__tsan_init";
  94. namespace {
  95. /// ThreadSanitizer: instrument the code in module to find races.
  96. ///
  97. /// Instantiating ThreadSanitizer inserts the tsan runtime library API function
  98. /// declarations into the module if they don't exist already. Instantiating
  99. /// ensures the __tsan_init function is in the list of global constructors for
  100. /// the module.
  101. struct ThreadSanitizer {
  102. ThreadSanitizer() {
  103. // Check options and warn user.
  104. if (ClInstrumentReadBeforeWrite && ClCompoundReadBeforeWrite) {
  105. errs()
  106. << "warning: Option -tsan-compound-read-before-write has no effect "
  107. "when -tsan-instrument-read-before-write is set.\n";
  108. }
  109. }
  110. bool sanitizeFunction(Function &F, const TargetLibraryInfo &TLI);
  111. private:
  112. // Internal Instruction wrapper that contains more information about the
  113. // Instruction from prior analysis.
  114. struct InstructionInfo {
  115. // Instrumentation emitted for this instruction is for a compounded set of
  116. // read and write operations in the same basic block.
  117. static constexpr unsigned kCompoundRW = (1U << 0);
  118. explicit InstructionInfo(Instruction *Inst) : Inst(Inst) {}
  119. Instruction *Inst;
  120. unsigned Flags = 0;
  121. };
  122. void initialize(Module &M, const TargetLibraryInfo &TLI);
  123. bool instrumentLoadOrStore(const InstructionInfo &II, const DataLayout &DL);
  124. bool instrumentAtomic(Instruction *I, const DataLayout &DL);
  125. bool instrumentMemIntrinsic(Instruction *I);
  126. void chooseInstructionsToInstrument(SmallVectorImpl<Instruction *> &Local,
  127. SmallVectorImpl<InstructionInfo> &All,
  128. const DataLayout &DL);
  129. bool addrPointsToConstantData(Value *Addr);
  130. int getMemoryAccessFuncIndex(Type *OrigTy, Value *Addr, const DataLayout &DL);
  131. void InsertRuntimeIgnores(Function &F);
  132. Type *IntptrTy;
  133. FunctionCallee TsanFuncEntry;
  134. FunctionCallee TsanFuncExit;
  135. FunctionCallee TsanIgnoreBegin;
  136. FunctionCallee TsanIgnoreEnd;
  137. // Accesses sizes are powers of two: 1, 2, 4, 8, 16.
  138. static const size_t kNumberOfAccessSizes = 5;
  139. FunctionCallee TsanRead[kNumberOfAccessSizes];
  140. FunctionCallee TsanWrite[kNumberOfAccessSizes];
  141. FunctionCallee TsanUnalignedRead[kNumberOfAccessSizes];
  142. FunctionCallee TsanUnalignedWrite[kNumberOfAccessSizes];
  143. FunctionCallee TsanVolatileRead[kNumberOfAccessSizes];
  144. FunctionCallee TsanVolatileWrite[kNumberOfAccessSizes];
  145. FunctionCallee TsanUnalignedVolatileRead[kNumberOfAccessSizes];
  146. FunctionCallee TsanUnalignedVolatileWrite[kNumberOfAccessSizes];
  147. FunctionCallee TsanCompoundRW[kNumberOfAccessSizes];
  148. FunctionCallee TsanUnalignedCompoundRW[kNumberOfAccessSizes];
  149. FunctionCallee TsanAtomicLoad[kNumberOfAccessSizes];
  150. FunctionCallee TsanAtomicStore[kNumberOfAccessSizes];
  151. FunctionCallee TsanAtomicRMW[AtomicRMWInst::LAST_BINOP + 1]
  152. [kNumberOfAccessSizes];
  153. FunctionCallee TsanAtomicCAS[kNumberOfAccessSizes];
  154. FunctionCallee TsanAtomicThreadFence;
  155. FunctionCallee TsanAtomicSignalFence;
  156. FunctionCallee TsanVptrUpdate;
  157. FunctionCallee TsanVptrLoad;
  158. FunctionCallee MemmoveFn, MemcpyFn, MemsetFn;
  159. };
  160. void insertModuleCtor(Module &M) {
  161. getOrCreateSanitizerCtorAndInitFunctions(
  162. M, kTsanModuleCtorName, kTsanInitName, /*InitArgTypes=*/{},
  163. /*InitArgs=*/{},
  164. // This callback is invoked when the functions are created the first
  165. // time. Hook them into the global ctors list in that case:
  166. [&](Function *Ctor, FunctionCallee) { appendToGlobalCtors(M, Ctor, 0); });
  167. }
  168. } // namespace
  169. PreservedAnalyses ThreadSanitizerPass::run(Function &F,
  170. FunctionAnalysisManager &FAM) {
  171. ThreadSanitizer TSan;
  172. if (TSan.sanitizeFunction(F, FAM.getResult<TargetLibraryAnalysis>(F)))
  173. return PreservedAnalyses::none();
  174. return PreservedAnalyses::all();
  175. }
  176. PreservedAnalyses ModuleThreadSanitizerPass::run(Module &M,
  177. ModuleAnalysisManager &MAM) {
  178. insertModuleCtor(M);
  179. return PreservedAnalyses::none();
  180. }
  181. void ThreadSanitizer::initialize(Module &M, const TargetLibraryInfo &TLI) {
  182. const DataLayout &DL = M.getDataLayout();
  183. LLVMContext &Ctx = M.getContext();
  184. IntptrTy = DL.getIntPtrType(Ctx);
  185. IRBuilder<> IRB(Ctx);
  186. AttributeList Attr;
  187. Attr = Attr.addFnAttribute(Ctx, Attribute::NoUnwind);
  188. // Initialize the callbacks.
  189. TsanFuncEntry = M.getOrInsertFunction("__tsan_func_entry", Attr,
  190. IRB.getVoidTy(), IRB.getInt8PtrTy());
  191. TsanFuncExit =
  192. M.getOrInsertFunction("__tsan_func_exit", Attr, IRB.getVoidTy());
  193. TsanIgnoreBegin = M.getOrInsertFunction("__tsan_ignore_thread_begin", Attr,
  194. IRB.getVoidTy());
  195. TsanIgnoreEnd =
  196. M.getOrInsertFunction("__tsan_ignore_thread_end", Attr, IRB.getVoidTy());
  197. IntegerType *OrdTy = IRB.getInt32Ty();
  198. for (size_t i = 0; i < kNumberOfAccessSizes; ++i) {
  199. const unsigned ByteSize = 1U << i;
  200. const unsigned BitSize = ByteSize * 8;
  201. std::string ByteSizeStr = utostr(ByteSize);
  202. std::string BitSizeStr = utostr(BitSize);
  203. SmallString<32> ReadName("__tsan_read" + ByteSizeStr);
  204. TsanRead[i] = M.getOrInsertFunction(ReadName, Attr, IRB.getVoidTy(),
  205. IRB.getInt8PtrTy());
  206. SmallString<32> WriteName("__tsan_write" + ByteSizeStr);
  207. TsanWrite[i] = M.getOrInsertFunction(WriteName, Attr, IRB.getVoidTy(),
  208. IRB.getInt8PtrTy());
  209. SmallString<64> UnalignedReadName("__tsan_unaligned_read" + ByteSizeStr);
  210. TsanUnalignedRead[i] = M.getOrInsertFunction(
  211. UnalignedReadName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
  212. SmallString<64> UnalignedWriteName("__tsan_unaligned_write" + ByteSizeStr);
  213. TsanUnalignedWrite[i] = M.getOrInsertFunction(
  214. UnalignedWriteName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
  215. SmallString<64> VolatileReadName("__tsan_volatile_read" + ByteSizeStr);
  216. TsanVolatileRead[i] = M.getOrInsertFunction(
  217. VolatileReadName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
  218. SmallString<64> VolatileWriteName("__tsan_volatile_write" + ByteSizeStr);
  219. TsanVolatileWrite[i] = M.getOrInsertFunction(
  220. VolatileWriteName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
  221. SmallString<64> UnalignedVolatileReadName("__tsan_unaligned_volatile_read" +
  222. ByteSizeStr);
  223. TsanUnalignedVolatileRead[i] = M.getOrInsertFunction(
  224. UnalignedVolatileReadName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
  225. SmallString<64> UnalignedVolatileWriteName(
  226. "__tsan_unaligned_volatile_write" + ByteSizeStr);
  227. TsanUnalignedVolatileWrite[i] = M.getOrInsertFunction(
  228. UnalignedVolatileWriteName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
  229. SmallString<64> CompoundRWName("__tsan_read_write" + ByteSizeStr);
  230. TsanCompoundRW[i] = M.getOrInsertFunction(
  231. CompoundRWName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
  232. SmallString<64> UnalignedCompoundRWName("__tsan_unaligned_read_write" +
  233. ByteSizeStr);
  234. TsanUnalignedCompoundRW[i] = M.getOrInsertFunction(
  235. UnalignedCompoundRWName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
  236. Type *Ty = Type::getIntNTy(Ctx, BitSize);
  237. Type *PtrTy = Ty->getPointerTo();
  238. SmallString<32> AtomicLoadName("__tsan_atomic" + BitSizeStr + "_load");
  239. TsanAtomicLoad[i] =
  240. M.getOrInsertFunction(AtomicLoadName,
  241. TLI.getAttrList(&Ctx, {1}, /*Signed=*/true,
  242. /*Ret=*/BitSize <= 32, Attr),
  243. Ty, PtrTy, OrdTy);
  244. // Args of type Ty need extension only when BitSize is 32 or less.
  245. using Idxs = std::vector<unsigned>;
  246. Idxs Idxs2Or12 ((BitSize <= 32) ? Idxs({1, 2}) : Idxs({2}));
  247. Idxs Idxs34Or1234((BitSize <= 32) ? Idxs({1, 2, 3, 4}) : Idxs({3, 4}));
  248. SmallString<32> AtomicStoreName("__tsan_atomic" + BitSizeStr + "_store");
  249. TsanAtomicStore[i] = M.getOrInsertFunction(
  250. AtomicStoreName,
  251. TLI.getAttrList(&Ctx, Idxs2Or12, /*Signed=*/true, /*Ret=*/false, Attr),
  252. IRB.getVoidTy(), PtrTy, Ty, OrdTy);
  253. for (unsigned Op = AtomicRMWInst::FIRST_BINOP;
  254. Op <= AtomicRMWInst::LAST_BINOP; ++Op) {
  255. TsanAtomicRMW[Op][i] = nullptr;
  256. const char *NamePart = nullptr;
  257. if (Op == AtomicRMWInst::Xchg)
  258. NamePart = "_exchange";
  259. else if (Op == AtomicRMWInst::Add)
  260. NamePart = "_fetch_add";
  261. else if (Op == AtomicRMWInst::Sub)
  262. NamePart = "_fetch_sub";
  263. else if (Op == AtomicRMWInst::And)
  264. NamePart = "_fetch_and";
  265. else if (Op == AtomicRMWInst::Or)
  266. NamePart = "_fetch_or";
  267. else if (Op == AtomicRMWInst::Xor)
  268. NamePart = "_fetch_xor";
  269. else if (Op == AtomicRMWInst::Nand)
  270. NamePart = "_fetch_nand";
  271. else
  272. continue;
  273. SmallString<32> RMWName("__tsan_atomic" + itostr(BitSize) + NamePart);
  274. TsanAtomicRMW[Op][i] = M.getOrInsertFunction(
  275. RMWName,
  276. TLI.getAttrList(&Ctx, Idxs2Or12, /*Signed=*/true,
  277. /*Ret=*/BitSize <= 32, Attr),
  278. Ty, PtrTy, Ty, OrdTy);
  279. }
  280. SmallString<32> AtomicCASName("__tsan_atomic" + BitSizeStr +
  281. "_compare_exchange_val");
  282. TsanAtomicCAS[i] = M.getOrInsertFunction(
  283. AtomicCASName,
  284. TLI.getAttrList(&Ctx, Idxs34Or1234, /*Signed=*/true,
  285. /*Ret=*/BitSize <= 32, Attr),
  286. Ty, PtrTy, Ty, Ty, OrdTy, OrdTy);
  287. }
  288. TsanVptrUpdate =
  289. M.getOrInsertFunction("__tsan_vptr_update", Attr, IRB.getVoidTy(),
  290. IRB.getInt8PtrTy(), IRB.getInt8PtrTy());
  291. TsanVptrLoad = M.getOrInsertFunction("__tsan_vptr_read", Attr,
  292. IRB.getVoidTy(), IRB.getInt8PtrTy());
  293. TsanAtomicThreadFence = M.getOrInsertFunction(
  294. "__tsan_atomic_thread_fence",
  295. TLI.getAttrList(&Ctx, {0}, /*Signed=*/true, /*Ret=*/false, Attr),
  296. IRB.getVoidTy(), OrdTy);
  297. TsanAtomicSignalFence = M.getOrInsertFunction(
  298. "__tsan_atomic_signal_fence",
  299. TLI.getAttrList(&Ctx, {0}, /*Signed=*/true, /*Ret=*/false, Attr),
  300. IRB.getVoidTy(), OrdTy);
  301. MemmoveFn =
  302. M.getOrInsertFunction("__tsan_memmove", Attr, IRB.getInt8PtrTy(),
  303. IRB.getInt8PtrTy(), IRB.getInt8PtrTy(), IntptrTy);
  304. MemcpyFn =
  305. M.getOrInsertFunction("__tsan_memcpy", Attr, IRB.getInt8PtrTy(),
  306. IRB.getInt8PtrTy(), IRB.getInt8PtrTy(), IntptrTy);
  307. MemsetFn = M.getOrInsertFunction(
  308. "__tsan_memset",
  309. TLI.getAttrList(&Ctx, {1}, /*Signed=*/true, /*Ret=*/false, Attr),
  310. IRB.getInt8PtrTy(), IRB.getInt8PtrTy(), IRB.getInt32Ty(), IntptrTy);
  311. }
  312. static bool isVtableAccess(Instruction *I) {
  313. if (MDNode *Tag = I->getMetadata(LLVMContext::MD_tbaa))
  314. return Tag->isTBAAVtableAccess();
  315. return false;
  316. }
  317. // Do not instrument known races/"benign races" that come from compiler
  318. // instrumentatin. The user has no way of suppressing them.
  319. static bool shouldInstrumentReadWriteFromAddress(const Module *M, Value *Addr) {
  320. // Peel off GEPs and BitCasts.
  321. Addr = Addr->stripInBoundsOffsets();
  322. if (GlobalVariable *GV = dyn_cast<GlobalVariable>(Addr)) {
  323. if (GV->hasSection()) {
  324. StringRef SectionName = GV->getSection();
  325. // Check if the global is in the PGO counters section.
  326. auto OF = Triple(M->getTargetTriple()).getObjectFormat();
  327. if (SectionName.endswith(
  328. getInstrProfSectionName(IPSK_cnts, OF, /*AddSegmentInfo=*/false)))
  329. return false;
  330. }
  331. // Check if the global is private gcov data.
  332. if (GV->getName().startswith("__llvm_gcov") ||
  333. GV->getName().startswith("__llvm_gcda"))
  334. return false;
  335. }
  336. // Do not instrument accesses from different address spaces; we cannot deal
  337. // with them.
  338. if (Addr) {
  339. Type *PtrTy = cast<PointerType>(Addr->getType()->getScalarType());
  340. if (PtrTy->getPointerAddressSpace() != 0)
  341. return false;
  342. }
  343. return true;
  344. }
  345. bool ThreadSanitizer::addrPointsToConstantData(Value *Addr) {
  346. // If this is a GEP, just analyze its pointer operand.
  347. if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(Addr))
  348. Addr = GEP->getPointerOperand();
  349. if (GlobalVariable *GV = dyn_cast<GlobalVariable>(Addr)) {
  350. if (GV->isConstant()) {
  351. // Reads from constant globals can not race with any writes.
  352. NumOmittedReadsFromConstantGlobals++;
  353. return true;
  354. }
  355. } else if (LoadInst *L = dyn_cast<LoadInst>(Addr)) {
  356. if (isVtableAccess(L)) {
  357. // Reads from a vtable pointer can not race with any writes.
  358. NumOmittedReadsFromVtable++;
  359. return true;
  360. }
  361. }
  362. return false;
  363. }
  364. // Instrumenting some of the accesses may be proven redundant.
  365. // Currently handled:
  366. // - read-before-write (within same BB, no calls between)
  367. // - not captured variables
  368. //
  369. // We do not handle some of the patterns that should not survive
  370. // after the classic compiler optimizations.
  371. // E.g. two reads from the same temp should be eliminated by CSE,
  372. // two writes should be eliminated by DSE, etc.
  373. //
  374. // 'Local' is a vector of insns within the same BB (no calls between).
  375. // 'All' is a vector of insns that will be instrumented.
  376. void ThreadSanitizer::chooseInstructionsToInstrument(
  377. SmallVectorImpl<Instruction *> &Local,
  378. SmallVectorImpl<InstructionInfo> &All, const DataLayout &DL) {
  379. DenseMap<Value *, size_t> WriteTargets; // Map of addresses to index in All
  380. // Iterate from the end.
  381. for (Instruction *I : reverse(Local)) {
  382. const bool IsWrite = isa<StoreInst>(*I);
  383. Value *Addr = IsWrite ? cast<StoreInst>(I)->getPointerOperand()
  384. : cast<LoadInst>(I)->getPointerOperand();
  385. if (!shouldInstrumentReadWriteFromAddress(I->getModule(), Addr))
  386. continue;
  387. if (!IsWrite) {
  388. const auto WriteEntry = WriteTargets.find(Addr);
  389. if (!ClInstrumentReadBeforeWrite && WriteEntry != WriteTargets.end()) {
  390. auto &WI = All[WriteEntry->second];
  391. // If we distinguish volatile accesses and if either the read or write
  392. // is volatile, do not omit any instrumentation.
  393. const bool AnyVolatile =
  394. ClDistinguishVolatile && (cast<LoadInst>(I)->isVolatile() ||
  395. cast<StoreInst>(WI.Inst)->isVolatile());
  396. if (!AnyVolatile) {
  397. // We will write to this temp, so no reason to analyze the read.
  398. // Mark the write instruction as compound.
  399. WI.Flags |= InstructionInfo::kCompoundRW;
  400. NumOmittedReadsBeforeWrite++;
  401. continue;
  402. }
  403. }
  404. if (addrPointsToConstantData(Addr)) {
  405. // Addr points to some constant data -- it can not race with any writes.
  406. continue;
  407. }
  408. }
  409. if (isa<AllocaInst>(getUnderlyingObject(Addr)) &&
  410. !PointerMayBeCaptured(Addr, true, true)) {
  411. // The variable is addressable but not captured, so it cannot be
  412. // referenced from a different thread and participate in a data race
  413. // (see llvm/Analysis/CaptureTracking.h for details).
  414. NumOmittedNonCaptured++;
  415. continue;
  416. }
  417. // Instrument this instruction.
  418. All.emplace_back(I);
  419. if (IsWrite) {
  420. // For read-before-write and compound instrumentation we only need one
  421. // write target, and we can override any previous entry if it exists.
  422. WriteTargets[Addr] = All.size() - 1;
  423. }
  424. }
  425. Local.clear();
  426. }
  427. static bool isTsanAtomic(const Instruction *I) {
  428. // TODO: Ask TTI whether synchronization scope is between threads.
  429. auto SSID = getAtomicSyncScopeID(I);
  430. if (!SSID)
  431. return false;
  432. if (isa<LoadInst>(I) || isa<StoreInst>(I))
  433. return *SSID != SyncScope::SingleThread;
  434. return true;
  435. }
  436. void ThreadSanitizer::InsertRuntimeIgnores(Function &F) {
  437. InstrumentationIRBuilder IRB(F.getEntryBlock().getFirstNonPHI());
  438. IRB.CreateCall(TsanIgnoreBegin);
  439. EscapeEnumerator EE(F, "tsan_ignore_cleanup", ClHandleCxxExceptions);
  440. while (IRBuilder<> *AtExit = EE.Next()) {
  441. InstrumentationIRBuilder::ensureDebugInfo(*AtExit, F);
  442. AtExit->CreateCall(TsanIgnoreEnd);
  443. }
  444. }
  445. bool ThreadSanitizer::sanitizeFunction(Function &F,
  446. const TargetLibraryInfo &TLI) {
  447. // This is required to prevent instrumenting call to __tsan_init from within
  448. // the module constructor.
  449. if (F.getName() == kTsanModuleCtorName)
  450. return false;
  451. // Naked functions can not have prologue/epilogue
  452. // (__tsan_func_entry/__tsan_func_exit) generated, so don't instrument them at
  453. // all.
  454. if (F.hasFnAttribute(Attribute::Naked))
  455. return false;
  456. // __attribute__(disable_sanitizer_instrumentation) prevents all kinds of
  457. // instrumentation.
  458. if (F.hasFnAttribute(Attribute::DisableSanitizerInstrumentation))
  459. return false;
  460. initialize(*F.getParent(), TLI);
  461. SmallVector<InstructionInfo, 8> AllLoadsAndStores;
  462. SmallVector<Instruction*, 8> LocalLoadsAndStores;
  463. SmallVector<Instruction*, 8> AtomicAccesses;
  464. SmallVector<Instruction*, 8> MemIntrinCalls;
  465. bool Res = false;
  466. bool HasCalls = false;
  467. bool SanitizeFunction = F.hasFnAttribute(Attribute::SanitizeThread);
  468. const DataLayout &DL = F.getParent()->getDataLayout();
  469. // Traverse all instructions, collect loads/stores/returns, check for calls.
  470. for (auto &BB : F) {
  471. for (auto &Inst : BB) {
  472. if (isTsanAtomic(&Inst))
  473. AtomicAccesses.push_back(&Inst);
  474. else if (isa<LoadInst>(Inst) || isa<StoreInst>(Inst))
  475. LocalLoadsAndStores.push_back(&Inst);
  476. else if ((isa<CallInst>(Inst) && !isa<DbgInfoIntrinsic>(Inst)) ||
  477. isa<InvokeInst>(Inst)) {
  478. if (CallInst *CI = dyn_cast<CallInst>(&Inst))
  479. maybeMarkSanitizerLibraryCallNoBuiltin(CI, &TLI);
  480. if (isa<MemIntrinsic>(Inst))
  481. MemIntrinCalls.push_back(&Inst);
  482. HasCalls = true;
  483. chooseInstructionsToInstrument(LocalLoadsAndStores, AllLoadsAndStores,
  484. DL);
  485. }
  486. }
  487. chooseInstructionsToInstrument(LocalLoadsAndStores, AllLoadsAndStores, DL);
  488. }
  489. // We have collected all loads and stores.
  490. // FIXME: many of these accesses do not need to be checked for races
  491. // (e.g. variables that do not escape, etc).
  492. // Instrument memory accesses only if we want to report bugs in the function.
  493. if (ClInstrumentMemoryAccesses && SanitizeFunction)
  494. for (const auto &II : AllLoadsAndStores) {
  495. Res |= instrumentLoadOrStore(II, DL);
  496. }
  497. // Instrument atomic memory accesses in any case (they can be used to
  498. // implement synchronization).
  499. if (ClInstrumentAtomics)
  500. for (auto *Inst : AtomicAccesses) {
  501. Res |= instrumentAtomic(Inst, DL);
  502. }
  503. if (ClInstrumentMemIntrinsics && SanitizeFunction)
  504. for (auto *Inst : MemIntrinCalls) {
  505. Res |= instrumentMemIntrinsic(Inst);
  506. }
  507. if (F.hasFnAttribute("sanitize_thread_no_checking_at_run_time")) {
  508. assert(!F.hasFnAttribute(Attribute::SanitizeThread));
  509. if (HasCalls)
  510. InsertRuntimeIgnores(F);
  511. }
  512. // Instrument function entry/exit points if there were instrumented accesses.
  513. if ((Res || HasCalls) && ClInstrumentFuncEntryExit) {
  514. InstrumentationIRBuilder IRB(F.getEntryBlock().getFirstNonPHI());
  515. Value *ReturnAddress = IRB.CreateCall(
  516. Intrinsic::getDeclaration(F.getParent(), Intrinsic::returnaddress),
  517. IRB.getInt32(0));
  518. IRB.CreateCall(TsanFuncEntry, ReturnAddress);
  519. EscapeEnumerator EE(F, "tsan_cleanup", ClHandleCxxExceptions);
  520. while (IRBuilder<> *AtExit = EE.Next()) {
  521. InstrumentationIRBuilder::ensureDebugInfo(*AtExit, F);
  522. AtExit->CreateCall(TsanFuncExit, {});
  523. }
  524. Res = true;
  525. }
  526. return Res;
  527. }
  528. bool ThreadSanitizer::instrumentLoadOrStore(const InstructionInfo &II,
  529. const DataLayout &DL) {
  530. InstrumentationIRBuilder IRB(II.Inst);
  531. const bool IsWrite = isa<StoreInst>(*II.Inst);
  532. Value *Addr = IsWrite ? cast<StoreInst>(II.Inst)->getPointerOperand()
  533. : cast<LoadInst>(II.Inst)->getPointerOperand();
  534. Type *OrigTy = getLoadStoreType(II.Inst);
  535. // swifterror memory addresses are mem2reg promoted by instruction selection.
  536. // As such they cannot have regular uses like an instrumentation function and
  537. // it makes no sense to track them as memory.
  538. if (Addr->isSwiftError())
  539. return false;
  540. int Idx = getMemoryAccessFuncIndex(OrigTy, Addr, DL);
  541. if (Idx < 0)
  542. return false;
  543. if (IsWrite && isVtableAccess(II.Inst)) {
  544. LLVM_DEBUG(dbgs() << " VPTR : " << *II.Inst << "\n");
  545. Value *StoredValue = cast<StoreInst>(II.Inst)->getValueOperand();
  546. // StoredValue may be a vector type if we are storing several vptrs at once.
  547. // In this case, just take the first element of the vector since this is
  548. // enough to find vptr races.
  549. if (isa<VectorType>(StoredValue->getType()))
  550. StoredValue = IRB.CreateExtractElement(
  551. StoredValue, ConstantInt::get(IRB.getInt32Ty(), 0));
  552. if (StoredValue->getType()->isIntegerTy())
  553. StoredValue = IRB.CreateIntToPtr(StoredValue, IRB.getInt8PtrTy());
  554. // Call TsanVptrUpdate.
  555. IRB.CreateCall(TsanVptrUpdate,
  556. {IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()),
  557. IRB.CreatePointerCast(StoredValue, IRB.getInt8PtrTy())});
  558. NumInstrumentedVtableWrites++;
  559. return true;
  560. }
  561. if (!IsWrite && isVtableAccess(II.Inst)) {
  562. IRB.CreateCall(TsanVptrLoad,
  563. IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()));
  564. NumInstrumentedVtableReads++;
  565. return true;
  566. }
  567. const Align Alignment = IsWrite ? cast<StoreInst>(II.Inst)->getAlign()
  568. : cast<LoadInst>(II.Inst)->getAlign();
  569. const bool IsCompoundRW =
  570. ClCompoundReadBeforeWrite && (II.Flags & InstructionInfo::kCompoundRW);
  571. const bool IsVolatile = ClDistinguishVolatile &&
  572. (IsWrite ? cast<StoreInst>(II.Inst)->isVolatile()
  573. : cast<LoadInst>(II.Inst)->isVolatile());
  574. assert((!IsVolatile || !IsCompoundRW) && "Compound volatile invalid!");
  575. const uint32_t TypeSize = DL.getTypeStoreSizeInBits(OrigTy);
  576. FunctionCallee OnAccessFunc = nullptr;
  577. if (Alignment >= Align(8) || (Alignment.value() % (TypeSize / 8)) == 0) {
  578. if (IsCompoundRW)
  579. OnAccessFunc = TsanCompoundRW[Idx];
  580. else if (IsVolatile)
  581. OnAccessFunc = IsWrite ? TsanVolatileWrite[Idx] : TsanVolatileRead[Idx];
  582. else
  583. OnAccessFunc = IsWrite ? TsanWrite[Idx] : TsanRead[Idx];
  584. } else {
  585. if (IsCompoundRW)
  586. OnAccessFunc = TsanUnalignedCompoundRW[Idx];
  587. else if (IsVolatile)
  588. OnAccessFunc = IsWrite ? TsanUnalignedVolatileWrite[Idx]
  589. : TsanUnalignedVolatileRead[Idx];
  590. else
  591. OnAccessFunc = IsWrite ? TsanUnalignedWrite[Idx] : TsanUnalignedRead[Idx];
  592. }
  593. IRB.CreateCall(OnAccessFunc, IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()));
  594. if (IsCompoundRW || IsWrite)
  595. NumInstrumentedWrites++;
  596. if (IsCompoundRW || !IsWrite)
  597. NumInstrumentedReads++;
  598. return true;
  599. }
  600. static ConstantInt *createOrdering(IRBuilder<> *IRB, AtomicOrdering ord) {
  601. uint32_t v = 0;
  602. switch (ord) {
  603. case AtomicOrdering::NotAtomic:
  604. llvm_unreachable("unexpected atomic ordering!");
  605. case AtomicOrdering::Unordered: [[fallthrough]];
  606. case AtomicOrdering::Monotonic: v = 0; break;
  607. // Not specified yet:
  608. // case AtomicOrdering::Consume: v = 1; break;
  609. case AtomicOrdering::Acquire: v = 2; break;
  610. case AtomicOrdering::Release: v = 3; break;
  611. case AtomicOrdering::AcquireRelease: v = 4; break;
  612. case AtomicOrdering::SequentiallyConsistent: v = 5; break;
  613. }
  614. return IRB->getInt32(v);
  615. }
  616. // If a memset intrinsic gets inlined by the code gen, we will miss races on it.
  617. // So, we either need to ensure the intrinsic is not inlined, or instrument it.
  618. // We do not instrument memset/memmove/memcpy intrinsics (too complicated),
  619. // instead we simply replace them with regular function calls, which are then
  620. // intercepted by the run-time.
  621. // Since tsan is running after everyone else, the calls should not be
  622. // replaced back with intrinsics. If that becomes wrong at some point,
  623. // we will need to call e.g. __tsan_memset to avoid the intrinsics.
  624. bool ThreadSanitizer::instrumentMemIntrinsic(Instruction *I) {
  625. IRBuilder<> IRB(I);
  626. if (MemSetInst *M = dyn_cast<MemSetInst>(I)) {
  627. IRB.CreateCall(
  628. MemsetFn,
  629. {IRB.CreatePointerCast(M->getArgOperand(0), IRB.getInt8PtrTy()),
  630. IRB.CreateIntCast(M->getArgOperand(1), IRB.getInt32Ty(), false),
  631. IRB.CreateIntCast(M->getArgOperand(2), IntptrTy, false)});
  632. I->eraseFromParent();
  633. } else if (MemTransferInst *M = dyn_cast<MemTransferInst>(I)) {
  634. IRB.CreateCall(
  635. isa<MemCpyInst>(M) ? MemcpyFn : MemmoveFn,
  636. {IRB.CreatePointerCast(M->getArgOperand(0), IRB.getInt8PtrTy()),
  637. IRB.CreatePointerCast(M->getArgOperand(1), IRB.getInt8PtrTy()),
  638. IRB.CreateIntCast(M->getArgOperand(2), IntptrTy, false)});
  639. I->eraseFromParent();
  640. }
  641. return false;
  642. }
  643. // Both llvm and ThreadSanitizer atomic operations are based on C++11/C1x
  644. // standards. For background see C++11 standard. A slightly older, publicly
  645. // available draft of the standard (not entirely up-to-date, but close enough
  646. // for casual browsing) is available here:
  647. // http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3242.pdf
  648. // The following page contains more background information:
  649. // http://www.hpl.hp.com/personal/Hans_Boehm/c++mm/
  650. bool ThreadSanitizer::instrumentAtomic(Instruction *I, const DataLayout &DL) {
  651. InstrumentationIRBuilder IRB(I);
  652. if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
  653. Value *Addr = LI->getPointerOperand();
  654. Type *OrigTy = LI->getType();
  655. int Idx = getMemoryAccessFuncIndex(OrigTy, Addr, DL);
  656. if (Idx < 0)
  657. return false;
  658. const unsigned ByteSize = 1U << Idx;
  659. const unsigned BitSize = ByteSize * 8;
  660. Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
  661. Type *PtrTy = Ty->getPointerTo();
  662. Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
  663. createOrdering(&IRB, LI->getOrdering())};
  664. Value *C = IRB.CreateCall(TsanAtomicLoad[Idx], Args);
  665. Value *Cast = IRB.CreateBitOrPointerCast(C, OrigTy);
  666. I->replaceAllUsesWith(Cast);
  667. } else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
  668. Value *Addr = SI->getPointerOperand();
  669. int Idx =
  670. getMemoryAccessFuncIndex(SI->getValueOperand()->getType(), Addr, DL);
  671. if (Idx < 0)
  672. return false;
  673. const unsigned ByteSize = 1U << Idx;
  674. const unsigned BitSize = ByteSize * 8;
  675. Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
  676. Type *PtrTy = Ty->getPointerTo();
  677. Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
  678. IRB.CreateBitOrPointerCast(SI->getValueOperand(), Ty),
  679. createOrdering(&IRB, SI->getOrdering())};
  680. CallInst *C = CallInst::Create(TsanAtomicStore[Idx], Args);
  681. ReplaceInstWithInst(I, C);
  682. } else if (AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I)) {
  683. Value *Addr = RMWI->getPointerOperand();
  684. int Idx =
  685. getMemoryAccessFuncIndex(RMWI->getValOperand()->getType(), Addr, DL);
  686. if (Idx < 0)
  687. return false;
  688. FunctionCallee F = TsanAtomicRMW[RMWI->getOperation()][Idx];
  689. if (!F)
  690. return false;
  691. const unsigned ByteSize = 1U << Idx;
  692. const unsigned BitSize = ByteSize * 8;
  693. Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
  694. Type *PtrTy = Ty->getPointerTo();
  695. Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
  696. IRB.CreateIntCast(RMWI->getValOperand(), Ty, false),
  697. createOrdering(&IRB, RMWI->getOrdering())};
  698. CallInst *C = CallInst::Create(F, Args);
  699. ReplaceInstWithInst(I, C);
  700. } else if (AtomicCmpXchgInst *CASI = dyn_cast<AtomicCmpXchgInst>(I)) {
  701. Value *Addr = CASI->getPointerOperand();
  702. Type *OrigOldValTy = CASI->getNewValOperand()->getType();
  703. int Idx = getMemoryAccessFuncIndex(OrigOldValTy, Addr, DL);
  704. if (Idx < 0)
  705. return false;
  706. const unsigned ByteSize = 1U << Idx;
  707. const unsigned BitSize = ByteSize * 8;
  708. Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
  709. Type *PtrTy = Ty->getPointerTo();
  710. Value *CmpOperand =
  711. IRB.CreateBitOrPointerCast(CASI->getCompareOperand(), Ty);
  712. Value *NewOperand =
  713. IRB.CreateBitOrPointerCast(CASI->getNewValOperand(), Ty);
  714. Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
  715. CmpOperand,
  716. NewOperand,
  717. createOrdering(&IRB, CASI->getSuccessOrdering()),
  718. createOrdering(&IRB, CASI->getFailureOrdering())};
  719. CallInst *C = IRB.CreateCall(TsanAtomicCAS[Idx], Args);
  720. Value *Success = IRB.CreateICmpEQ(C, CmpOperand);
  721. Value *OldVal = C;
  722. if (Ty != OrigOldValTy) {
  723. // The value is a pointer, so we need to cast the return value.
  724. OldVal = IRB.CreateIntToPtr(C, OrigOldValTy);
  725. }
  726. Value *Res =
  727. IRB.CreateInsertValue(PoisonValue::get(CASI->getType()), OldVal, 0);
  728. Res = IRB.CreateInsertValue(Res, Success, 1);
  729. I->replaceAllUsesWith(Res);
  730. I->eraseFromParent();
  731. } else if (FenceInst *FI = dyn_cast<FenceInst>(I)) {
  732. Value *Args[] = {createOrdering(&IRB, FI->getOrdering())};
  733. FunctionCallee F = FI->getSyncScopeID() == SyncScope::SingleThread
  734. ? TsanAtomicSignalFence
  735. : TsanAtomicThreadFence;
  736. CallInst *C = CallInst::Create(F, Args);
  737. ReplaceInstWithInst(I, C);
  738. }
  739. return true;
  740. }
  741. int ThreadSanitizer::getMemoryAccessFuncIndex(Type *OrigTy, Value *Addr,
  742. const DataLayout &DL) {
  743. assert(OrigTy->isSized());
  744. assert(
  745. cast<PointerType>(Addr->getType())->isOpaqueOrPointeeTypeMatches(OrigTy));
  746. uint32_t TypeSize = DL.getTypeStoreSizeInBits(OrigTy);
  747. if (TypeSize != 8 && TypeSize != 16 &&
  748. TypeSize != 32 && TypeSize != 64 && TypeSize != 128) {
  749. NumAccessesWithBadSize++;
  750. // Ignore all unusual sizes.
  751. return -1;
  752. }
  753. size_t Idx = countTrailingZeros(TypeSize / 8);
  754. assert(Idx < kNumberOfAccessSizes);
  755. return Idx;
  756. }