ARMBuildAttributes.h 9.2 KB

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  1. #pragma once
  2. #ifdef __GNUC__
  3. #pragma GCC diagnostic push
  4. #pragma GCC diagnostic ignored "-Wunused-parameter"
  5. #endif
  6. //===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===//
  7. //
  8. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  9. // See https://llvm.org/LICENSE.txt for license information.
  10. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  11. //
  12. //===----------------------------------------------------------------------===//
  13. //
  14. // This file contains enumerations and support routines for ARM build attributes
  15. // as defined in ARM ABI addenda document (ABI release 2.08).
  16. //
  17. // ELF for the ARM Architecture r2.09 - November 30, 2012
  18. //
  19. // http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf
  20. //
  21. //===----------------------------------------------------------------------===//
  22. #ifndef LLVM_SUPPORT_ARMBUILDATTRIBUTES_H
  23. #define LLVM_SUPPORT_ARMBUILDATTRIBUTES_H
  24. #include "llvm/Support/ELFAttributes.h"
  25. namespace llvm {
  26. namespace ARMBuildAttrs {
  27. const TagNameMap &getARMAttributeTags();
  28. enum SpecialAttr {
  29. // This is for the .cpu asm attr. It translates into one or more
  30. // AttrType (below) entries in the .ARM.attributes section in the ELF.
  31. SEL_CPU
  32. };
  33. enum AttrType : unsigned {
  34. // Rest correspond to ELF/.ARM.attributes
  35. File = 1,
  36. CPU_raw_name = 4,
  37. CPU_name = 5,
  38. CPU_arch = 6,
  39. CPU_arch_profile = 7,
  40. ARM_ISA_use = 8,
  41. THUMB_ISA_use = 9,
  42. FP_arch = 10,
  43. WMMX_arch = 11,
  44. Advanced_SIMD_arch = 12,
  45. PCS_config = 13,
  46. ABI_PCS_R9_use = 14,
  47. ABI_PCS_RW_data = 15,
  48. ABI_PCS_RO_data = 16,
  49. ABI_PCS_GOT_use = 17,
  50. ABI_PCS_wchar_t = 18,
  51. ABI_FP_rounding = 19,
  52. ABI_FP_denormal = 20,
  53. ABI_FP_exceptions = 21,
  54. ABI_FP_user_exceptions = 22,
  55. ABI_FP_number_model = 23,
  56. ABI_align_needed = 24,
  57. ABI_align_preserved = 25,
  58. ABI_enum_size = 26,
  59. ABI_HardFP_use = 27,
  60. ABI_VFP_args = 28,
  61. ABI_WMMX_args = 29,
  62. ABI_optimization_goals = 30,
  63. ABI_FP_optimization_goals = 31,
  64. compatibility = 32,
  65. CPU_unaligned_access = 34,
  66. FP_HP_extension = 36,
  67. ABI_FP_16bit_format = 38,
  68. MPextension_use = 42, // recoded from 70 (ABI r2.08)
  69. DIV_use = 44,
  70. DSP_extension = 46,
  71. MVE_arch = 48,
  72. PAC_extension = 50,
  73. BTI_extension = 52,
  74. also_compatible_with = 65,
  75. conformance = 67,
  76. Virtualization_use = 68,
  77. BTI_use = 74,
  78. PACRET_use = 76,
  79. /// Legacy Tags
  80. Section = 2, // deprecated (ABI r2.09)
  81. Symbol = 3, // deprecated (ABI r2.09)
  82. ABI_align8_needed = 24, // renamed to ABI_align_needed (ABI r2.09)
  83. ABI_align8_preserved = 25, // renamed to ABI_align_preserved (ABI r2.09)
  84. nodefaults = 64, // deprecated (ABI r2.09)
  85. T2EE_use = 66, // deprecated (ABI r2.09)
  86. MPextension_use_old = 70 // recoded to MPextension_use (ABI r2.08)
  87. };
  88. // Legal Values for CPU_arch, (=6), uleb128
  89. enum CPUArch {
  90. Pre_v4 = 0,
  91. v4 = 1, // e.g. SA110
  92. v4T = 2, // e.g. ARM7TDMI
  93. v5T = 3, // e.g. ARM9TDMI
  94. v5TE = 4, // e.g. ARM946E_S
  95. v5TEJ = 5, // e.g. ARM926EJ_S
  96. v6 = 6, // e.g. ARM1136J_S
  97. v6KZ = 7, // e.g. ARM1176JZ_S
  98. v6T2 = 8, // e.g. ARM1156T2_S
  99. v6K = 9, // e.g. ARM1176JZ_S
  100. v7 = 10, // e.g. Cortex A8, Cortex M3
  101. v6_M = 11, // e.g. Cortex M1
  102. v6S_M = 12, // v6_M with the System extensions
  103. v7E_M = 13, // v7_M with DSP extensions
  104. v8_A = 14, // v8_A AArch32
  105. v8_R = 15, // e.g. Cortex R52
  106. v8_M_Base= 16, // v8_M_Base AArch32
  107. v8_M_Main= 17, // v8_M_Main AArch32
  108. v8_1_M_Main=21, // v8_1_M_Main AArch32
  109. };
  110. enum CPUArchProfile { // (=7), uleb128
  111. Not_Applicable = 0, // pre v7, or cross-profile code
  112. ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8)
  113. RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4)
  114. MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3)
  115. SystemProfile = (0x53) // 'S' Application or real-time profile
  116. };
  117. // The following have a lot of common use cases
  118. enum {
  119. Not_Allowed = 0,
  120. Allowed = 1,
  121. // Tag_ARM_ISA_use (=8), uleb128
  122. // Tag_THUMB_ISA_use, (=9), uleb128
  123. AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
  124. AllowThumbDerived = 3, // Thumb allowed, derived from arch/profile
  125. // Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
  126. AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA)
  127. AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA)
  128. AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31
  129. AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA)
  130. AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31
  131. AllowFPARMv8A = 7, // Use of the ARM v8-A FP ISA was permitted
  132. AllowFPARMv8B = 8, // Use of the ARM v8-A FP ISA was permitted, but only
  133. // D0-D15, S0-S31
  134. // Tag_WMMX_arch, (=11), uleb128
  135. AllowWMMXv1 = 1, // The user permitted this entity to use WMMX v1
  136. AllowWMMXv2 = 2, // The user permitted this entity to use WMMX v2
  137. // Tag_Advanced_SIMD_arch, (=12), uleb128
  138. AllowNeon = 1, // SIMDv1 was permitted
  139. AllowNeon2 = 2, // SIMDv2 was permitted (Half-precision FP, MAC operations)
  140. AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted
  141. AllowNeonARMv8_1a = 4,// ARM v8.1-A SIMD was permitted (RDMA)
  142. // Tag_MVE_arch, (=48), uleb128
  143. AllowMVEInteger = 1, // integer-only MVE was permitted
  144. AllowMVEIntegerAndFloat = 2, // both integer and floating point MVE were permitted
  145. // Tag_ABI_PCS_R9_use, (=14), uleb128
  146. R9IsGPR = 0, // R9 used as v6 (just another callee-saved register)
  147. R9IsSB = 1, // R9 used as a global static base rgister
  148. R9IsTLSPointer = 2, // R9 used as a thread local storage pointer
  149. R9Reserved = 3, // R9 not used by code associated with attributed entity
  150. // Tag_ABI_PCS_RW_data, (=15), uleb128
  151. AddressRWPCRel = 1, // Address RW static data PC-relative
  152. AddressRWSBRel = 2, // Address RW static data SB-relative
  153. AddressRWNone = 3, // No RW static data permitted
  154. // Tag_ABI_PCS_RO_data, (=14), uleb128
  155. AddressROPCRel = 1, // Address RO static data PC-relative
  156. AddressRONone = 2, // No RO static data permitted
  157. // Tag_ABI_PCS_GOT_use, (=17), uleb128
  158. AddressDirect = 1, // Address imported data directly
  159. AddressGOT = 2, // Address imported data indirectly (via GOT)
  160. // Tag_ABI_PCS_wchar_t, (=18), uleb128
  161. WCharProhibited = 0, // wchar_t is not used
  162. WCharWidth2Bytes = 2, // sizeof(wchar_t) == 2
  163. WCharWidth4Bytes = 4, // sizeof(wchar_t) == 4
  164. // Tag_ABI_align_needed, (=24), uleb128
  165. Align8Byte = 1,
  166. Align4Byte = 2,
  167. AlignReserved = 3,
  168. // Tag_ABI_align_needed, (=25), uleb128
  169. AlignNotPreserved = 0,
  170. AlignPreserve8Byte = 1,
  171. AlignPreserveAll = 2,
  172. // Tag_ABI_FP_denormal, (=20), uleb128
  173. PositiveZero = 0,
  174. IEEEDenormals = 1,
  175. PreserveFPSign = 2, // sign when flushed-to-zero is preserved
  176. // Tag_ABI_FP_number_model, (=23), uleb128
  177. AllowIEEENormal = 1,
  178. AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI])
  179. AllowIEEE754 = 3, // this code to use all the IEEE 754-defined FP encodings
  180. // Tag_ABI_enum_size, (=26), uleb128
  181. EnumProhibited = 0, // The user prohibited the use of enums when building
  182. // this entity.
  183. EnumSmallest = 1, // Enum is smallest container big enough to hold all
  184. // values.
  185. Enum32Bit = 2, // Enum is at least 32 bits.
  186. Enum32BitABI = 3, // Every enumeration visible across an ABI-complying
  187. // interface contains a value needing 32 bits to encode
  188. // it; other enums can be containerized.
  189. // Tag_ABI_HardFP_use, (=27), uleb128
  190. HardFPImplied = 0, // FP use should be implied by Tag_FP_arch
  191. HardFPSinglePrecision = 1, // Single-precision only
  192. // Tag_ABI_VFP_args, (=28), uleb128
  193. BaseAAPCS = 0,
  194. HardFPAAPCS = 1,
  195. ToolChainFPPCS = 2,
  196. CompatibleFPAAPCS = 3,
  197. // Tag_FP_HP_extension, (=36), uleb128
  198. AllowHPFP = 1, // Allow use of Half Precision FP
  199. // Tag_FP_16bit_format, (=38), uleb128
  200. FP16FormatIEEE = 1,
  201. FP16VFP3 = 2,
  202. // Tag_MPextension_use, (=42), uleb128
  203. AllowMP = 1, // Allow use of MP extensions
  204. // Tag_DIV_use, (=44), uleb128
  205. // Note: AllowDIVExt must be emitted if and only if the permission to use
  206. // hardware divide cannot be conveyed using AllowDIVIfExists or DisallowDIV
  207. AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no
  208. // info exists.
  209. DisallowDIV = 1, // Hardware divide explicitly disallowed.
  210. AllowDIVExt = 2, // Allow hardware divide as optional architecture
  211. // extension above the base arch specified by
  212. // Tag_CPU_arch and Tag_CPU_arch_profile.
  213. // Tag_Virtualization_use, (=68), uleb128
  214. AllowTZ = 1,
  215. AllowVirtualization = 2,
  216. AllowTZVirtualization = 3,
  217. // Tag_PAC_extension, (=50), uleb128
  218. DisallowPAC = 0,
  219. AllowPACInNOPSpace = 1,
  220. AllowPAC = 2,
  221. // Tag_BTI_extension, (=52), uleb128
  222. DisallowBTI = 0,
  223. AllowBTIInNOPSpace = 1,
  224. AllowBTI = 2,
  225. // Tag_BTI_use, (=74), uleb128
  226. BTINotUsed = 0,
  227. BTIUsed = 1,
  228. // Tag_PACRET_use, (=76), uleb128
  229. PACRETNotUsed = 0,
  230. PACRETUsed = 1
  231. };
  232. } // namespace ARMBuildAttrs
  233. } // namespace llvm
  234. #endif
  235. #ifdef __GNUC__
  236. #pragma GCC diagnostic pop
  237. #endif