WebAssemblyDisassemblerEmitter.cpp 6.7 KB

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  1. //===- WebAssemblyDisassemblerEmitter.cpp - Disassembler tables -*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // This file is part of the WebAssembly Disassembler Emitter.
  10. // It contains the implementation of the disassembler tables.
  11. // Documentation for the disassembler emitter in general can be found in
  12. // WebAssemblyDisassemblerEmitter.h.
  13. //
  14. //===----------------------------------------------------------------------===//
  15. #include "WebAssemblyDisassemblerEmitter.h"
  16. #include "CodeGenInstruction.h"
  17. #include "llvm/ADT/STLExtras.h"
  18. #include "llvm/Support/raw_ostream.h"
  19. #include "llvm/TableGen/Record.h"
  20. namespace llvm {
  21. static constexpr int WebAssemblyInstructionTableSize = 256;
  22. void emitWebAssemblyDisassemblerTables(
  23. raw_ostream &OS,
  24. const ArrayRef<const CodeGenInstruction *> &NumberedInstructions) {
  25. // First lets organize all opcodes by (prefix) byte. Prefix 0 is the
  26. // starting table.
  27. std::map<unsigned,
  28. std::map<unsigned, std::pair<unsigned, const CodeGenInstruction *>>>
  29. OpcodeTable;
  30. for (unsigned I = 0; I != NumberedInstructions.size(); ++I) {
  31. auto &CGI = *NumberedInstructions[I];
  32. auto &Def = *CGI.TheDef;
  33. if (!Def.getValue("Inst"))
  34. continue;
  35. auto &Inst = *Def.getValueAsBitsInit("Inst");
  36. RecordKeeper &RK = Inst.getRecordKeeper();
  37. unsigned Opc = static_cast<unsigned>(
  38. cast<IntInit>(Inst.convertInitializerTo(IntRecTy::get(RK)))
  39. ->getValue());
  40. if (Opc == 0xFFFFFFFF)
  41. continue; // No opcode defined.
  42. assert(Opc <= 0xFFFFFF);
  43. unsigned Prefix;
  44. if (Opc <= 0xFFFF) {
  45. Prefix = Opc >> 8;
  46. Opc = Opc & 0xFF;
  47. } else {
  48. Prefix = Opc >> 16;
  49. Opc = Opc & 0xFFFF;
  50. }
  51. auto &CGIP = OpcodeTable[Prefix][Opc];
  52. // All wasm instructions have a StackBased field of type string, we only
  53. // want the instructions for which this is "true".
  54. bool IsStackBased = Def.getValueAsBit("StackBased");
  55. if (!IsStackBased)
  56. continue;
  57. if (CGIP.second) {
  58. // We already have an instruction for this slot, so decide which one
  59. // should be the canonical one. This determines which variant gets
  60. // printed in a disassembly. We want e.g. "call" not "i32.call", and
  61. // "end" when we don't know if its "end_loop" or "end_block" etc.
  62. bool IsCanonicalExisting = CGIP.second->TheDef->getValueAsBit("IsCanonical");
  63. // We already have one marked explicitly as canonical, so keep it.
  64. if (IsCanonicalExisting)
  65. continue;
  66. bool IsCanonicalNew = Def.getValueAsBit("IsCanonical");
  67. // If the new one is explicitly marked as canonical, take it.
  68. if (!IsCanonicalNew) {
  69. // Neither the existing or new instruction is canonical.
  70. // Pick the one with the shortest name as heuristic.
  71. // Though ideally IsCanonical is always defined for at least one
  72. // variant so this never has to apply.
  73. if (CGIP.second->AsmString.size() <= CGI.AsmString.size())
  74. continue;
  75. }
  76. }
  77. // Set this instruction as the one to use.
  78. CGIP = std::make_pair(I, &CGI);
  79. }
  80. OS << "#include \"MCTargetDesc/WebAssemblyMCTargetDesc.h\"\n";
  81. OS << "\n";
  82. OS << "namespace llvm {\n\n";
  83. OS << "static constexpr int WebAssemblyInstructionTableSize = ";
  84. OS << WebAssemblyInstructionTableSize << ";\n\n";
  85. OS << "enum EntryType : uint8_t { ";
  86. OS << "ET_Unused, ET_Prefix, ET_Instruction };\n\n";
  87. OS << "struct WebAssemblyInstruction {\n";
  88. OS << " uint16_t Opcode;\n";
  89. OS << " EntryType ET;\n";
  90. OS << " uint8_t NumOperands;\n";
  91. OS << " uint16_t OperandStart;\n";
  92. OS << "};\n\n";
  93. std::vector<std::string> OperandTable, CurOperandList;
  94. // Output one table per prefix.
  95. for (auto &PrefixPair : OpcodeTable) {
  96. if (PrefixPair.second.empty())
  97. continue;
  98. OS << "WebAssemblyInstruction InstructionTable" << PrefixPair.first;
  99. OS << "[] = {\n";
  100. for (unsigned I = 0; I < WebAssemblyInstructionTableSize; I++) {
  101. auto InstIt = PrefixPair.second.find(I);
  102. if (InstIt != PrefixPair.second.end()) {
  103. // Regular instruction.
  104. assert(InstIt->second.second);
  105. auto &CGI = *InstIt->second.second;
  106. OS << " // 0x";
  107. OS.write_hex(static_cast<unsigned long long>(I));
  108. OS << ": " << CGI.AsmString << "\n";
  109. OS << " { " << InstIt->second.first << ", ET_Instruction, ";
  110. OS << CGI.Operands.OperandList.size() << ", ";
  111. // Collect operand types for storage in a shared list.
  112. CurOperandList.clear();
  113. for (auto &Op : CGI.Operands.OperandList) {
  114. assert(Op.OperandType != "MCOI::OPERAND_UNKNOWN");
  115. CurOperandList.push_back(Op.OperandType);
  116. }
  117. // See if we already have stored this sequence before. This is not
  118. // strictly necessary but makes the table really small.
  119. size_t OperandStart = OperandTable.size();
  120. if (CurOperandList.size() <= OperandTable.size()) {
  121. for (size_t J = 0; J <= OperandTable.size() - CurOperandList.size();
  122. ++J) {
  123. size_t K = 0;
  124. for (; K < CurOperandList.size(); ++K) {
  125. if (OperandTable[J + K] != CurOperandList[K]) break;
  126. }
  127. if (K == CurOperandList.size()) {
  128. OperandStart = J;
  129. break;
  130. }
  131. }
  132. }
  133. // Store operands if no prior occurrence.
  134. if (OperandStart == OperandTable.size()) {
  135. llvm::append_range(OperandTable, CurOperandList);
  136. }
  137. OS << OperandStart;
  138. } else {
  139. auto PrefixIt = OpcodeTable.find(I);
  140. // If we have a non-empty table for it that's not 0, this is a prefix.
  141. if (PrefixIt != OpcodeTable.end() && I && !PrefixPair.first) {
  142. OS << " { 0, ET_Prefix, 0, 0";
  143. } else {
  144. OS << " { 0, ET_Unused, 0, 0";
  145. }
  146. }
  147. OS << " },\n";
  148. }
  149. OS << "};\n\n";
  150. }
  151. // Create a table of all operands:
  152. OS << "const uint8_t OperandTable[] = {\n";
  153. for (auto &Op : OperandTable) {
  154. OS << " " << Op << ",\n";
  155. }
  156. OS << "};\n\n";
  157. // Create a table of all extension tables:
  158. OS << "struct { uint8_t Prefix; const WebAssemblyInstruction *Table; }\n";
  159. OS << "PrefixTable[] = {\n";
  160. for (auto &PrefixPair : OpcodeTable) {
  161. if (PrefixPair.second.empty() || !PrefixPair.first)
  162. continue;
  163. OS << " { " << PrefixPair.first << ", InstructionTable"
  164. << PrefixPair.first;
  165. OS << " },\n";
  166. }
  167. OS << " { 0, nullptr }\n};\n\n";
  168. OS << "} // end namespace llvm\n";
  169. }
  170. } // namespace llvm