PPCFixupKinds.h 2.0 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465
  1. //===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. #ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCFIXUPKINDS_H
  9. #define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCFIXUPKINDS_H
  10. #include "llvm/MC/MCFixup.h"
  11. #undef PPC
  12. namespace llvm {
  13. namespace PPC {
  14. enum Fixups {
  15. // 24-bit PC relative relocation for direct branches like 'b' and 'bl'.
  16. fixup_ppc_br24 = FirstTargetFixupKind,
  17. // 24-bit PC relative relocation for direct branches like 'b' and 'bl' where
  18. // the caller does not use the TOC.
  19. fixup_ppc_br24_notoc,
  20. /// 14-bit PC relative relocation for conditional branches.
  21. fixup_ppc_brcond14,
  22. /// 24-bit absolute relocation for direct branches like 'ba' and 'bla'.
  23. fixup_ppc_br24abs,
  24. /// 14-bit absolute relocation for conditional branches.
  25. fixup_ppc_brcond14abs,
  26. /// A 16-bit fixup corresponding to lo16(_foo) or ha16(_foo) for instrs like
  27. /// 'li' or 'addis'.
  28. fixup_ppc_half16,
  29. /// A 14-bit fixup corresponding to lo16(_foo) with implied 2 zero bits for
  30. /// instrs like 'std'.
  31. fixup_ppc_half16ds,
  32. // A 34-bit fixup corresponding to PC-relative paddi.
  33. fixup_ppc_pcrel34,
  34. // A 34-bit fixup corresponding to Non-PC-relative paddi.
  35. fixup_ppc_imm34,
  36. /// Not a true fixup, but ties a symbol to a call to __tls_get_addr for the
  37. /// TLS general and local dynamic models, or inserts the thread-pointer
  38. /// register number.
  39. fixup_ppc_nofixup,
  40. /// A 16-bit fixup corresponding to lo16(_foo) with implied 3 zero bits for
  41. /// instrs like 'lxv'. Produces the same relocation as fixup_ppc_half16ds.
  42. fixup_ppc_half16dq,
  43. // Marker
  44. LastTargetFixupKind,
  45. NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
  46. };
  47. }
  48. }
  49. #endif