AArch64CallLowering.h 3.0 KB

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  1. //===- AArch64CallLowering.h - Call lowering --------------------*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. ///
  9. /// \file
  10. /// This file describes how to lower LLVM calls to machine code calls.
  11. ///
  12. //===----------------------------------------------------------------------===//
  13. #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
  14. #define LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
  15. #include "llvm/ADT/ArrayRef.h"
  16. #include "llvm/CodeGen/GlobalISel/CallLowering.h"
  17. #include "llvm/IR/CallingConv.h"
  18. #include <cstdint>
  19. #include <functional>
  20. namespace llvm {
  21. class AArch64TargetLowering;
  22. class CCValAssign;
  23. class MachineIRBuilder;
  24. class Type;
  25. class AArch64CallLowering: public CallLowering {
  26. public:
  27. AArch64CallLowering(const AArch64TargetLowering &TLI);
  28. bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
  29. ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
  30. Register SwiftErrorVReg) const override;
  31. bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv,
  32. SmallVectorImpl<BaseArgInfo> &Outs,
  33. bool IsVarArg) const override;
  34. bool fallBackToDAGISel(const MachineFunction &MF) const override;
  35. bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
  36. ArrayRef<ArrayRef<Register>> VRegs,
  37. FunctionLoweringInfo &FLI) const override;
  38. bool lowerCall(MachineIRBuilder &MIRBuilder,
  39. CallLoweringInfo &Info) const override;
  40. /// Returns true if the call can be lowered as a tail call.
  41. bool
  42. isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder,
  43. CallLoweringInfo &Info,
  44. SmallVectorImpl<ArgInfo> &InArgs,
  45. SmallVectorImpl<ArgInfo> &OutArgs) const;
  46. bool supportSwiftError() const override { return true; }
  47. bool isTypeIsValidForThisReturn(EVT Ty) const override;
  48. private:
  49. using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned,
  50. CCValAssign &)>;
  51. using MemHandler =
  52. std::function<void(MachineIRBuilder &, int, CCValAssign &)>;
  53. bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
  54. SmallVectorImpl<ArgInfo> &OutArgs) const;
  55. bool
  56. doCallerAndCalleePassArgsTheSameWay(CallLoweringInfo &Info,
  57. MachineFunction &MF,
  58. SmallVectorImpl<ArgInfo> &InArgs) const;
  59. bool
  60. areCalleeOutgoingArgsTailCallable(CallLoweringInfo &Info, MachineFunction &MF,
  61. SmallVectorImpl<ArgInfo> &OutArgs) const;
  62. };
  63. } // end namespace llvm
  64. #endif // LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H