AArch64FrameLowering.h 6.8 KB

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  1. //==-- AArch64FrameLowering.h - TargetFrameLowering for AArch64 --*- C++ -*-==//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. //
  10. //
  11. //===----------------------------------------------------------------------===//
  12. #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64FRAMELOWERING_H
  13. #define LLVM_LIB_TARGET_AARCH64_AARCH64FRAMELOWERING_H
  14. #include "llvm/Support/TypeSize.h"
  15. #include "llvm/CodeGen/TargetFrameLowering.h"
  16. namespace llvm {
  17. class AArch64FrameLowering : public TargetFrameLowering {
  18. public:
  19. explicit AArch64FrameLowering()
  20. : TargetFrameLowering(StackGrowsDown, Align(16), 0, Align(16),
  21. true /*StackRealignable*/) {}
  22. void resetCFIToInitialState(MachineBasicBlock &MBB) const override;
  23. MachineBasicBlock::iterator
  24. eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
  25. MachineBasicBlock::iterator I) const override;
  26. /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
  27. /// the function.
  28. void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
  29. void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
  30. bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
  31. StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
  32. Register &FrameReg) const override;
  33. StackOffset resolveFrameIndexReference(const MachineFunction &MF, int FI,
  34. Register &FrameReg, bool PreferFP,
  35. bool ForSimm) const;
  36. StackOffset resolveFrameOffsetReference(const MachineFunction &MF,
  37. int64_t ObjectOffset, bool isFixed,
  38. bool isSVE, Register &FrameReg,
  39. bool PreferFP, bool ForSimm) const;
  40. bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
  41. MachineBasicBlock::iterator MI,
  42. ArrayRef<CalleeSavedInfo> CSI,
  43. const TargetRegisterInfo *TRI) const override;
  44. bool
  45. restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
  46. MachineBasicBlock::iterator MI,
  47. MutableArrayRef<CalleeSavedInfo> CSI,
  48. const TargetRegisterInfo *TRI) const override;
  49. /// Can this function use the red zone for local allocations.
  50. bool canUseRedZone(const MachineFunction &MF) const;
  51. bool hasFP(const MachineFunction &MF) const override;
  52. bool hasReservedCallFrame(const MachineFunction &MF) const override;
  53. bool assignCalleeSavedSpillSlots(MachineFunction &MF,
  54. const TargetRegisterInfo *TRI,
  55. std::vector<CalleeSavedInfo> &CSI,
  56. unsigned &MinCSFrameIndex,
  57. unsigned &MaxCSFrameIndex) const override;
  58. void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
  59. RegScavenger *RS) const override;
  60. /// Returns true if the target will correctly handle shrink wrapping.
  61. bool enableShrinkWrapping(const MachineFunction &MF) const override {
  62. return true;
  63. }
  64. bool enableStackSlotScavenging(const MachineFunction &MF) const override;
  65. TargetStackID::Value getStackIDForScalableVectors() const override;
  66. void processFunctionBeforeFrameFinalized(MachineFunction &MF,
  67. RegScavenger *RS) const override;
  68. void
  69. processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF,
  70. RegScavenger *RS) const override;
  71. unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override;
  72. unsigned getWinEHFuncletFrameSize(const MachineFunction &MF) const;
  73. StackOffset
  74. getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
  75. Register &FrameReg,
  76. bool IgnoreSPUpdates) const override;
  77. StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF,
  78. int FI) const override;
  79. int getSEHFrameIndexOffset(const MachineFunction &MF, int FI) const;
  80. bool isSupportedStackID(TargetStackID::Value ID) const override {
  81. switch (ID) {
  82. default:
  83. return false;
  84. case TargetStackID::Default:
  85. case TargetStackID::ScalableVector:
  86. case TargetStackID::NoAlloc:
  87. return true;
  88. }
  89. }
  90. bool isStackIdSafeForLocalArea(unsigned StackId) const override {
  91. // We don't support putting SVE objects into the pre-allocated local
  92. // frame block at the moment.
  93. return StackId != TargetStackID::ScalableVector;
  94. }
  95. void
  96. orderFrameObjects(const MachineFunction &MF,
  97. SmallVectorImpl<int> &ObjectsToAllocate) const override;
  98. private:
  99. /// Returns true if a homogeneous prolog or epilog code can be emitted
  100. /// for the size optimization. If so, HOM_Prolog/HOM_Epilog pseudo
  101. /// instructions are emitted in place. When Exit block is given, this check is
  102. /// for epilog.
  103. bool homogeneousPrologEpilog(MachineFunction &MF,
  104. MachineBasicBlock *Exit = nullptr) const;
  105. /// Returns true if CSRs should be paired.
  106. bool producePairRegisters(MachineFunction &MF) const;
  107. bool shouldCombineCSRLocalStackBump(MachineFunction &MF,
  108. uint64_t StackBumpBytes) const;
  109. int64_t estimateSVEStackObjectOffsets(MachineFrameInfo &MF) const;
  110. int64_t assignSVEStackObjectOffsets(MachineFrameInfo &MF,
  111. int &MinCSFrameIndex,
  112. int &MaxCSFrameIndex) const;
  113. bool shouldCombineCSRLocalStackBumpInEpilogue(MachineBasicBlock &MBB,
  114. unsigned StackBumpBytes) const;
  115. void emitCalleeSavedGPRLocations(MachineBasicBlock &MBB,
  116. MachineBasicBlock::iterator MBBI) const;
  117. void emitCalleeSavedSVELocations(MachineBasicBlock &MBB,
  118. MachineBasicBlock::iterator MBBI) const;
  119. void emitCalleeSavedGPRRestores(MachineBasicBlock &MBB,
  120. MachineBasicBlock::iterator MBBI) const;
  121. void emitCalleeSavedSVERestores(MachineBasicBlock &MBB,
  122. MachineBasicBlock::iterator MBBI) const;
  123. /// Emit target zero call-used regs.
  124. void emitZeroCallUsedRegs(BitVector RegsToZero,
  125. MachineBasicBlock &MBB) const override;
  126. };
  127. } // End llvm namespace
  128. #endif