LiveIntervalUnion.cpp 6.7 KB

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  1. //===- LiveIntervalUnion.cpp - Live interval union data structure ---------===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // LiveIntervalUnion represents a coalesced set of live intervals. This may be
  10. // used during coalescing to represent a congruence class, or during register
  11. // allocation to model liveness of a physical register.
  12. //
  13. //===----------------------------------------------------------------------===//
  14. #include "llvm/CodeGen/LiveIntervalUnion.h"
  15. #include "llvm/ADT/STLExtras.h"
  16. #include "llvm/ADT/SparseBitVector.h"
  17. #include "llvm/CodeGen/LiveInterval.h"
  18. #include "llvm/CodeGen/TargetRegisterInfo.h"
  19. #include "llvm/Support/raw_ostream.h"
  20. #include <cassert>
  21. #include <cstdlib>
  22. using namespace llvm;
  23. #define DEBUG_TYPE "regalloc"
  24. // Merge a LiveInterval's segments. Guarantee no overlaps.
  25. void LiveIntervalUnion::unify(const LiveInterval &VirtReg,
  26. const LiveRange &Range) {
  27. if (Range.empty())
  28. return;
  29. ++Tag;
  30. // Insert each of the virtual register's live segments into the map.
  31. LiveRange::const_iterator RegPos = Range.begin();
  32. LiveRange::const_iterator RegEnd = Range.end();
  33. SegmentIter SegPos = Segments.find(RegPos->start);
  34. while (SegPos.valid()) {
  35. SegPos.insert(RegPos->start, RegPos->end, &VirtReg);
  36. if (++RegPos == RegEnd)
  37. return;
  38. SegPos.advanceTo(RegPos->start);
  39. }
  40. // We have reached the end of Segments, so it is no longer necessary to search
  41. // for the insertion position.
  42. // It is faster to insert the end first.
  43. --RegEnd;
  44. SegPos.insert(RegEnd->start, RegEnd->end, &VirtReg);
  45. for (; RegPos != RegEnd; ++RegPos, ++SegPos)
  46. SegPos.insert(RegPos->start, RegPos->end, &VirtReg);
  47. }
  48. // Remove a live virtual register's segments from this union.
  49. void LiveIntervalUnion::extract(const LiveInterval &VirtReg,
  50. const LiveRange &Range) {
  51. if (Range.empty())
  52. return;
  53. ++Tag;
  54. // Remove each of the virtual register's live segments from the map.
  55. LiveRange::const_iterator RegPos = Range.begin();
  56. LiveRange::const_iterator RegEnd = Range.end();
  57. SegmentIter SegPos = Segments.find(RegPos->start);
  58. while (true) {
  59. assert(SegPos.value() == &VirtReg && "Inconsistent LiveInterval");
  60. SegPos.erase();
  61. if (!SegPos.valid())
  62. return;
  63. // Skip all segments that may have been coalesced.
  64. RegPos = Range.advanceTo(RegPos, SegPos.start());
  65. if (RegPos == RegEnd)
  66. return;
  67. SegPos.advanceTo(RegPos->start);
  68. }
  69. }
  70. void
  71. LiveIntervalUnion::print(raw_ostream &OS, const TargetRegisterInfo *TRI) const {
  72. if (empty()) {
  73. OS << " empty\n";
  74. return;
  75. }
  76. for (LiveSegments::const_iterator SI = Segments.begin(); SI.valid(); ++SI) {
  77. OS << " [" << SI.start() << ' ' << SI.stop()
  78. << "):" << printReg(SI.value()->reg(), TRI);
  79. }
  80. OS << '\n';
  81. }
  82. #ifndef NDEBUG
  83. // Verify the live intervals in this union and add them to the visited set.
  84. void LiveIntervalUnion::verify(LiveVirtRegBitSet& VisitedVRegs) {
  85. for (SegmentIter SI = Segments.begin(); SI.valid(); ++SI)
  86. VisitedVRegs.set(SI.value()->reg());
  87. }
  88. #endif //!NDEBUG
  89. const LiveInterval *LiveIntervalUnion::getOneVReg() const {
  90. if (empty())
  91. return nullptr;
  92. for (LiveSegments::const_iterator SI = Segments.begin(); SI.valid(); ++SI) {
  93. // return the first valid live interval
  94. return SI.value();
  95. }
  96. return nullptr;
  97. }
  98. // Scan the vector of interfering virtual registers in this union. Assume it's
  99. // quite small.
  100. bool LiveIntervalUnion::Query::isSeenInterference(
  101. const LiveInterval *VirtReg) const {
  102. return is_contained(InterferingVRegs, VirtReg);
  103. }
  104. // Collect virtual registers in this union that interfere with this
  105. // query's live virtual register.
  106. //
  107. // The query state is one of:
  108. //
  109. // 1. CheckedFirstInterference == false: Iterators are uninitialized.
  110. // 2. SeenAllInterferences == true: InterferingVRegs complete, iterators unused.
  111. // 3. Iterators left at the last seen intersection.
  112. //
  113. unsigned
  114. LiveIntervalUnion::Query::collectInterferingVRegs(unsigned MaxInterferingRegs) {
  115. // Fast path return if we already have the desired information.
  116. if (SeenAllInterferences || InterferingVRegs.size() >= MaxInterferingRegs)
  117. return InterferingVRegs.size();
  118. // Set up iterators on the first call.
  119. if (!CheckedFirstInterference) {
  120. CheckedFirstInterference = true;
  121. // Quickly skip interference check for empty sets.
  122. if (LR->empty() || LiveUnion->empty()) {
  123. SeenAllInterferences = true;
  124. return 0;
  125. }
  126. // In most cases, the union will start before LR.
  127. LRI = LR->begin();
  128. LiveUnionI.setMap(LiveUnion->getMap());
  129. LiveUnionI.find(LRI->start);
  130. }
  131. LiveRange::const_iterator LREnd = LR->end();
  132. const LiveInterval *RecentReg = nullptr;
  133. while (LiveUnionI.valid()) {
  134. assert(LRI != LREnd && "Reached end of LR");
  135. // Check for overlapping interference.
  136. while (LRI->start < LiveUnionI.stop() && LRI->end > LiveUnionI.start()) {
  137. // This is an overlap, record the interfering register.
  138. const LiveInterval *VReg = LiveUnionI.value();
  139. if (VReg != RecentReg && !isSeenInterference(VReg)) {
  140. RecentReg = VReg;
  141. InterferingVRegs.push_back(VReg);
  142. if (InterferingVRegs.size() >= MaxInterferingRegs)
  143. return InterferingVRegs.size();
  144. }
  145. // This LiveUnion segment is no longer interesting.
  146. if (!(++LiveUnionI).valid()) {
  147. SeenAllInterferences = true;
  148. return InterferingVRegs.size();
  149. }
  150. }
  151. // The iterators are now not overlapping, LiveUnionI has been advanced
  152. // beyond LRI.
  153. assert(LRI->end <= LiveUnionI.start() && "Expected non-overlap");
  154. // Advance the iterator that ends first.
  155. LRI = LR->advanceTo(LRI, LiveUnionI.start());
  156. if (LRI == LREnd)
  157. break;
  158. // Detect overlap, handle above.
  159. if (LRI->start < LiveUnionI.stop())
  160. continue;
  161. // Still not overlapping. Catch up LiveUnionI.
  162. LiveUnionI.advanceTo(LRI->start);
  163. }
  164. SeenAllInterferences = true;
  165. return InterferingVRegs.size();
  166. }
  167. void LiveIntervalUnion::Array::init(LiveIntervalUnion::Allocator &Alloc,
  168. unsigned NSize) {
  169. // Reuse existing allocation.
  170. if (NSize == Size)
  171. return;
  172. clear();
  173. Size = NSize;
  174. LIUs = static_cast<LiveIntervalUnion*>(
  175. safe_malloc(sizeof(LiveIntervalUnion)*NSize));
  176. for (unsigned i = 0; i != Size; ++i)
  177. new(LIUs + i) LiveIntervalUnion(Alloc);
  178. }
  179. void LiveIntervalUnion::Array::clear() {
  180. if (!LIUs)
  181. return;
  182. for (unsigned i = 0; i != Size; ++i)
  183. LIUs[i].~LiveIntervalUnion();
  184. free(LIUs);
  185. Size = 0;
  186. LIUs = nullptr;
  187. }