CallingConvLower.cpp 11 KB

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  1. //===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // This file implements the CCState class, used for lowering and implementing
  10. // calling conventions.
  11. //
  12. //===----------------------------------------------------------------------===//
  13. #include "llvm/CodeGen/CallingConvLower.h"
  14. #include "llvm/CodeGen/MachineFrameInfo.h"
  15. #include "llvm/CodeGen/MachineFunction.h"
  16. #include "llvm/CodeGen/TargetLowering.h"
  17. #include "llvm/CodeGen/TargetRegisterInfo.h"
  18. #include "llvm/CodeGen/TargetSubtargetInfo.h"
  19. #include "llvm/MC/MCRegisterInfo.h"
  20. #include "llvm/Support/Debug.h"
  21. #include "llvm/Support/ErrorHandling.h"
  22. #include "llvm/Support/SaveAndRestore.h"
  23. #include "llvm/Support/raw_ostream.h"
  24. using namespace llvm;
  25. CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf,
  26. SmallVectorImpl<CCValAssign> &locs, LLVMContext &C)
  27. : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
  28. TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C) {
  29. // No stack is used.
  30. StackOffset = 0;
  31. clearByValRegsInfo();
  32. UsedRegs.resize((TRI.getNumRegs()+31)/32);
  33. }
  34. /// Allocate space on the stack large enough to pass an argument by value.
  35. /// The size and alignment information of the argument is encoded in
  36. /// its parameter attribute.
  37. void CCState::HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
  38. CCValAssign::LocInfo LocInfo, int MinSize,
  39. Align MinAlign, ISD::ArgFlagsTy ArgFlags) {
  40. Align Alignment = ArgFlags.getNonZeroByValAlign();
  41. unsigned Size = ArgFlags.getByValSize();
  42. if (MinSize > (int)Size)
  43. Size = MinSize;
  44. if (MinAlign > Alignment)
  45. Alignment = MinAlign;
  46. ensureMaxAlignment(Alignment);
  47. MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size, Alignment);
  48. Size = unsigned(alignTo(Size, MinAlign));
  49. unsigned Offset = AllocateStack(Size, Alignment);
  50. addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
  51. }
  52. /// Mark a register and all of its aliases as allocated.
  53. void CCState::MarkAllocated(MCPhysReg Reg) {
  54. for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
  55. UsedRegs[*AI / 32] |= 1 << (*AI & 31);
  56. }
  57. void CCState::MarkUnallocated(MCPhysReg Reg) {
  58. for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
  59. UsedRegs[*AI / 32] &= ~(1 << (*AI & 31));
  60. }
  61. bool CCState::IsShadowAllocatedReg(MCRegister Reg) const {
  62. if (!isAllocated(Reg))
  63. return false;
  64. for (auto const &ValAssign : Locs)
  65. if (ValAssign.isRegLoc() && TRI.regsOverlap(ValAssign.getLocReg(), Reg))
  66. return false;
  67. return true;
  68. }
  69. /// Analyze an array of argument values,
  70. /// incorporating info about the formals into this state.
  71. void
  72. CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
  73. CCAssignFn Fn) {
  74. unsigned NumArgs = Ins.size();
  75. for (unsigned i = 0; i != NumArgs; ++i) {
  76. MVT ArgVT = Ins[i].VT;
  77. ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
  78. if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this))
  79. report_fatal_error("unable to allocate function argument #" + Twine(i));
  80. }
  81. }
  82. /// Analyze the return values of a function, returning true if the return can
  83. /// be performed without sret-demotion and false otherwise.
  84. bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
  85. CCAssignFn Fn) {
  86. // Determine which register each value should be copied into.
  87. for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
  88. MVT VT = Outs[i].VT;
  89. ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
  90. if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
  91. return false;
  92. }
  93. return true;
  94. }
  95. /// Analyze the returned values of a return,
  96. /// incorporating info about the result values into this state.
  97. void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
  98. CCAssignFn Fn) {
  99. // Determine which register each value should be copied into.
  100. for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
  101. MVT VT = Outs[i].VT;
  102. ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
  103. if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
  104. report_fatal_error("unable to allocate function return #" + Twine(i));
  105. }
  106. }
  107. /// Analyze the outgoing arguments to a call,
  108. /// incorporating info about the passed values into this state.
  109. void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
  110. CCAssignFn Fn) {
  111. unsigned NumOps = Outs.size();
  112. for (unsigned i = 0; i != NumOps; ++i) {
  113. MVT ArgVT = Outs[i].VT;
  114. ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
  115. if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
  116. #ifndef NDEBUG
  117. dbgs() << "Call operand #" << i << " has unhandled type "
  118. << EVT(ArgVT).getEVTString() << '\n';
  119. #endif
  120. llvm_unreachable(nullptr);
  121. }
  122. }
  123. }
  124. /// Same as above except it takes vectors of types and argument flags.
  125. void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
  126. SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
  127. CCAssignFn Fn) {
  128. unsigned NumOps = ArgVTs.size();
  129. for (unsigned i = 0; i != NumOps; ++i) {
  130. MVT ArgVT = ArgVTs[i];
  131. ISD::ArgFlagsTy ArgFlags = Flags[i];
  132. if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
  133. #ifndef NDEBUG
  134. dbgs() << "Call operand #" << i << " has unhandled type "
  135. << EVT(ArgVT).getEVTString() << '\n';
  136. #endif
  137. llvm_unreachable(nullptr);
  138. }
  139. }
  140. }
  141. /// Analyze the return values of a call, incorporating info about the passed
  142. /// values into this state.
  143. void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
  144. CCAssignFn Fn) {
  145. for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
  146. MVT VT = Ins[i].VT;
  147. ISD::ArgFlagsTy Flags = Ins[i].Flags;
  148. if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
  149. #ifndef NDEBUG
  150. dbgs() << "Call result #" << i << " has unhandled type "
  151. << EVT(VT).getEVTString() << '\n';
  152. #endif
  153. llvm_unreachable(nullptr);
  154. }
  155. }
  156. }
  157. /// Same as above except it's specialized for calls that produce a single value.
  158. void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) {
  159. if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
  160. #ifndef NDEBUG
  161. dbgs() << "Call result has unhandled type "
  162. << EVT(VT).getEVTString() << '\n';
  163. #endif
  164. llvm_unreachable(nullptr);
  165. }
  166. }
  167. void CCState::ensureMaxAlignment(Align Alignment) {
  168. if (!AnalyzingMustTailForwardedRegs)
  169. MF.getFrameInfo().ensureMaxAlignment(Alignment);
  170. }
  171. static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) {
  172. if (VT.isVector())
  173. return true; // Assume -msse-regparm might be in effect.
  174. if (!VT.isInteger())
  175. return false;
  176. return (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall);
  177. }
  178. void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
  179. MVT VT, CCAssignFn Fn) {
  180. unsigned SavedStackOffset = StackOffset;
  181. Align SavedMaxStackArgAlign = MaxStackArgAlign;
  182. unsigned NumLocs = Locs.size();
  183. // Set the 'inreg' flag if it is used for this calling convention.
  184. ISD::ArgFlagsTy Flags;
  185. if (isValueTypeInRegForCC(CallingConv, VT))
  186. Flags.setInReg();
  187. // Allocate something of this value type repeatedly until we get assigned a
  188. // location in memory.
  189. bool HaveRegParm;
  190. do {
  191. if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
  192. #ifndef NDEBUG
  193. dbgs() << "Call has unhandled type " << EVT(VT).getEVTString()
  194. << " while computing remaining regparms\n";
  195. #endif
  196. llvm_unreachable(nullptr);
  197. }
  198. HaveRegParm = Locs.back().isRegLoc();
  199. } while (HaveRegParm);
  200. // Copy all the registers from the value locations we added.
  201. assert(NumLocs < Locs.size() && "CC assignment failed to add location");
  202. for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I)
  203. if (Locs[I].isRegLoc())
  204. Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
  205. // Clear the assigned values and stack memory. We leave the registers marked
  206. // as allocated so that future queries don't return the same registers, i.e.
  207. // when i64 and f64 are both passed in GPRs.
  208. StackOffset = SavedStackOffset;
  209. MaxStackArgAlign = SavedMaxStackArgAlign;
  210. Locs.truncate(NumLocs);
  211. }
  212. void CCState::analyzeMustTailForwardedRegisters(
  213. SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
  214. CCAssignFn Fn) {
  215. // Oftentimes calling conventions will not user register parameters for
  216. // variadic functions, so we need to assume we're not variadic so that we get
  217. // all the registers that might be used in a non-variadic call.
  218. SaveAndRestore SavedVarArg(IsVarArg, false);
  219. SaveAndRestore SavedMustTail(AnalyzingMustTailForwardedRegs, true);
  220. for (MVT RegVT : RegParmTypes) {
  221. SmallVector<MCPhysReg, 8> RemainingRegs;
  222. getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
  223. const TargetLowering *TL = MF.getSubtarget().getTargetLowering();
  224. const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
  225. for (MCPhysReg PReg : RemainingRegs) {
  226. Register VReg = MF.addLiveIn(PReg, RC);
  227. Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
  228. }
  229. }
  230. }
  231. bool CCState::resultsCompatible(CallingConv::ID CalleeCC,
  232. CallingConv::ID CallerCC, MachineFunction &MF,
  233. LLVMContext &C,
  234. const SmallVectorImpl<ISD::InputArg> &Ins,
  235. CCAssignFn CalleeFn, CCAssignFn CallerFn) {
  236. if (CalleeCC == CallerCC)
  237. return true;
  238. SmallVector<CCValAssign, 4> RVLocs1;
  239. CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C);
  240. CCInfo1.AnalyzeCallResult(Ins, CalleeFn);
  241. SmallVector<CCValAssign, 4> RVLocs2;
  242. CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
  243. CCInfo2.AnalyzeCallResult(Ins, CallerFn);
  244. auto AreCompatible = [](const CCValAssign &Loc1, const CCValAssign &Loc2) {
  245. assert(!Loc1.isPendingLoc() && !Loc2.isPendingLoc() &&
  246. "The location must have been decided by now");
  247. // Must fill the same part of their locations.
  248. if (Loc1.getLocInfo() != Loc2.getLocInfo())
  249. return false;
  250. // Must both be in the same registers, or both in memory at the same offset.
  251. if (Loc1.isRegLoc() && Loc2.isRegLoc())
  252. return Loc1.getLocReg() == Loc2.getLocReg();
  253. if (Loc1.isMemLoc() && Loc2.isMemLoc())
  254. return Loc1.getLocMemOffset() == Loc2.getLocMemOffset();
  255. llvm_unreachable("Unknown location kind");
  256. };
  257. return std::equal(RVLocs1.begin(), RVLocs1.end(), RVLocs2.begin(),
  258. RVLocs2.end(), AreCompatible);
  259. }