hfi1_ioctl.h 6.5 KB

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  1. /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
  2. /*
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * Copyright(c) 2015 Intel Corporation.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of version 2 of the GNU General Public License as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * BSD LICENSE
  21. *
  22. * Copyright(c) 2015 Intel Corporation.
  23. *
  24. * Redistribution and use in source and binary forms, with or without
  25. * modification, are permitted provided that the following conditions
  26. * are met:
  27. *
  28. * - Redistributions of source code must retain the above copyright
  29. * notice, this list of conditions and the following disclaimer.
  30. * - Redistributions in binary form must reproduce the above copyright
  31. * notice, this list of conditions and the following disclaimer in
  32. * the documentation and/or other materials provided with the
  33. * distribution.
  34. * - Neither the name of Intel Corporation nor the names of its
  35. * contributors may be used to endorse or promote products derived
  36. * from this software without specific prior written permission.
  37. *
  38. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  39. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  40. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  41. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  42. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  43. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  44. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  45. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  46. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  47. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  48. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  49. *
  50. */
  51. #ifndef _LINUX__HFI1_IOCTL_H
  52. #define _LINUX__HFI1_IOCTL_H
  53. #include <linux/types.h>
  54. /*
  55. * This structure is passed to the driver to tell it where
  56. * user code buffers are, sizes, etc. The offsets and sizes of the
  57. * fields must remain unchanged, for binary compatibility. It can
  58. * be extended, if userversion is changed so user code can tell, if needed
  59. */
  60. struct hfi1_user_info {
  61. /*
  62. * version of user software, to detect compatibility issues.
  63. * Should be set to HFI1_USER_SWVERSION.
  64. */
  65. __u32 userversion;
  66. __u32 pad;
  67. /*
  68. * If two or more processes wish to share a context, each process
  69. * must set the subcontext_cnt and subcontext_id to the same
  70. * values. The only restriction on the subcontext_id is that
  71. * it be unique for a given node.
  72. */
  73. __u16 subctxt_cnt;
  74. __u16 subctxt_id;
  75. /* 128bit UUID passed in by PSM. */
  76. __u8 uuid[16];
  77. };
  78. struct hfi1_ctxt_info {
  79. __aligned_u64 runtime_flags; /* chip/drv runtime flags (HFI1_CAP_*) */
  80. __u32 rcvegr_size; /* size of each eager buffer */
  81. __u16 num_active; /* number of active units */
  82. __u16 unit; /* unit (chip) assigned to caller */
  83. __u16 ctxt; /* ctxt on unit assigned to caller */
  84. __u16 subctxt; /* subctxt on unit assigned to caller */
  85. __u16 rcvtids; /* number of Rcv TIDs for this context */
  86. __u16 credits; /* number of PIO credits for this context */
  87. __u16 numa_node; /* NUMA node of the assigned device */
  88. __u16 rec_cpu; /* cpu # for affinity (0xffff if none) */
  89. __u16 send_ctxt; /* send context in use by this user context */
  90. __u16 egrtids; /* number of RcvArray entries for Eager Rcvs */
  91. __u16 rcvhdrq_cnt; /* number of RcvHdrQ entries */
  92. __u16 rcvhdrq_entsize; /* size (in bytes) for each RcvHdrQ entry */
  93. __u16 sdma_ring_size; /* number of entries in SDMA request ring */
  94. };
  95. struct hfi1_tid_info {
  96. /* virtual address of first page in transfer */
  97. __aligned_u64 vaddr;
  98. /* pointer to tid array. this array is big enough */
  99. __aligned_u64 tidlist;
  100. /* number of tids programmed by this request */
  101. __u32 tidcnt;
  102. /* length of transfer buffer programmed by this request */
  103. __u32 length;
  104. };
  105. /*
  106. * This structure is returned by the driver immediately after
  107. * open to get implementation-specific info, and info specific to this
  108. * instance.
  109. *
  110. * This struct must have explicit pad fields where type sizes
  111. * may result in different alignments between 32 and 64 bit
  112. * programs, since the 64 bit * bit kernel requires the user code
  113. * to have matching offsets
  114. */
  115. struct hfi1_base_info {
  116. /* version of hardware, for feature checking. */
  117. __u32 hw_version;
  118. /* version of software, for feature checking. */
  119. __u32 sw_version;
  120. /* Job key */
  121. __u16 jkey;
  122. __u16 padding1;
  123. /*
  124. * The special QP (queue pair) value that identifies PSM
  125. * protocol packet from standard IB packets.
  126. */
  127. __u32 bthqp;
  128. /* PIO credit return address, */
  129. __aligned_u64 sc_credits_addr;
  130. /*
  131. * Base address of write-only pio buffers for this process.
  132. * Each buffer has sendpio_credits*64 bytes.
  133. */
  134. __aligned_u64 pio_bufbase_sop;
  135. /*
  136. * Base address of write-only pio buffers for this process.
  137. * Each buffer has sendpio_credits*64 bytes.
  138. */
  139. __aligned_u64 pio_bufbase;
  140. /* address where receive buffer queue is mapped into */
  141. __aligned_u64 rcvhdr_bufbase;
  142. /* base address of Eager receive buffers. */
  143. __aligned_u64 rcvegr_bufbase;
  144. /* base address of SDMA completion ring */
  145. __aligned_u64 sdma_comp_bufbase;
  146. /*
  147. * User register base for init code, not to be used directly by
  148. * protocol or applications. Always maps real chip register space.
  149. * the register addresses are:
  150. * ur_rcvhdrhead, ur_rcvhdrtail, ur_rcvegrhead, ur_rcvegrtail,
  151. * ur_rcvtidflow
  152. */
  153. __aligned_u64 user_regbase;
  154. /* notification events */
  155. __aligned_u64 events_bufbase;
  156. /* status page */
  157. __aligned_u64 status_bufbase;
  158. /* rcvhdrtail update */
  159. __aligned_u64 rcvhdrtail_base;
  160. /*
  161. * shared memory pages for subctxts if ctxt is shared; these cover
  162. * all the processes in the group sharing a single context.
  163. * all have enough space for the num_subcontexts value on this job.
  164. */
  165. __aligned_u64 subctxt_uregbase;
  166. __aligned_u64 subctxt_rcvegrbuf;
  167. __aligned_u64 subctxt_rcvhdrbuf;
  168. };
  169. #endif /* _LINIUX__HFI1_IOCTL_H */