gf_4vect_mad_avx2_gfni.asm 6.9 KB

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  1. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  2. ; Copyright(c) 2023 Intel Corporation All rights reserved.
  3. ;
  4. ; Redistribution and use in source and binary forms, with or without
  5. ; modification, are permitted provided that the following conditions
  6. ; are met:
  7. ; * Redistributions of source code must retain the above copyright
  8. ; notice, this list of conditions and the following disclaimer.
  9. ; * Redistributions in binary form must reproduce the above copyright
  10. ; notice, this list of conditions and the following disclaimer in
  11. ; the documentation and/or other materials provided with the
  12. ; distribution.
  13. ; * Neither the name of Intel Corporation nor the names of its
  14. ; contributors may be used to endorse or promote products derived
  15. ; from this software without specific prior written permission.
  16. ;
  17. ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20. ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21. ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22. ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23. ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24. ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25. ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26. ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27. ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  29. ;;;
  30. ;;; gf_4vect_mad_avx2_gfni(len, vec, vec_i, mul_array, src, dest);
  31. ;;;
  32. %include "reg_sizes.asm"
  33. %include "gf_vect_gfni.inc"
  34. %include "memcpy.asm"
  35. %if AS_FEATURE_LEVEL >= 10
  36. %ifidn __OUTPUT_FORMAT__, elf64
  37. %define arg0 rdi
  38. %define arg1 rsi
  39. %define arg2 rdx
  40. %define arg3 rcx
  41. %define arg4 r8
  42. %define arg5 r9
  43. %define tmp r11
  44. %define tmp2 r10
  45. %define tmp3 r12
  46. %define func(x) x: endbranch
  47. %macro FUNC_SAVE 0
  48. push r12
  49. %endmacro
  50. %macro FUNC_RESTORE 0
  51. pop r12
  52. %endmacro
  53. %endif
  54. %ifidn __OUTPUT_FORMAT__, win64
  55. %define arg0 rcx
  56. %define arg1 rdx
  57. %define arg2 r8
  58. %define arg3 r9
  59. %define arg4 r12 ; must be saved, loaded and restored
  60. %define arg5 r13 ; must be saved and restored
  61. %define tmp r11
  62. %define tmp2 r10
  63. %define tmp3 r14
  64. %define stack_size 16*7 + 3*8
  65. %define arg(x) [rsp + stack_size + 8 + 8*x]
  66. %define func(x) proc_frame x
  67. %macro FUNC_SAVE 0
  68. sub rsp, stack_size
  69. vmovdqa [rsp + 0*16], xmm6
  70. vmovdqa [rsp + 1*16], xmm7
  71. vmovdqa [rsp + 2*16], xmm8
  72. vmovdqa [rsp + 3*16], xmm9
  73. vmovdqa [rsp + 4*16], xmm10
  74. vmovdqa [rsp + 5*16], xmm11
  75. vmovdqa [rsp + 6*16], xmm12
  76. mov [rsp + 7*16 + 0*8], r12
  77. mov [rsp + 7*16 + 1*8], r13
  78. mov [rsp + 7*16 + 2*8], r14
  79. end_prolog
  80. mov arg4, arg(4)
  81. mov arg5, arg(5)
  82. %endmacro
  83. %macro FUNC_RESTORE 0
  84. vmovdqa xmm6, [rsp + 0*16]
  85. vmovdqa xmm7, [rsp + 1*16]
  86. vmovdqa xmm8, [rsp + 2*16]
  87. vmovdqa xmm9, [rsp + 3*16]
  88. vmovdqa xmm10, [rsp + 4*16]
  89. vmovdqa xmm11, [rsp + 5*16]
  90. vmovdqa xmm12, [rsp + 6*16]
  91. mov r12, [rsp + 7*16 + 0*8]
  92. mov r13, [rsp + 7*16 + 1*8]
  93. mov r14, [rsp + 7*16 + 2*8]
  94. add rsp, stack_size
  95. %endmacro
  96. %endif
  97. %define len arg0
  98. %define vec arg1
  99. %define vec_i arg2
  100. %define mul_array arg3
  101. %define src arg4
  102. %define dest1 arg5
  103. %define pos rax
  104. %define dest2 mul_array
  105. %define dest3 vec_i
  106. %define dest4 tmp3
  107. %ifndef EC_ALIGNED_ADDR
  108. ;;; Use Un-aligned load/store
  109. %define XLDR vmovdqu
  110. %define XSTR vmovdqu
  111. %else
  112. ;;; Use Non-temporal load/stor
  113. %ifdef NO_NT_LDST
  114. %define XLDR vmovdqa
  115. %define XSTR vmovdqa
  116. %else
  117. %define XLDR vmovntdqa
  118. %define XSTR vmovntdq
  119. %endif
  120. %endif
  121. default rel
  122. [bits 64]
  123. section .text
  124. %define x0 ymm0
  125. %define xd1 ymm1
  126. %define xd2 ymm2
  127. %define xd3 ymm3
  128. %define xd4 ymm4
  129. %define xgft1 ymm5
  130. %define xgft2 ymm6
  131. %define xgft3 ymm7
  132. %define xgft4 ymm8
  133. %define xret1 ymm9
  134. %define xret2 ymm10
  135. %define xret3 ymm11
  136. %define xret4 ymm12
  137. ;;
  138. ;; Encodes 32 bytes of a single source into 4x 32 bytes (parity disks)
  139. ;;
  140. %macro ENCODE_32B_4 0
  141. ;; get next source vector
  142. XLDR x0, [src + pos]
  143. ;; get next dest vectors
  144. XLDR xd1, [dest1 + pos]
  145. XLDR xd2, [dest2 + pos]
  146. XLDR xd3, [dest3 + pos]
  147. XLDR xd4, [dest4 + pos]
  148. GF_MUL_XOR VEX, x0, xgft1, xret1, xd1, xgft2, xret2, xd2, \
  149. xgft3, xret3, xd3, xgft4, xret4, xd4
  150. XSTR [dest1 + pos], xd1
  151. XSTR [dest2 + pos], xd2
  152. XSTR [dest3 + pos], xd3
  153. XSTR [dest4 + pos], xd4
  154. %endmacro
  155. ;;
  156. ;; Encodes less than 32 bytes of a single source into 4x parity disks
  157. ;;
  158. %macro ENCODE_LT_32B_4 1
  159. %define %%LEN %1
  160. ;; get next source vector
  161. simd_load_avx2 x0, src + pos, %%LEN, tmp, tmp2
  162. ;; get next dest vectors
  163. simd_load_avx2 xd1, dest1 + pos, %%LEN, tmp, tmp2
  164. simd_load_avx2 xd2, dest2 + pos, %%LEN, tmp, tmp2
  165. simd_load_avx2 xd3, dest3 + pos, %%LEN, tmp, tmp2
  166. simd_load_avx2 xd4, dest4 + pos, %%LEN, tmp, tmp2
  167. GF_MUL_XOR VEX, x0, xgft1, xret1, xd1, xgft2, xret2, xd2, \
  168. xgft3, xret3, xd3, xgft4, xret4, xd4
  169. lea dest1, [dest1 + pos]
  170. simd_store_avx2 dest1, xd1, %%LEN, tmp, tmp2
  171. lea dest2, [dest2 + pos]
  172. simd_store_avx2 dest2, xd2, %%LEN, tmp, tmp2
  173. lea dest3, [dest3 + pos]
  174. simd_store_avx2 dest3, xd3, %%LEN, tmp, tmp2
  175. lea dest4, [dest4 + pos]
  176. simd_store_avx2 dest4, xd4, %%LEN, tmp, tmp2
  177. %endmacro
  178. align 16
  179. global gf_4vect_mad_avx2_gfni, function
  180. func(gf_4vect_mad_avx2_gfni)
  181. FUNC_SAVE
  182. xor pos, pos
  183. shl vec_i, 3 ;Multiply by 8
  184. shl vec, 3 ;Multiply by 8
  185. lea tmp, [mul_array + vec_i]
  186. lea tmp2,[vec*3]
  187. vbroadcastsd xgft1, [tmp]
  188. vbroadcastsd xgft2, [tmp + vec]
  189. vbroadcastsd xgft3, [tmp + vec*2]
  190. vbroadcastsd xgft4, [tmp + tmp2]
  191. mov dest2, [dest1 + 8] ; reuse mul_array
  192. mov dest3, [dest1 + 2*8] ; reuse vec_i
  193. mov dest4, [dest1 + 3*8]
  194. mov dest1, [dest1]
  195. cmp len, 32
  196. jl .len_lt_32
  197. .loop32:
  198. ENCODE_32B_4 ;; loop on 32 bytes at a time
  199. add pos, 32
  200. sub len, 32
  201. cmp len, 32
  202. jge .loop32
  203. .len_lt_32:
  204. cmp len, 0
  205. jle .exit
  206. ENCODE_LT_32B_4 len ;; encode final bytes
  207. .exit:
  208. vzeroupper
  209. FUNC_RESTORE
  210. ret
  211. endproc_frame
  212. %endif ; if AS_FEATURE_LEVEL >= 10