gf_2vect_dot_prod_avx512.asm 6.0 KB

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  1. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  2. ; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
  3. ;
  4. ; Redistribution and use in source and binary forms, with or without
  5. ; modification, are permitted provided that the following conditions
  6. ; are met:
  7. ; * Redistributions of source code must retain the above copyright
  8. ; notice, this list of conditions and the following disclaimer.
  9. ; * Redistributions in binary form must reproduce the above copyright
  10. ; notice, this list of conditions and the following disclaimer in
  11. ; the documentation and/or other materials provided with the
  12. ; distribution.
  13. ; * Neither the name of Intel Corporation nor the names of its
  14. ; contributors may be used to endorse or promote products derived
  15. ; from this software without specific prior written permission.
  16. ;
  17. ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20. ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21. ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22. ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23. ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24. ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25. ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26. ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27. ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  29. ;;;
  30. ;;; gf_2vect_dot_prod_avx512(len, vec, *g_tbls, **buffs, **dests);
  31. ;;;
  32. %include "reg_sizes.asm"
  33. %ifdef HAVE_AS_KNOWS_AVX512
  34. %ifidn __OUTPUT_FORMAT__, elf64
  35. %define arg0 rdi
  36. %define arg1 rsi
  37. %define arg2 rdx
  38. %define arg3 rcx
  39. %define arg4 r8
  40. %define arg5 r9
  41. %define tmp r11
  42. %define tmp2 r10
  43. %define tmp3 r12 ; must be saved and restored
  44. %define return rax
  45. %define PS 8
  46. %define LOG_PS 3
  47. %define func(x) x: endbranch
  48. %macro FUNC_SAVE 0
  49. push r12
  50. %endmacro
  51. %macro FUNC_RESTORE 0
  52. pop r12
  53. %endmacro
  54. %endif
  55. %ifidn __OUTPUT_FORMAT__, win64
  56. %define arg0 rcx
  57. %define arg1 rdx
  58. %define arg2 r8
  59. %define arg3 r9
  60. %define arg4 r12 ; must be saved, loaded and restored
  61. %define arg5 r15 ; must be saved and restored
  62. %define tmp r11
  63. %define tmp2 r10
  64. %define tmp3 r13 ; must be saved and restored
  65. %define return rax
  66. %define PS 8
  67. %define LOG_PS 3
  68. %define stack_size 3*16 + 3*8 ; must be an odd multiple of 8
  69. %define arg(x) [rsp + stack_size + PS + PS*x]
  70. %define func(x) proc_frame x
  71. %macro FUNC_SAVE 0
  72. alloc_stack stack_size
  73. vmovdqa [rsp + 0*16], xmm6
  74. vmovdqa [rsp + 1*16], xmm7
  75. vmovdqa [rsp + 2*16], xmm8
  76. save_reg r12, 3*16 + 0*8
  77. save_reg r13, 3*16 + 1*8
  78. save_reg r15, 3*16 + 2*8
  79. end_prolog
  80. mov arg4, arg(4)
  81. %endmacro
  82. %macro FUNC_RESTORE 0
  83. vmovdqa xmm6, [rsp + 0*16]
  84. vmovdqa xmm7, [rsp + 1*16]
  85. vmovdqa xmm8, [rsp + 2*16]
  86. mov r12, [rsp + 3*16 + 0*8]
  87. mov r13, [rsp + 3*16 + 1*8]
  88. mov r15, [rsp + 3*16 + 2*8]
  89. add rsp, stack_size
  90. %endmacro
  91. %endif
  92. %define len arg0
  93. %define vec arg1
  94. %define mul_array arg2
  95. %define src arg3
  96. %define dest1 arg4
  97. %define ptr arg5
  98. %define vec_i tmp2
  99. %define dest2 tmp3
  100. %define pos return
  101. %ifndef EC_ALIGNED_ADDR
  102. ;;; Use Un-aligned load/store
  103. %define XLDR vmovdqu8
  104. %define XSTR vmovdqu8
  105. %else
  106. ;;; Use Non-temporal load/stor
  107. %ifdef NO_NT_LDST
  108. %define XLDR vmovdqa64
  109. %define XSTR vmovdqa64
  110. %else
  111. %define XLDR vmovntdqa
  112. %define XSTR vmovntdq
  113. %endif
  114. %endif
  115. %define xmask0f zmm8
  116. %define xgft1_lo zmm7
  117. %define xgft1_loy ymm7
  118. %define xgft1_hi zmm6
  119. %define xgft2_lo zmm5
  120. %define xgft2_loy ymm5
  121. %define xgft2_hi zmm4
  122. %define x0 zmm0
  123. %define xtmpa zmm1
  124. %define xp1 zmm2
  125. %define xp2 zmm3
  126. default rel
  127. [bits 64]
  128. section .text
  129. align 16
  130. global gf_2vect_dot_prod_avx512, function
  131. func(gf_2vect_dot_prod_avx512)
  132. FUNC_SAVE
  133. sub len, 64
  134. jl .return_fail
  135. xor pos, pos
  136. mov tmp, 0x0f
  137. vpbroadcastb xmask0f, tmp ;Construct mask 0x0f0f0f...
  138. sal vec, LOG_PS ;vec *= PS. Make vec_i count by PS
  139. mov dest2, [dest1+PS]
  140. mov dest1, [dest1]
  141. .loop64:
  142. vpxorq xp1, xp1, xp1
  143. vpxorq xp2, xp2, xp2
  144. mov tmp, mul_array
  145. xor vec_i, vec_i
  146. .next_vect:
  147. mov ptr, [src+vec_i]
  148. XLDR x0, [ptr+pos] ;Get next source vector
  149. add vec_i, PS
  150. vpandq xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
  151. vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
  152. vpandq x0, x0, xmask0f ;Mask high src nibble in bits 4-0
  153. vmovdqu8 xgft1_loy, [tmp] ;Load array Ax{00}..{0f}, Ax{00}..{f0}
  154. vmovdqu8 xgft2_loy, [tmp+vec*(32/PS)] ;Load array Bx{00}..{0f}, Bx{00}..{f0}
  155. add tmp, 32
  156. vshufi64x2 xgft1_hi, xgft1_lo, xgft1_lo, 0x55
  157. vshufi64x2 xgft1_lo, xgft1_lo, xgft1_lo, 0x00
  158. vshufi64x2 xgft2_hi, xgft2_lo, xgft2_lo, 0x55
  159. vshufi64x2 xgft2_lo, xgft2_lo, xgft2_lo, 0x00
  160. vpshufb xgft1_hi, xgft1_hi, x0 ;Lookup mul table of high nibble
  161. vpshufb xgft1_lo, xgft1_lo, xtmpa ;Lookup mul table of low nibble
  162. vpxorq xgft1_hi, xgft1_hi, xgft1_lo ;GF add high and low partials
  163. vpxorq xp1, xp1, xgft1_hi ;xp1 += partial
  164. vpshufb xgft2_hi, xgft2_hi, x0 ;Lookup mul table of high nibble
  165. vpshufb xgft2_lo, xgft2_lo, xtmpa ;Lookup mul table of low nibble
  166. vpxorq xgft2_hi, xgft2_hi, xgft2_lo ;GF add high and low partials
  167. vpxorq xp2, xp2, xgft2_hi ;xp2 += partial
  168. cmp vec_i, vec
  169. jl .next_vect
  170. XSTR [dest1+pos], xp1
  171. XSTR [dest2+pos], xp2
  172. add pos, 64 ;Loop on 64 bytes at a time
  173. cmp pos, len
  174. jle .loop64
  175. lea tmp, [len + 64]
  176. cmp pos, tmp
  177. je .return_pass
  178. ;; Tail len
  179. mov pos, len ;Overlapped offset length-64
  180. jmp .loop64 ;Do one more overlap pass
  181. .return_pass:
  182. mov return, 0
  183. FUNC_RESTORE
  184. ret
  185. .return_fail:
  186. mov return, 1
  187. FUNC_RESTORE
  188. ret
  189. endproc_frame
  190. %else
  191. %ifidn __OUTPUT_FORMAT__, win64
  192. global no_gf_2vect_dot_prod_avx512
  193. no_gf_2vect_dot_prod_avx512:
  194. %endif
  195. %endif ; ifdef HAVE_AS_KNOWS_AVX512