WebAssemblyInstrConv.td 14 KB

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  1. //===-- WebAssemblyInstrConv.td-WebAssembly Conversion support -*- tablegen -*-=
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. ///
  9. /// \file
  10. /// WebAssembly datatype conversions, truncations, reinterpretations,
  11. /// promotions, and demotions operand code-gen constructs.
  12. ///
  13. //===----------------------------------------------------------------------===//
  14. defm I32_WRAP_I64 : I<(outs I32:$dst), (ins I64:$src), (outs), (ins),
  15. [(set I32:$dst, (trunc I64:$src))],
  16. "i32.wrap_i64\t$dst, $src", "i32.wrap_i64", 0xa7>;
  17. defm I64_EXTEND_S_I32 : I<(outs I64:$dst), (ins I32:$src), (outs), (ins),
  18. [(set I64:$dst, (sext I32:$src))],
  19. "i64.extend_i32_s\t$dst, $src", "i64.extend_i32_s",
  20. 0xac>;
  21. defm I64_EXTEND_U_I32 : I<(outs I64:$dst), (ins I32:$src), (outs), (ins),
  22. [(set I64:$dst, (zext I32:$src))],
  23. "i64.extend_i32_u\t$dst, $src", "i64.extend_i32_u",
  24. 0xad>;
  25. let Predicates = [HasSignExt] in {
  26. defm I32_EXTEND8_S_I32 : I<(outs I32:$dst), (ins I32:$src), (outs), (ins),
  27. [(set I32:$dst, (sext_inreg I32:$src, i8))],
  28. "i32.extend8_s\t$dst, $src", "i32.extend8_s",
  29. 0xc0>;
  30. defm I32_EXTEND16_S_I32 : I<(outs I32:$dst), (ins I32:$src), (outs), (ins),
  31. [(set I32:$dst, (sext_inreg I32:$src, i16))],
  32. "i32.extend16_s\t$dst, $src", "i32.extend16_s",
  33. 0xc1>;
  34. defm I64_EXTEND8_S_I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins),
  35. [(set I64:$dst, (sext_inreg I64:$src, i8))],
  36. "i64.extend8_s\t$dst, $src", "i64.extend8_s",
  37. 0xc2>;
  38. defm I64_EXTEND16_S_I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins),
  39. [(set I64:$dst, (sext_inreg I64:$src, i16))],
  40. "i64.extend16_s\t$dst, $src", "i64.extend16_s",
  41. 0xc3>;
  42. defm I64_EXTEND32_S_I64 : I<(outs I64:$dst), (ins I64:$src), (outs), (ins),
  43. [(set I64:$dst, (sext_inreg I64:$src, i32))],
  44. "i64.extend32_s\t$dst, $src", "i64.extend32_s",
  45. 0xc4>;
  46. } // Predicates = [HasSignExt]
  47. // Expand a "don't care" extend into zero-extend (chosen over sign-extend
  48. // somewhat arbitrarily, although it favors popular hardware architectures
  49. // and is conceptually a simpler operation).
  50. def : Pat<(i64 (anyext I32:$src)), (I64_EXTEND_U_I32 I32:$src)>;
  51. // Conversion from floating point to integer instructions which don't trap on
  52. // overflow or invalid.
  53. defm I32_TRUNC_S_SAT_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
  54. [(set I32:$dst, (fp_to_sint F32:$src))],
  55. "i32.trunc_sat_f32_s\t$dst, $src",
  56. "i32.trunc_sat_f32_s", 0xfc00>,
  57. Requires<[HasNontrappingFPToInt]>;
  58. defm I32_TRUNC_U_SAT_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
  59. [(set I32:$dst, (fp_to_uint F32:$src))],
  60. "i32.trunc_sat_f32_u\t$dst, $src",
  61. "i32.trunc_sat_f32_u", 0xfc01>,
  62. Requires<[HasNontrappingFPToInt]>;
  63. defm I64_TRUNC_S_SAT_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
  64. [(set I64:$dst, (fp_to_sint F32:$src))],
  65. "i64.trunc_sat_f32_s\t$dst, $src",
  66. "i64.trunc_sat_f32_s", 0xfc04>,
  67. Requires<[HasNontrappingFPToInt]>;
  68. defm I64_TRUNC_U_SAT_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
  69. [(set I64:$dst, (fp_to_uint F32:$src))],
  70. "i64.trunc_sat_f32_u\t$dst, $src",
  71. "i64.trunc_sat_f32_u", 0xfc05>,
  72. Requires<[HasNontrappingFPToInt]>;
  73. defm I32_TRUNC_S_SAT_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
  74. [(set I32:$dst, (fp_to_sint F64:$src))],
  75. "i32.trunc_sat_f64_s\t$dst, $src",
  76. "i32.trunc_sat_f64_s", 0xfc02>,
  77. Requires<[HasNontrappingFPToInt]>;
  78. defm I32_TRUNC_U_SAT_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
  79. [(set I32:$dst, (fp_to_uint F64:$src))],
  80. "i32.trunc_sat_f64_u\t$dst, $src",
  81. "i32.trunc_sat_f64_u", 0xfc03>,
  82. Requires<[HasNontrappingFPToInt]>;
  83. defm I64_TRUNC_S_SAT_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
  84. [(set I64:$dst, (fp_to_sint F64:$src))],
  85. "i64.trunc_sat_f64_s\t$dst, $src",
  86. "i64.trunc_sat_f64_s", 0xfc06>,
  87. Requires<[HasNontrappingFPToInt]>;
  88. defm I64_TRUNC_U_SAT_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
  89. [(set I64:$dst, (fp_to_uint F64:$src))],
  90. "i64.trunc_sat_f64_u\t$dst, $src",
  91. "i64.trunc_sat_f64_u", 0xfc07>,
  92. Requires<[HasNontrappingFPToInt]>;
  93. // Support the explicitly saturating operations as well.
  94. def : Pat<(fp_to_sint_sat F32:$src, i32), (I32_TRUNC_S_SAT_F32 F32:$src)>;
  95. def : Pat<(fp_to_uint_sat F32:$src, i32), (I32_TRUNC_U_SAT_F32 F32:$src)>;
  96. def : Pat<(fp_to_sint_sat F64:$src, i32), (I32_TRUNC_S_SAT_F64 F64:$src)>;
  97. def : Pat<(fp_to_uint_sat F64:$src, i32), (I32_TRUNC_U_SAT_F64 F64:$src)>;
  98. def : Pat<(fp_to_sint_sat F32:$src, i64), (I64_TRUNC_S_SAT_F32 F32:$src)>;
  99. def : Pat<(fp_to_uint_sat F32:$src, i64), (I64_TRUNC_U_SAT_F32 F32:$src)>;
  100. def : Pat<(fp_to_sint_sat F64:$src, i64), (I64_TRUNC_S_SAT_F64 F64:$src)>;
  101. def : Pat<(fp_to_uint_sat F64:$src, i64), (I64_TRUNC_U_SAT_F64 F64:$src)>;
  102. // Conversion from floating point to integer pseudo-instructions which don't
  103. // trap on overflow or invalid.
  104. let usesCustomInserter = 1, isCodeGenOnly = 1 in {
  105. defm FP_TO_SINT_I32_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
  106. [(set I32:$dst, (fp_to_sint F32:$src))], "", "", 0>,
  107. Requires<[NotHasNontrappingFPToInt]>;
  108. defm FP_TO_UINT_I32_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
  109. [(set I32:$dst, (fp_to_uint F32:$src))], "", "", 0>,
  110. Requires<[NotHasNontrappingFPToInt]>;
  111. defm FP_TO_SINT_I64_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
  112. [(set I64:$dst, (fp_to_sint F32:$src))], "", "", 0>,
  113. Requires<[NotHasNontrappingFPToInt]>;
  114. defm FP_TO_UINT_I64_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
  115. [(set I64:$dst, (fp_to_uint F32:$src))], "", "", 0>,
  116. Requires<[NotHasNontrappingFPToInt]>;
  117. defm FP_TO_SINT_I32_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
  118. [(set I32:$dst, (fp_to_sint F64:$src))], "", "", 0>,
  119. Requires<[NotHasNontrappingFPToInt]>;
  120. defm FP_TO_UINT_I32_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
  121. [(set I32:$dst, (fp_to_uint F64:$src))], "", "", 0>,
  122. Requires<[NotHasNontrappingFPToInt]>;
  123. defm FP_TO_SINT_I64_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
  124. [(set I64:$dst, (fp_to_sint F64:$src))], "", "", 0>,
  125. Requires<[NotHasNontrappingFPToInt]>;
  126. defm FP_TO_UINT_I64_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
  127. [(set I64:$dst, (fp_to_uint F64:$src))], "", "", 0>,
  128. Requires<[NotHasNontrappingFPToInt]>;
  129. } // usesCustomInserter, isCodeGenOnly = 1
  130. // Conversion from floating point to integer traps on overflow and invalid.
  131. let hasSideEffects = 1 in {
  132. defm I32_TRUNC_S_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
  133. [], "i32.trunc_f32_s\t$dst, $src", "i32.trunc_f32_s",
  134. 0xa8>;
  135. defm I32_TRUNC_U_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
  136. [], "i32.trunc_f32_u\t$dst, $src", "i32.trunc_f32_u",
  137. 0xa9>;
  138. defm I64_TRUNC_S_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
  139. [], "i64.trunc_f32_s\t$dst, $src", "i64.trunc_f32_s",
  140. 0xae>;
  141. defm I64_TRUNC_U_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
  142. [], "i64.trunc_f32_u\t$dst, $src", "i64.trunc_f32_u",
  143. 0xaf>;
  144. defm I32_TRUNC_S_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
  145. [], "i32.trunc_f64_s\t$dst, $src", "i32.trunc_f64_s",
  146. 0xaa>;
  147. defm I32_TRUNC_U_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
  148. [], "i32.trunc_f64_u\t$dst, $src", "i32.trunc_f64_u",
  149. 0xab>;
  150. defm I64_TRUNC_S_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
  151. [], "i64.trunc_f64_s\t$dst, $src", "i64.trunc_f64_s",
  152. 0xb0>;
  153. defm I64_TRUNC_U_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
  154. [], "i64.trunc_f64_u\t$dst, $src", "i64.trunc_f64_u",
  155. 0xb1>;
  156. } // hasSideEffects = 1
  157. def : Pat<(int_wasm_trunc_signed F32:$src),
  158. (I32_TRUNC_S_F32 F32:$src)>;
  159. def : Pat<(int_wasm_trunc_unsigned F32:$src),
  160. (I32_TRUNC_U_F32 F32:$src)>;
  161. def : Pat<(int_wasm_trunc_signed F64:$src),
  162. (I32_TRUNC_S_F64 F64:$src)>;
  163. def : Pat<(int_wasm_trunc_unsigned F64:$src),
  164. (I32_TRUNC_U_F64 F64:$src)>;
  165. def : Pat<(int_wasm_trunc_signed F32:$src),
  166. (I64_TRUNC_S_F32 F32:$src)>;
  167. def : Pat<(int_wasm_trunc_unsigned F32:$src),
  168. (I64_TRUNC_U_F32 F32:$src)>;
  169. def : Pat<(int_wasm_trunc_signed F64:$src),
  170. (I64_TRUNC_S_F64 F64:$src)>;
  171. def : Pat<(int_wasm_trunc_unsigned F64:$src),
  172. (I64_TRUNC_U_F64 F64:$src)>;
  173. defm F32_CONVERT_S_I32 : I<(outs F32:$dst), (ins I32:$src), (outs), (ins),
  174. [(set F32:$dst, (sint_to_fp I32:$src))],
  175. "f32.convert_i32_s\t$dst, $src", "f32.convert_i32_s",
  176. 0xb2>;
  177. defm F32_CONVERT_U_I32 : I<(outs F32:$dst), (ins I32:$src), (outs), (ins),
  178. [(set F32:$dst, (uint_to_fp I32:$src))],
  179. "f32.convert_i32_u\t$dst, $src", "f32.convert_i32_u",
  180. 0xb3>;
  181. defm F64_CONVERT_S_I32 : I<(outs F64:$dst), (ins I32:$src), (outs), (ins),
  182. [(set F64:$dst, (sint_to_fp I32:$src))],
  183. "f64.convert_i32_s\t$dst, $src", "f64.convert_i32_s",
  184. 0xb7>;
  185. defm F64_CONVERT_U_I32 : I<(outs F64:$dst), (ins I32:$src), (outs), (ins),
  186. [(set F64:$dst, (uint_to_fp I32:$src))],
  187. "f64.convert_i32_u\t$dst, $src", "f64.convert_i32_u",
  188. 0xb8>;
  189. defm F32_CONVERT_S_I64 : I<(outs F32:$dst), (ins I64:$src), (outs), (ins),
  190. [(set F32:$dst, (sint_to_fp I64:$src))],
  191. "f32.convert_i64_s\t$dst, $src", "f32.convert_i64_s",
  192. 0xb4>;
  193. defm F32_CONVERT_U_I64 : I<(outs F32:$dst), (ins I64:$src), (outs), (ins),
  194. [(set F32:$dst, (uint_to_fp I64:$src))],
  195. "f32.convert_i64_u\t$dst, $src", "f32.convert_i64_u",
  196. 0xb5>;
  197. defm F64_CONVERT_S_I64 : I<(outs F64:$dst), (ins I64:$src), (outs), (ins),
  198. [(set F64:$dst, (sint_to_fp I64:$src))],
  199. "f64.convert_i64_s\t$dst, $src", "f64.convert_i64_s",
  200. 0xb9>;
  201. defm F64_CONVERT_U_I64 : I<(outs F64:$dst), (ins I64:$src), (outs), (ins),
  202. [(set F64:$dst, (uint_to_fp I64:$src))],
  203. "f64.convert_i64_u\t$dst, $src", "f64.convert_i64_u",
  204. 0xba>;
  205. defm F64_PROMOTE_F32 : I<(outs F64:$dst), (ins F32:$src), (outs), (ins),
  206. [(set F64:$dst, (fpextend F32:$src))],
  207. "f64.promote_f32\t$dst, $src", "f64.promote_f32",
  208. 0xbb>;
  209. defm F32_DEMOTE_F64 : I<(outs F32:$dst), (ins F64:$src), (outs), (ins),
  210. [(set F32:$dst, (fpround F64:$src))],
  211. "f32.demote_f64\t$dst, $src", "f32.demote_f64",
  212. 0xb6>;
  213. defm I32_REINTERPRET_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
  214. [(set I32:$dst, (bitconvert F32:$src))],
  215. "i32.reinterpret_f32\t$dst, $src",
  216. "i32.reinterpret_f32", 0xbc>;
  217. defm F32_REINTERPRET_I32 : I<(outs F32:$dst), (ins I32:$src), (outs), (ins),
  218. [(set F32:$dst, (bitconvert I32:$src))],
  219. "f32.reinterpret_i32\t$dst, $src",
  220. "f32.reinterpret_i32", 0xbe>;
  221. defm I64_REINTERPRET_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
  222. [(set I64:$dst, (bitconvert F64:$src))],
  223. "i64.reinterpret_f64\t$dst, $src",
  224. "i64.reinterpret_f64", 0xbd>;
  225. defm F64_REINTERPRET_I64 : I<(outs F64:$dst), (ins I64:$src), (outs), (ins),
  226. [(set F64:$dst, (bitconvert I64:$src))],
  227. "f64.reinterpret_i64\t$dst, $src",
  228. "f64.reinterpret_i64", 0xbf>;