OrcABISupport.cpp 54 KB

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  1. //===------------- OrcABISupport.cpp - ABI specific support code ----------===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. #include "llvm/ExecutionEngine/Orc/OrcABISupport.h"
  9. #include "llvm/Support/FormatVariadic.h"
  10. #include "llvm/Support/Process.h"
  11. #include "llvm/Support/raw_ostream.h"
  12. #define DEBUG_TYPE "orc"
  13. using namespace llvm;
  14. template <typename ORCABI>
  15. bool stubAndPointerRangesOk(JITTargetAddress StubBlockAddr,
  16. JITTargetAddress PointerBlockAddr,
  17. unsigned NumStubs) {
  18. constexpr unsigned MaxDisp = ORCABI::StubToPointerMaxDisplacement;
  19. JITTargetAddress FirstStub = StubBlockAddr;
  20. JITTargetAddress LastStub = FirstStub + ((NumStubs - 1) * ORCABI::StubSize);
  21. JITTargetAddress FirstPointer = PointerBlockAddr;
  22. JITTargetAddress LastPointer =
  23. FirstPointer + ((NumStubs - 1) * ORCABI::StubSize);
  24. if (FirstStub < FirstPointer) {
  25. if (LastStub >= FirstPointer)
  26. return false; // Ranges overlap.
  27. return (FirstPointer - FirstStub <= MaxDisp) &&
  28. (LastPointer - LastStub <= MaxDisp); // out-of-range.
  29. }
  30. if (LastPointer >= FirstStub)
  31. return false; // Ranges overlap.
  32. return (FirstStub - FirstPointer <= MaxDisp) &&
  33. (LastStub - LastPointer <= MaxDisp);
  34. }
  35. namespace llvm {
  36. namespace orc {
  37. void OrcAArch64::writeResolverCode(char *ResolverWorkingMem,
  38. JITTargetAddress ResolverTargetAddress,
  39. JITTargetAddress ReentryFnAddr,
  40. JITTargetAddress ReentryCtxAddr) {
  41. const uint32_t ResolverCode[] = {
  42. // resolver_entry:
  43. 0xa9bf47fd, // 0x000: stp x29, x17, [sp, #-16]!
  44. 0x910003fd, // 0x004: mov x29, sp
  45. 0xa9bf73fb, // 0x008: stp x27, x28, [sp, #-16]!
  46. 0xa9bf6bf9, // 0x00c: stp x25, x26, [sp, #-16]!
  47. 0xa9bf63f7, // 0x010: stp x23, x24, [sp, #-16]!
  48. 0xa9bf5bf5, // 0x014: stp x21, x22, [sp, #-16]!
  49. 0xa9bf53f3, // 0x018: stp x19, x20, [sp, #-16]!
  50. 0xa9bf3fee, // 0x01c: stp x14, x15, [sp, #-16]!
  51. 0xa9bf37ec, // 0x020: stp x12, x13, [sp, #-16]!
  52. 0xa9bf2fea, // 0x024: stp x10, x11, [sp, #-16]!
  53. 0xa9bf27e8, // 0x028: stp x8, x9, [sp, #-16]!
  54. 0xa9bf1fe6, // 0x02c: stp x6, x7, [sp, #-16]!
  55. 0xa9bf17e4, // 0x030: stp x4, x5, [sp, #-16]!
  56. 0xa9bf0fe2, // 0x034: stp x2, x3, [sp, #-16]!
  57. 0xa9bf07e0, // 0x038: stp x0, x1, [sp, #-16]!
  58. 0xadbf7ffe, // 0x03c: stp q30, q31, [sp, #-32]!
  59. 0xadbf77fc, // 0x040: stp q28, q29, [sp, #-32]!
  60. 0xadbf6ffa, // 0x044: stp q26, q27, [sp, #-32]!
  61. 0xadbf67f8, // 0x048: stp q24, q25, [sp, #-32]!
  62. 0xadbf5ff6, // 0x04c: stp q22, q23, [sp, #-32]!
  63. 0xadbf57f4, // 0x050: stp q20, q21, [sp, #-32]!
  64. 0xadbf4ff2, // 0x054: stp q18, q19, [sp, #-32]!
  65. 0xadbf47f0, // 0x058: stp q16, q17, [sp, #-32]!
  66. 0xadbf3fee, // 0x05c: stp q14, q15, [sp, #-32]!
  67. 0xadbf37ec, // 0x060: stp q12, q13, [sp, #-32]!
  68. 0xadbf2fea, // 0x064: stp q10, q11, [sp, #-32]!
  69. 0xadbf27e8, // 0x068: stp q8, q9, [sp, #-32]!
  70. 0xadbf1fe6, // 0x06c: stp q6, q7, [sp, #-32]!
  71. 0xadbf17e4, // 0x070: stp q4, q5, [sp, #-32]!
  72. 0xadbf0fe2, // 0x074: stp q2, q3, [sp, #-32]!
  73. 0xadbf07e0, // 0x078: stp q0, q1, [sp, #-32]!
  74. 0x580004e0, // 0x07c: ldr x0, Lreentry_ctx_ptr
  75. 0xaa1e03e1, // 0x080: mov x1, x30
  76. 0xd1003021, // 0x084: sub x1, x1, #12
  77. 0x58000442, // 0x088: ldr x2, Lreentry_fn_ptr
  78. 0xd63f0040, // 0x08c: blr x2
  79. 0xaa0003f1, // 0x090: mov x17, x0
  80. 0xacc107e0, // 0x094: ldp q0, q1, [sp], #32
  81. 0xacc10fe2, // 0x098: ldp q2, q3, [sp], #32
  82. 0xacc117e4, // 0x09c: ldp q4, q5, [sp], #32
  83. 0xacc11fe6, // 0x0a0: ldp q6, q7, [sp], #32
  84. 0xacc127e8, // 0x0a4: ldp q8, q9, [sp], #32
  85. 0xacc12fea, // 0x0a8: ldp q10, q11, [sp], #32
  86. 0xacc137ec, // 0x0ac: ldp q12, q13, [sp], #32
  87. 0xacc13fee, // 0x0b0: ldp q14, q15, [sp], #32
  88. 0xacc147f0, // 0x0b4: ldp q16, q17, [sp], #32
  89. 0xacc14ff2, // 0x0b8: ldp q18, q19, [sp], #32
  90. 0xacc157f4, // 0x0bc: ldp q20, q21, [sp], #32
  91. 0xacc15ff6, // 0x0c0: ldp q22, q23, [sp], #32
  92. 0xacc167f8, // 0x0c4: ldp q24, q25, [sp], #32
  93. 0xacc16ffa, // 0x0c8: ldp q26, q27, [sp], #32
  94. 0xacc177fc, // 0x0cc: ldp q28, q29, [sp], #32
  95. 0xacc17ffe, // 0x0d0: ldp q30, q31, [sp], #32
  96. 0xa8c107e0, // 0x0d4: ldp x0, x1, [sp], #16
  97. 0xa8c10fe2, // 0x0d8: ldp x2, x3, [sp], #16
  98. 0xa8c117e4, // 0x0dc: ldp x4, x5, [sp], #16
  99. 0xa8c11fe6, // 0x0e0: ldp x6, x7, [sp], #16
  100. 0xa8c127e8, // 0x0e4: ldp x8, x9, [sp], #16
  101. 0xa8c12fea, // 0x0e8: ldp x10, x11, [sp], #16
  102. 0xa8c137ec, // 0x0ec: ldp x12, x13, [sp], #16
  103. 0xa8c13fee, // 0x0f0: ldp x14, x15, [sp], #16
  104. 0xa8c153f3, // 0x0f4: ldp x19, x20, [sp], #16
  105. 0xa8c15bf5, // 0x0f8: ldp x21, x22, [sp], #16
  106. 0xa8c163f7, // 0x0fc: ldp x23, x24, [sp], #16
  107. 0xa8c16bf9, // 0x100: ldp x25, x26, [sp], #16
  108. 0xa8c173fb, // 0x104: ldp x27, x28, [sp], #16
  109. 0xa8c17bfd, // 0x108: ldp x29, x30, [sp], #16
  110. 0xd65f0220, // 0x10c: ret x17
  111. 0x01234567, // 0x110: Lreentry_fn_ptr:
  112. 0xdeadbeef, // 0x114: .quad 0
  113. 0x98765432, // 0x118: Lreentry_ctx_ptr:
  114. 0xcafef00d // 0x11c: .quad 0
  115. };
  116. const unsigned ReentryFnAddrOffset = 0x110;
  117. const unsigned ReentryCtxAddrOffset = 0x118;
  118. memcpy(ResolverWorkingMem, ResolverCode, sizeof(ResolverCode));
  119. memcpy(ResolverWorkingMem + ReentryFnAddrOffset, &ReentryFnAddr,
  120. sizeof(uint64_t));
  121. memcpy(ResolverWorkingMem + ReentryCtxAddrOffset, &ReentryCtxAddr,
  122. sizeof(uint64_t));
  123. }
  124. void OrcAArch64::writeTrampolines(char *TrampolineBlockWorkingMem,
  125. JITTargetAddress TrampolineBlockTargetAddress,
  126. JITTargetAddress ResolverAddr,
  127. unsigned NumTrampolines) {
  128. unsigned OffsetToPtr = alignTo(NumTrampolines * TrampolineSize, 8);
  129. memcpy(TrampolineBlockWorkingMem + OffsetToPtr, &ResolverAddr,
  130. sizeof(uint64_t));
  131. // OffsetToPtr is actually the offset from the PC for the 2nd instruction, so
  132. // subtract 32-bits.
  133. OffsetToPtr -= 4;
  134. uint32_t *Trampolines =
  135. reinterpret_cast<uint32_t *>(TrampolineBlockWorkingMem);
  136. for (unsigned I = 0; I < NumTrampolines; ++I, OffsetToPtr -= TrampolineSize) {
  137. Trampolines[3 * I + 0] = 0xaa1e03f1; // mov x17, x30
  138. Trampolines[3 * I + 1] = 0x58000010 | (OffsetToPtr << 3); // adr x16, Lptr
  139. Trampolines[3 * I + 2] = 0xd63f0200; // blr x16
  140. }
  141. }
  142. void OrcAArch64::writeIndirectStubsBlock(
  143. char *StubsBlockWorkingMem, JITTargetAddress StubsBlockTargetAddress,
  144. JITTargetAddress PointersBlockTargetAddress, unsigned NumStubs) {
  145. // Stub format is:
  146. //
  147. // .section __orc_stubs
  148. // stub1:
  149. // ldr x0, ptr1 ; PC-rel load of ptr1
  150. // br x0 ; Jump to resolver
  151. // stub2:
  152. // ldr x0, ptr2 ; PC-rel load of ptr2
  153. // br x0 ; Jump to resolver
  154. //
  155. // ...
  156. //
  157. // .section __orc_ptrs
  158. // ptr1:
  159. // .quad 0x0
  160. // ptr2:
  161. // .quad 0x0
  162. //
  163. // ...
  164. static_assert(StubSize == PointerSize,
  165. "Pointer and stub size must match for algorithm below");
  166. assert(stubAndPointerRangesOk<OrcAArch64>(
  167. StubsBlockTargetAddress, PointersBlockTargetAddress, NumStubs) &&
  168. "PointersBlock is out of range");
  169. uint64_t PtrDisplacement =
  170. PointersBlockTargetAddress - StubsBlockTargetAddress;
  171. uint64_t *Stub = reinterpret_cast<uint64_t *>(StubsBlockWorkingMem);
  172. uint64_t PtrOffsetField = PtrDisplacement << 3;
  173. for (unsigned I = 0; I < NumStubs; ++I)
  174. Stub[I] = 0xd61f020058000010 | PtrOffsetField;
  175. }
  176. void OrcX86_64_Base::writeTrampolines(
  177. char *TrampolineBlockWorkingMem,
  178. JITTargetAddress TrampolineBlockTargetAddress,
  179. JITTargetAddress ResolverAddr, unsigned NumTrampolines) {
  180. unsigned OffsetToPtr = NumTrampolines * TrampolineSize;
  181. memcpy(TrampolineBlockWorkingMem + OffsetToPtr, &ResolverAddr,
  182. sizeof(uint64_t));
  183. uint64_t *Trampolines =
  184. reinterpret_cast<uint64_t *>(TrampolineBlockWorkingMem);
  185. uint64_t CallIndirPCRel = 0xf1c40000000015ff;
  186. for (unsigned I = 0; I < NumTrampolines; ++I, OffsetToPtr -= TrampolineSize)
  187. Trampolines[I] = CallIndirPCRel | ((OffsetToPtr - 6) << 16);
  188. }
  189. void OrcX86_64_Base::writeIndirectStubsBlock(
  190. char *StubsBlockWorkingMem, JITTargetAddress StubsBlockTargetAddress,
  191. JITTargetAddress PointersBlockTargetAddress, unsigned NumStubs) {
  192. // Stub format is:
  193. //
  194. // .section __orc_stubs
  195. // stub1:
  196. // jmpq *ptr1(%rip)
  197. // .byte 0xC4 ; <- Invalid opcode padding.
  198. // .byte 0xF1
  199. // stub2:
  200. // jmpq *ptr2(%rip)
  201. //
  202. // ...
  203. //
  204. // .section __orc_ptrs
  205. // ptr1:
  206. // .quad 0x0
  207. // ptr2:
  208. // .quad 0x0
  209. //
  210. // ...
  211. // Populate the stubs page stubs and mark it executable.
  212. static_assert(StubSize == PointerSize,
  213. "Pointer and stub size must match for algorithm below");
  214. assert(stubAndPointerRangesOk<OrcX86_64_Base>(
  215. StubsBlockTargetAddress, PointersBlockTargetAddress, NumStubs) &&
  216. "PointersBlock is out of range");
  217. uint64_t *Stub = reinterpret_cast<uint64_t *>(StubsBlockWorkingMem);
  218. uint64_t PtrOffsetField =
  219. (PointersBlockTargetAddress - StubsBlockTargetAddress - 6) << 16;
  220. for (unsigned I = 0; I < NumStubs; ++I)
  221. Stub[I] = 0xF1C40000000025ff | PtrOffsetField;
  222. }
  223. void OrcX86_64_SysV::writeResolverCode(char *ResolverWorkingMem,
  224. JITTargetAddress ResolverTargetAddress,
  225. JITTargetAddress ReentryFnAddr,
  226. JITTargetAddress ReentryCtxAddr) {
  227. LLVM_DEBUG({
  228. dbgs() << "Writing resolver code to "
  229. << formatv("{0:x16}", ResolverTargetAddress) << "\n";
  230. });
  231. const uint8_t ResolverCode[] = {
  232. // resolver_entry:
  233. 0x55, // 0x00: pushq %rbp
  234. 0x48, 0x89, 0xe5, // 0x01: movq %rsp, %rbp
  235. 0x50, // 0x04: pushq %rax
  236. 0x53, // 0x05: pushq %rbx
  237. 0x51, // 0x06: pushq %rcx
  238. 0x52, // 0x07: pushq %rdx
  239. 0x56, // 0x08: pushq %rsi
  240. 0x57, // 0x09: pushq %rdi
  241. 0x41, 0x50, // 0x0a: pushq %r8
  242. 0x41, 0x51, // 0x0c: pushq %r9
  243. 0x41, 0x52, // 0x0e: pushq %r10
  244. 0x41, 0x53, // 0x10: pushq %r11
  245. 0x41, 0x54, // 0x12: pushq %r12
  246. 0x41, 0x55, // 0x14: pushq %r13
  247. 0x41, 0x56, // 0x16: pushq %r14
  248. 0x41, 0x57, // 0x18: pushq %r15
  249. 0x48, 0x81, 0xec, 0x08, 0x02, 0x00, 0x00, // 0x1a: subq 0x208, %rsp
  250. 0x48, 0x0f, 0xae, 0x04, 0x24, // 0x21: fxsave64 (%rsp)
  251. 0x48, 0xbf, // 0x26: movabsq <CBMgr>, %rdi
  252. // 0x28: JIT re-entry ctx addr.
  253. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  254. 0x48, 0x8b, 0x75, 0x08, // 0x30: movq 8(%rbp), %rsi
  255. 0x48, 0x83, 0xee, 0x06, // 0x34: subq $6, %rsi
  256. 0x48, 0xb8, // 0x38: movabsq <REntry>, %rax
  257. // 0x3a: JIT re-entry fn addr:
  258. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  259. 0xff, 0xd0, // 0x42: callq *%rax
  260. 0x48, 0x89, 0x45, 0x08, // 0x44: movq %rax, 8(%rbp)
  261. 0x48, 0x0f, 0xae, 0x0c, 0x24, // 0x48: fxrstor64 (%rsp)
  262. 0x48, 0x81, 0xc4, 0x08, 0x02, 0x00, 0x00, // 0x4d: addq 0x208, %rsp
  263. 0x41, 0x5f, // 0x54: popq %r15
  264. 0x41, 0x5e, // 0x56: popq %r14
  265. 0x41, 0x5d, // 0x58: popq %r13
  266. 0x41, 0x5c, // 0x5a: popq %r12
  267. 0x41, 0x5b, // 0x5c: popq %r11
  268. 0x41, 0x5a, // 0x5e: popq %r10
  269. 0x41, 0x59, // 0x60: popq %r9
  270. 0x41, 0x58, // 0x62: popq %r8
  271. 0x5f, // 0x64: popq %rdi
  272. 0x5e, // 0x65: popq %rsi
  273. 0x5a, // 0x66: popq %rdx
  274. 0x59, // 0x67: popq %rcx
  275. 0x5b, // 0x68: popq %rbx
  276. 0x58, // 0x69: popq %rax
  277. 0x5d, // 0x6a: popq %rbp
  278. 0xc3, // 0x6b: retq
  279. };
  280. const unsigned ReentryFnAddrOffset = 0x3a;
  281. const unsigned ReentryCtxAddrOffset = 0x28;
  282. memcpy(ResolverWorkingMem, ResolverCode, sizeof(ResolverCode));
  283. memcpy(ResolverWorkingMem + ReentryFnAddrOffset, &ReentryFnAddr,
  284. sizeof(uint64_t));
  285. memcpy(ResolverWorkingMem + ReentryCtxAddrOffset, &ReentryCtxAddr,
  286. sizeof(uint64_t));
  287. }
  288. void OrcX86_64_Win32::writeResolverCode(char *ResolverWorkingMem,
  289. JITTargetAddress ResolverTargetAddress,
  290. JITTargetAddress ReentryFnAddr,
  291. JITTargetAddress ReentryCtxAddr) {
  292. // resolverCode is similar to OrcX86_64 with differences specific to windows
  293. // x64 calling convention: arguments go into rcx, rdx and come in reverse
  294. // order, shadow space allocation on stack
  295. const uint8_t ResolverCode[] = {
  296. // resolver_entry:
  297. 0x55, // 0x00: pushq %rbp
  298. 0x48, 0x89, 0xe5, // 0x01: movq %rsp, %rbp
  299. 0x50, // 0x04: pushq %rax
  300. 0x53, // 0x05: pushq %rbx
  301. 0x51, // 0x06: pushq %rcx
  302. 0x52, // 0x07: pushq %rdx
  303. 0x56, // 0x08: pushq %rsi
  304. 0x57, // 0x09: pushq %rdi
  305. 0x41, 0x50, // 0x0a: pushq %r8
  306. 0x41, 0x51, // 0x0c: pushq %r9
  307. 0x41, 0x52, // 0x0e: pushq %r10
  308. 0x41, 0x53, // 0x10: pushq %r11
  309. 0x41, 0x54, // 0x12: pushq %r12
  310. 0x41, 0x55, // 0x14: pushq %r13
  311. 0x41, 0x56, // 0x16: pushq %r14
  312. 0x41, 0x57, // 0x18: pushq %r15
  313. 0x48, 0x81, 0xec, 0x08, 0x02, 0x00, 0x00, // 0x1a: subq 0x208, %rsp
  314. 0x48, 0x0f, 0xae, 0x04, 0x24, // 0x21: fxsave64 (%rsp)
  315. 0x48, 0xb9, // 0x26: movabsq <CBMgr>, %rcx
  316. // 0x28: JIT re-entry ctx addr.
  317. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  318. 0x48, 0x8B, 0x55, 0x08, // 0x30: mov rdx, [rbp+0x8]
  319. 0x48, 0x83, 0xea, 0x06, // 0x34: sub rdx, 0x6
  320. 0x48, 0xb8, // 0x38: movabsq <REntry>, %rax
  321. // 0x3a: JIT re-entry fn addr:
  322. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  323. // 0x42: sub rsp, 0x20 (Allocate shadow space)
  324. 0x48, 0x83, 0xEC, 0x20,
  325. 0xff, 0xd0, // 0x46: callq *%rax
  326. // 0x48: add rsp, 0x20 (Free shadow space)
  327. 0x48, 0x83, 0xC4, 0x20,
  328. 0x48, 0x89, 0x45, 0x08, // 0x4C: movq %rax, 8(%rbp)
  329. 0x48, 0x0f, 0xae, 0x0c, 0x24, // 0x50: fxrstor64 (%rsp)
  330. 0x48, 0x81, 0xc4, 0x08, 0x02, 0x00, 0x00, // 0x55: addq 0x208, %rsp
  331. 0x41, 0x5f, // 0x5C: popq %r15
  332. 0x41, 0x5e, // 0x5E: popq %r14
  333. 0x41, 0x5d, // 0x60: popq %r13
  334. 0x41, 0x5c, // 0x62: popq %r12
  335. 0x41, 0x5b, // 0x64: popq %r11
  336. 0x41, 0x5a, // 0x66: popq %r10
  337. 0x41, 0x59, // 0x68: popq %r9
  338. 0x41, 0x58, // 0x6a: popq %r8
  339. 0x5f, // 0x6c: popq %rdi
  340. 0x5e, // 0x6d: popq %rsi
  341. 0x5a, // 0x6e: popq %rdx
  342. 0x59, // 0x6f: popq %rcx
  343. 0x5b, // 0x70: popq %rbx
  344. 0x58, // 0x71: popq %rax
  345. 0x5d, // 0x72: popq %rbp
  346. 0xc3, // 0x73: retq
  347. };
  348. const unsigned ReentryFnAddrOffset = 0x3a;
  349. const unsigned ReentryCtxAddrOffset = 0x28;
  350. memcpy(ResolverWorkingMem, ResolverCode, sizeof(ResolverCode));
  351. memcpy(ResolverWorkingMem + ReentryFnAddrOffset, &ReentryFnAddr,
  352. sizeof(uint64_t));
  353. memcpy(ResolverWorkingMem + ReentryCtxAddrOffset, &ReentryCtxAddr,
  354. sizeof(uint64_t));
  355. }
  356. void OrcI386::writeResolverCode(char *ResolverWorkingMem,
  357. JITTargetAddress ResolverTargetAddress,
  358. JITTargetAddress ReentryFnAddr,
  359. JITTargetAddress ReentryCtxAddr) {
  360. assert((ReentryFnAddr >> 32) == 0 && "ReentryFnAddr out of range");
  361. assert((ReentryCtxAddr >> 32) == 0 && "ReentryCtxAddr out of range");
  362. const uint8_t ResolverCode[] = {
  363. // resolver_entry:
  364. 0x55, // 0x00: pushl %ebp
  365. 0x89, 0xe5, // 0x01: movl %esp, %ebp
  366. 0x54, // 0x03: pushl %esp
  367. 0x83, 0xe4, 0xf0, // 0x04: andl $-0x10, %esp
  368. 0x50, // 0x07: pushl %eax
  369. 0x53, // 0x08: pushl %ebx
  370. 0x51, // 0x09: pushl %ecx
  371. 0x52, // 0x0a: pushl %edx
  372. 0x56, // 0x0b: pushl %esi
  373. 0x57, // 0x0c: pushl %edi
  374. 0x81, 0xec, 0x18, 0x02, 0x00, 0x00, // 0x0d: subl $0x218, %esp
  375. 0x0f, 0xae, 0x44, 0x24, 0x10, // 0x13: fxsave 0x10(%esp)
  376. 0x8b, 0x75, 0x04, // 0x18: movl 0x4(%ebp), %esi
  377. 0x83, 0xee, 0x05, // 0x1b: subl $0x5, %esi
  378. 0x89, 0x74, 0x24, 0x04, // 0x1e: movl %esi, 0x4(%esp)
  379. 0xc7, 0x04, 0x24, 0x00, 0x00, 0x00,
  380. 0x00, // 0x22: movl <cbmgr>, (%esp)
  381. 0xb8, 0x00, 0x00, 0x00, 0x00, // 0x29: movl <reentry>, %eax
  382. 0xff, 0xd0, // 0x2e: calll *%eax
  383. 0x89, 0x45, 0x04, // 0x30: movl %eax, 0x4(%ebp)
  384. 0x0f, 0xae, 0x4c, 0x24, 0x10, // 0x33: fxrstor 0x10(%esp)
  385. 0x81, 0xc4, 0x18, 0x02, 0x00, 0x00, // 0x38: addl $0x218, %esp
  386. 0x5f, // 0x3e: popl %edi
  387. 0x5e, // 0x3f: popl %esi
  388. 0x5a, // 0x40: popl %edx
  389. 0x59, // 0x41: popl %ecx
  390. 0x5b, // 0x42: popl %ebx
  391. 0x58, // 0x43: popl %eax
  392. 0x8b, 0x65, 0xfc, // 0x44: movl -0x4(%ebp), %esp
  393. 0x5d, // 0x48: popl %ebp
  394. 0xc3 // 0x49: retl
  395. };
  396. const unsigned ReentryFnAddrOffset = 0x2a;
  397. const unsigned ReentryCtxAddrOffset = 0x25;
  398. memcpy(ResolverWorkingMem, ResolverCode, sizeof(ResolverCode));
  399. memcpy(ResolverWorkingMem + ReentryFnAddrOffset, &ReentryFnAddr,
  400. sizeof(uint32_t));
  401. memcpy(ResolverWorkingMem + ReentryCtxAddrOffset, &ReentryCtxAddr,
  402. sizeof(uint32_t));
  403. }
  404. void OrcI386::writeTrampolines(char *TrampolineWorkingMem,
  405. JITTargetAddress TrampolineBlockTargetAddress,
  406. JITTargetAddress ResolverAddr,
  407. unsigned NumTrampolines) {
  408. assert((ResolverAddr >> 32) == 0 && "ResolverAddr out of range");
  409. uint64_t CallRelImm = 0xF1C4C400000000e8;
  410. uint64_t ResolverRel = ResolverAddr - TrampolineBlockTargetAddress - 5;
  411. uint64_t *Trampolines = reinterpret_cast<uint64_t *>(TrampolineWorkingMem);
  412. for (unsigned I = 0; I < NumTrampolines; ++I, ResolverRel -= TrampolineSize)
  413. Trampolines[I] = CallRelImm | (ResolverRel << 8);
  414. }
  415. void OrcI386::writeIndirectStubsBlock(
  416. char *StubsBlockWorkingMem, JITTargetAddress StubsBlockTargetAddress,
  417. JITTargetAddress PointersBlockTargetAddress, unsigned NumStubs) {
  418. assert((StubsBlockTargetAddress >> 32) == 0 &&
  419. "StubsBlockTargetAddress is out of range");
  420. assert((PointersBlockTargetAddress >> 32) == 0 &&
  421. "PointersBlockTargetAddress is out of range");
  422. // Stub format is:
  423. //
  424. // .section __orc_stubs
  425. // stub1:
  426. // jmpq *ptr1
  427. // .byte 0xC4 ; <- Invalid opcode padding.
  428. // .byte 0xF1
  429. // stub2:
  430. // jmpq *ptr2
  431. //
  432. // ...
  433. //
  434. // .section __orc_ptrs
  435. // ptr1:
  436. // .quad 0x0
  437. // ptr2:
  438. // .quad 0x0
  439. //
  440. // ...
  441. assert(stubAndPointerRangesOk<OrcI386>(
  442. StubsBlockTargetAddress, PointersBlockTargetAddress, NumStubs) &&
  443. "PointersBlock is out of range");
  444. uint64_t *Stub = reinterpret_cast<uint64_t *>(StubsBlockWorkingMem);
  445. uint64_t PtrAddr = PointersBlockTargetAddress;
  446. for (unsigned I = 0; I < NumStubs; ++I, PtrAddr += 4)
  447. Stub[I] = 0xF1C40000000025ff | (PtrAddr << 16);
  448. }
  449. void OrcMips32_Base::writeResolverCode(char *ResolverWorkingMem,
  450. JITTargetAddress ResolverTargetAddress,
  451. JITTargetAddress ReentryFnAddr,
  452. JITTargetAddress ReentryCtxAddr,
  453. bool isBigEndian) {
  454. const uint32_t ResolverCode[] = {
  455. // resolver_entry:
  456. 0x27bdff98, // 0x00: addiu $sp,$sp,-104
  457. 0xafa20000, // 0x04: sw $v0,0($sp)
  458. 0xafa30004, // 0x08: sw $v1,4($sp)
  459. 0xafa40008, // 0x0c: sw $a0,8($sp)
  460. 0xafa5000c, // 0x10: sw $a1,12($sp)
  461. 0xafa60010, // 0x14: sw $a2,16($sp)
  462. 0xafa70014, // 0x18: sw $a3,20($sp)
  463. 0xafb00018, // 0x1c: sw $s0,24($sp)
  464. 0xafb1001c, // 0x20: sw $s1,28($sp)
  465. 0xafb20020, // 0x24: sw $s2,32($sp)
  466. 0xafb30024, // 0x28: sw $s3,36($sp)
  467. 0xafb40028, // 0x2c: sw $s4,40($sp)
  468. 0xafb5002c, // 0x30: sw $s5,44($sp)
  469. 0xafb60030, // 0x34: sw $s6,48($sp)
  470. 0xafb70034, // 0x38: sw $s7,52($sp)
  471. 0xafa80038, // 0x3c: sw $t0,56($sp)
  472. 0xafa9003c, // 0x40: sw $t1,60($sp)
  473. 0xafaa0040, // 0x44: sw $t2,64($sp)
  474. 0xafab0044, // 0x48: sw $t3,68($sp)
  475. 0xafac0048, // 0x4c: sw $t4,72($sp)
  476. 0xafad004c, // 0x50: sw $t5,76($sp)
  477. 0xafae0050, // 0x54: sw $t6,80($sp)
  478. 0xafaf0054, // 0x58: sw $t7,84($sp)
  479. 0xafb80058, // 0x5c: sw $t8,88($sp)
  480. 0xafb9005c, // 0x60: sw $t9,92($sp)
  481. 0xafbe0060, // 0x64: sw $fp,96($sp)
  482. 0xafbf0064, // 0x68: sw $ra,100($sp)
  483. // JIT re-entry ctx addr.
  484. 0x00000000, // 0x6c: lui $a0,ctx
  485. 0x00000000, // 0x70: addiu $a0,$a0,ctx
  486. 0x03e02825, // 0x74: move $a1, $ra
  487. 0x24a5ffec, // 0x78: addiu $a1,$a1,-20
  488. // JIT re-entry fn addr:
  489. 0x00000000, // 0x7c: lui $t9,reentry
  490. 0x00000000, // 0x80: addiu $t9,$t9,reentry
  491. 0x0320f809, // 0x84: jalr $t9
  492. 0x00000000, // 0x88: nop
  493. 0x8fbf0064, // 0x8c: lw $ra,100($sp)
  494. 0x8fbe0060, // 0x90: lw $fp,96($sp)
  495. 0x8fb9005c, // 0x94: lw $t9,92($sp)
  496. 0x8fb80058, // 0x98: lw $t8,88($sp)
  497. 0x8faf0054, // 0x9c: lw $t7,84($sp)
  498. 0x8fae0050, // 0xa0: lw $t6,80($sp)
  499. 0x8fad004c, // 0xa4: lw $t5,76($sp)
  500. 0x8fac0048, // 0xa8: lw $t4,72($sp)
  501. 0x8fab0044, // 0xac: lw $t3,68($sp)
  502. 0x8faa0040, // 0xb0: lw $t2,64($sp)
  503. 0x8fa9003c, // 0xb4: lw $t1,60($sp)
  504. 0x8fa80038, // 0xb8: lw $t0,56($sp)
  505. 0x8fb70034, // 0xbc: lw $s7,52($sp)
  506. 0x8fb60030, // 0xc0: lw $s6,48($sp)
  507. 0x8fb5002c, // 0xc4: lw $s5,44($sp)
  508. 0x8fb40028, // 0xc8: lw $s4,40($sp)
  509. 0x8fb30024, // 0xcc: lw $s3,36($sp)
  510. 0x8fb20020, // 0xd0: lw $s2,32($sp)
  511. 0x8fb1001c, // 0xd4: lw $s1,28($sp)
  512. 0x8fb00018, // 0xd8: lw $s0,24($sp)
  513. 0x8fa70014, // 0xdc: lw $a3,20($sp)
  514. 0x8fa60010, // 0xe0: lw $a2,16($sp)
  515. 0x8fa5000c, // 0xe4: lw $a1,12($sp)
  516. 0x8fa40008, // 0xe8: lw $a0,8($sp)
  517. 0x27bd0068, // 0xec: addiu $sp,$sp,104
  518. 0x0300f825, // 0xf0: move $ra, $t8
  519. 0x03200008, // 0xf4: jr $t9
  520. 0x00000000, // 0xf8: move $t9, $v0/v1
  521. };
  522. const unsigned ReentryFnAddrOffset = 0x7c; // JIT re-entry fn addr lui
  523. const unsigned ReentryCtxAddrOffset = 0x6c; // JIT re-entry context addr lui
  524. const unsigned Offsett = 0xf8;
  525. memcpy(ResolverWorkingMem, ResolverCode, sizeof(ResolverCode));
  526. // Depending on endian return value will be in v0 or v1.
  527. uint32_t MoveVxT9 = isBigEndian ? 0x0060c825 : 0x0040c825;
  528. memcpy(ResolverWorkingMem + Offsett, &MoveVxT9, sizeof(MoveVxT9));
  529. uint32_t ReentryCtxLUi =
  530. 0x3c040000 | (((ReentryCtxAddr + 0x8000) >> 16) & 0xFFFF);
  531. uint32_t ReentryCtxADDiu = 0x24840000 | ((ReentryCtxAddr)&0xFFFF);
  532. memcpy(ResolverWorkingMem + ReentryCtxAddrOffset, &ReentryCtxLUi,
  533. sizeof(ReentryCtxLUi));
  534. memcpy(ResolverWorkingMem + ReentryCtxAddrOffset + 4, &ReentryCtxADDiu,
  535. sizeof(ReentryCtxADDiu));
  536. uint32_t ReentryFnLUi =
  537. 0x3c190000 | (((ReentryFnAddr + 0x8000) >> 16) & 0xFFFF);
  538. uint32_t ReentryFnADDiu = 0x27390000 | ((ReentryFnAddr)&0xFFFF);
  539. memcpy(ResolverWorkingMem + ReentryFnAddrOffset, &ReentryFnLUi,
  540. sizeof(ReentryFnLUi));
  541. memcpy(ResolverWorkingMem + ReentryFnAddrOffset + 4, &ReentryFnADDiu,
  542. sizeof(ReentryFnADDiu));
  543. }
  544. void OrcMips32_Base::writeTrampolines(
  545. char *TrampolineBlockWorkingMem,
  546. JITTargetAddress TrampolineBlockTargetAddress,
  547. JITTargetAddress ResolverAddr, unsigned NumTrampolines) {
  548. assert((ResolverAddr >> 32) == 0 && "ResolverAddr out of range");
  549. uint32_t *Trampolines =
  550. reinterpret_cast<uint32_t *>(TrampolineBlockWorkingMem);
  551. uint32_t RHiAddr = ((ResolverAddr + 0x8000) >> 16);
  552. for (unsigned I = 0; I < NumTrampolines; ++I) {
  553. // move $t8,$ra
  554. // lui $t9,ResolverAddr
  555. // addiu $t9,$t9,ResolverAddr
  556. // jalr $t9
  557. // nop
  558. Trampolines[5 * I + 0] = 0x03e0c025;
  559. Trampolines[5 * I + 1] = 0x3c190000 | (RHiAddr & 0xFFFF);
  560. Trampolines[5 * I + 2] = 0x27390000 | (ResolverAddr & 0xFFFF);
  561. Trampolines[5 * I + 3] = 0x0320f809;
  562. Trampolines[5 * I + 4] = 0x00000000;
  563. }
  564. }
  565. void OrcMips32_Base::writeIndirectStubsBlock(
  566. char *StubsBlockWorkingMem, JITTargetAddress StubsBlockTargetAddress,
  567. JITTargetAddress PointersBlockTargetAddress, unsigned NumStubs) {
  568. assert((StubsBlockTargetAddress >> 32) == 0 &&
  569. "InitialPtrVal is out of range");
  570. // Stub format is:
  571. //
  572. // .section __orc_stubs
  573. // stub1:
  574. // lui $t9, ptr1
  575. // lw $t9, %lo(ptr1)($t9)
  576. // jr $t9
  577. // stub2:
  578. // lui $t9, ptr2
  579. // lw $t9,%lo(ptr1)($t9)
  580. // jr $t9
  581. //
  582. // ...
  583. //
  584. // .section __orc_ptrs
  585. // ptr1:
  586. // .word 0x0
  587. // ptr2:
  588. // .word 0x0
  589. //
  590. // i..
  591. assert(stubAndPointerRangesOk<OrcMips32_Base>(
  592. StubsBlockTargetAddress, PointersBlockTargetAddress, NumStubs) &&
  593. "PointersBlock is out of range");
  594. // Populate the stubs page stubs and mark it executable.
  595. uint32_t *Stub = reinterpret_cast<uint32_t *>(StubsBlockWorkingMem);
  596. uint64_t PtrAddr = PointersBlockTargetAddress;
  597. for (unsigned I = 0; I < NumStubs; ++I) {
  598. uint32_t HiAddr = ((PtrAddr + 0x8000) >> 16);
  599. Stub[4 * I + 0] = 0x3c190000 | (HiAddr & 0xFFFF); // lui $t9,ptr1
  600. Stub[4 * I + 1] = 0x8f390000 | (PtrAddr & 0xFFFF); // lw $t9,%lo(ptr1)($t9)
  601. Stub[4 * I + 2] = 0x03200008; // jr $t9
  602. Stub[4 * I + 3] = 0x00000000; // nop
  603. PtrAddr += 4;
  604. }
  605. }
  606. void OrcMips64::writeResolverCode(char *ResolverWorkingMem,
  607. JITTargetAddress ResolverTargetAddress,
  608. JITTargetAddress ReentryFnAddr,
  609. JITTargetAddress ReentryCtxAddr) {
  610. const uint32_t ResolverCode[] = {
  611. //resolver_entry:
  612. 0x67bdff30, // 0x00: daddiu $sp,$sp,-208
  613. 0xffa20000, // 0x04: sd v0,0(sp)
  614. 0xffa30008, // 0x08: sd v1,8(sp)
  615. 0xffa40010, // 0x0c: sd a0,16(sp)
  616. 0xffa50018, // 0x10: sd a1,24(sp)
  617. 0xffa60020, // 0x14: sd a2,32(sp)
  618. 0xffa70028, // 0x18: sd a3,40(sp)
  619. 0xffa80030, // 0x1c: sd a4,48(sp)
  620. 0xffa90038, // 0x20: sd a5,56(sp)
  621. 0xffaa0040, // 0x24: sd a6,64(sp)
  622. 0xffab0048, // 0x28: sd a7,72(sp)
  623. 0xffac0050, // 0x2c: sd t0,80(sp)
  624. 0xffad0058, // 0x30: sd t1,88(sp)
  625. 0xffae0060, // 0x34: sd t2,96(sp)
  626. 0xffaf0068, // 0x38: sd t3,104(sp)
  627. 0xffb00070, // 0x3c: sd s0,112(sp)
  628. 0xffb10078, // 0x40: sd s1,120(sp)
  629. 0xffb20080, // 0x44: sd s2,128(sp)
  630. 0xffb30088, // 0x48: sd s3,136(sp)
  631. 0xffb40090, // 0x4c: sd s4,144(sp)
  632. 0xffb50098, // 0x50: sd s5,152(sp)
  633. 0xffb600a0, // 0x54: sd s6,160(sp)
  634. 0xffb700a8, // 0x58: sd s7,168(sp)
  635. 0xffb800b0, // 0x5c: sd t8,176(sp)
  636. 0xffb900b8, // 0x60: sd t9,184(sp)
  637. 0xffbe00c0, // 0x64: sd fp,192(sp)
  638. 0xffbf00c8, // 0x68: sd ra,200(sp)
  639. // JIT re-entry ctx addr.
  640. 0x00000000, // 0x6c: lui $a0,heighest(ctx)
  641. 0x00000000, // 0x70: daddiu $a0,$a0,heigher(ctx)
  642. 0x00000000, // 0x74: dsll $a0,$a0,16
  643. 0x00000000, // 0x78: daddiu $a0,$a0,hi(ctx)
  644. 0x00000000, // 0x7c: dsll $a0,$a0,16
  645. 0x00000000, // 0x80: daddiu $a0,$a0,lo(ctx)
  646. 0x03e02825, // 0x84: move $a1, $ra
  647. 0x64a5ffdc, // 0x88: daddiu $a1,$a1,-36
  648. // JIT re-entry fn addr:
  649. 0x00000000, // 0x8c: lui $t9,reentry
  650. 0x00000000, // 0x90: daddiu $t9,$t9,reentry
  651. 0x00000000, // 0x94: dsll $t9,$t9,
  652. 0x00000000, // 0x98: daddiu $t9,$t9,
  653. 0x00000000, // 0x9c: dsll $t9,$t9,
  654. 0x00000000, // 0xa0: daddiu $t9,$t9,
  655. 0x0320f809, // 0xa4: jalr $t9
  656. 0x00000000, // 0xa8: nop
  657. 0xdfbf00c8, // 0xac: ld ra, 200(sp)
  658. 0xdfbe00c0, // 0xb0: ld fp, 192(sp)
  659. 0xdfb900b8, // 0xb4: ld t9, 184(sp)
  660. 0xdfb800b0, // 0xb8: ld t8, 176(sp)
  661. 0xdfb700a8, // 0xbc: ld s7, 168(sp)
  662. 0xdfb600a0, // 0xc0: ld s6, 160(sp)
  663. 0xdfb50098, // 0xc4: ld s5, 152(sp)
  664. 0xdfb40090, // 0xc8: ld s4, 144(sp)
  665. 0xdfb30088, // 0xcc: ld s3, 136(sp)
  666. 0xdfb20080, // 0xd0: ld s2, 128(sp)
  667. 0xdfb10078, // 0xd4: ld s1, 120(sp)
  668. 0xdfb00070, // 0xd8: ld s0, 112(sp)
  669. 0xdfaf0068, // 0xdc: ld t3, 104(sp)
  670. 0xdfae0060, // 0xe0: ld t2, 96(sp)
  671. 0xdfad0058, // 0xe4: ld t1, 88(sp)
  672. 0xdfac0050, // 0xe8: ld t0, 80(sp)
  673. 0xdfab0048, // 0xec: ld a7, 72(sp)
  674. 0xdfaa0040, // 0xf0: ld a6, 64(sp)
  675. 0xdfa90038, // 0xf4: ld a5, 56(sp)
  676. 0xdfa80030, // 0xf8: ld a4, 48(sp)
  677. 0xdfa70028, // 0xfc: ld a3, 40(sp)
  678. 0xdfa60020, // 0x100: ld a2, 32(sp)
  679. 0xdfa50018, // 0x104: ld a1, 24(sp)
  680. 0xdfa40010, // 0x108: ld a0, 16(sp)
  681. 0xdfa30008, // 0x10c: ld v1, 8(sp)
  682. 0x67bd00d0, // 0x110: daddiu $sp,$sp,208
  683. 0x0300f825, // 0x114: move $ra, $t8
  684. 0x03200008, // 0x118: jr $t9
  685. 0x0040c825, // 0x11c: move $t9, $v0
  686. };
  687. const unsigned ReentryFnAddrOffset = 0x8c; // JIT re-entry fn addr lui
  688. const unsigned ReentryCtxAddrOffset = 0x6c; // JIT re-entry ctx addr lui
  689. memcpy(ResolverWorkingMem, ResolverCode, sizeof(ResolverCode));
  690. uint32_t ReentryCtxLUi =
  691. 0x3c040000 | (((ReentryCtxAddr + 0x800080008000) >> 48) & 0xFFFF);
  692. uint32_t ReentryCtxDADDiu =
  693. 0x64840000 | (((ReentryCtxAddr + 0x80008000) >> 32) & 0xFFFF);
  694. uint32_t ReentryCtxDSLL = 0x00042438;
  695. uint32_t ReentryCtxDADDiu2 =
  696. 0x64840000 | ((((ReentryCtxAddr + 0x8000) >> 16) & 0xFFFF));
  697. uint32_t ReentryCtxDSLL2 = 0x00042438;
  698. uint32_t ReentryCtxDADDiu3 = 0x64840000 | ((ReentryCtxAddr)&0xFFFF);
  699. memcpy(ResolverWorkingMem + ReentryCtxAddrOffset, &ReentryCtxLUi,
  700. sizeof(ReentryCtxLUi));
  701. memcpy(ResolverWorkingMem + (ReentryCtxAddrOffset + 4), &ReentryCtxDADDiu,
  702. sizeof(ReentryCtxDADDiu));
  703. memcpy(ResolverWorkingMem + (ReentryCtxAddrOffset + 8), &ReentryCtxDSLL,
  704. sizeof(ReentryCtxDSLL));
  705. memcpy(ResolverWorkingMem + (ReentryCtxAddrOffset + 12), &ReentryCtxDADDiu2,
  706. sizeof(ReentryCtxDADDiu2));
  707. memcpy(ResolverWorkingMem + (ReentryCtxAddrOffset + 16), &ReentryCtxDSLL2,
  708. sizeof(ReentryCtxDSLL2));
  709. memcpy(ResolverWorkingMem + (ReentryCtxAddrOffset + 20), &ReentryCtxDADDiu3,
  710. sizeof(ReentryCtxDADDiu3));
  711. uint32_t ReentryFnLUi =
  712. 0x3c190000 | (((ReentryFnAddr + 0x800080008000) >> 48) & 0xFFFF);
  713. uint32_t ReentryFnDADDiu =
  714. 0x67390000 | (((ReentryFnAddr + 0x80008000) >> 32) & 0xFFFF);
  715. uint32_t ReentryFnDSLL = 0x0019cc38;
  716. uint32_t ReentryFnDADDiu2 =
  717. 0x67390000 | (((ReentryFnAddr + 0x8000) >> 16) & 0xFFFF);
  718. uint32_t ReentryFnDSLL2 = 0x0019cc38;
  719. uint32_t ReentryFnDADDiu3 = 0x67390000 | ((ReentryFnAddr)&0xFFFF);
  720. memcpy(ResolverWorkingMem + ReentryFnAddrOffset, &ReentryFnLUi,
  721. sizeof(ReentryFnLUi));
  722. memcpy(ResolverWorkingMem + (ReentryFnAddrOffset + 4), &ReentryFnDADDiu,
  723. sizeof(ReentryFnDADDiu));
  724. memcpy(ResolverWorkingMem + (ReentryFnAddrOffset + 8), &ReentryFnDSLL,
  725. sizeof(ReentryFnDSLL));
  726. memcpy(ResolverWorkingMem + (ReentryFnAddrOffset + 12), &ReentryFnDADDiu2,
  727. sizeof(ReentryFnDADDiu2));
  728. memcpy(ResolverWorkingMem + (ReentryFnAddrOffset + 16), &ReentryFnDSLL2,
  729. sizeof(ReentryFnDSLL2));
  730. memcpy(ResolverWorkingMem + (ReentryFnAddrOffset + 20), &ReentryFnDADDiu3,
  731. sizeof(ReentryFnDADDiu3));
  732. }
  733. void OrcMips64::writeTrampolines(char *TrampolineBlockWorkingMem,
  734. JITTargetAddress TrampolineBlockTargetAddress,
  735. JITTargetAddress ResolverAddr,
  736. unsigned NumTrampolines) {
  737. uint32_t *Trampolines =
  738. reinterpret_cast<uint32_t *>(TrampolineBlockWorkingMem);
  739. uint64_t HeighestAddr = ((ResolverAddr + 0x800080008000) >> 48);
  740. uint64_t HeigherAddr = ((ResolverAddr + 0x80008000) >> 32);
  741. uint64_t HiAddr = ((ResolverAddr + 0x8000) >> 16);
  742. for (unsigned I = 0; I < NumTrampolines; ++I) {
  743. Trampolines[10 * I + 0] = 0x03e0c025; // move $t8,$ra
  744. Trampolines[10 * I + 1] = 0x3c190000 | (HeighestAddr & 0xFFFF); // lui $t9,resolveAddr
  745. Trampolines[10 * I + 2] = 0x67390000 | (HeigherAddr & 0xFFFF); // daddiu $t9,$t9,%higher(resolveAddr)
  746. Trampolines[10 * I + 3] = 0x0019cc38; // dsll $t9,$t9,16
  747. Trampolines[10 * I + 4] = 0x67390000 | (HiAddr & 0xFFFF); // daddiu $t9,$t9,%hi(ptr)
  748. Trampolines[10 * I + 5] = 0x0019cc38; // dsll $t9,$t9,16
  749. Trampolines[10 * I + 6] =
  750. 0x67390000 | (ResolverAddr & 0xFFFF); // daddiu $t9,$t9,%lo(ptr)
  751. Trampolines[10 * I + 7] = 0x0320f809; // jalr $t9
  752. Trampolines[10 * I + 8] = 0x00000000; // nop
  753. Trampolines[10 * I + 9] = 0x00000000; // nop
  754. }
  755. }
  756. void OrcMips64::writeIndirectStubsBlock(
  757. char *StubsBlockWorkingMem, JITTargetAddress StubsBlockTargetAddress,
  758. JITTargetAddress PointersBlockTargetAddress, unsigned NumStubs) {
  759. // Stub format is:
  760. //
  761. // .section __orc_stubs
  762. // stub1:
  763. // lui $t9,ptr1
  764. // dsll $t9,$t9,16
  765. // daddiu $t9,$t9,%hi(ptr)
  766. // dsll $t9,$t9,16
  767. // ld $t9,%lo(ptr)
  768. // jr $t9
  769. // stub2:
  770. // lui $t9,ptr1
  771. // dsll $t9,$t9,16
  772. // daddiu $t9,$t9,%hi(ptr)
  773. // dsll $t9,$t9,16
  774. // ld $t9,%lo(ptr)
  775. // jr $t9
  776. //
  777. // ...
  778. //
  779. // .section __orc_ptrs
  780. // ptr1:
  781. // .dword 0x0
  782. // ptr2:
  783. // .dword 0x0
  784. //
  785. // ...
  786. assert(stubAndPointerRangesOk<OrcMips64>(
  787. StubsBlockTargetAddress, PointersBlockTargetAddress, NumStubs) &&
  788. "PointersBlock is out of range");
  789. // Populate the stubs page stubs and mark it executable.
  790. uint32_t *Stub = reinterpret_cast<uint32_t *>(StubsBlockWorkingMem);
  791. uint64_t PtrAddr = PointersBlockTargetAddress;
  792. for (unsigned I = 0; I < NumStubs; ++I, PtrAddr += 8) {
  793. uint64_t HeighestAddr = ((PtrAddr + 0x800080008000) >> 48);
  794. uint64_t HeigherAddr = ((PtrAddr + 0x80008000) >> 32);
  795. uint64_t HiAddr = ((PtrAddr + 0x8000) >> 16);
  796. Stub[8 * I + 0] = 0x3c190000 | (HeighestAddr & 0xFFFF); // lui $t9,ptr1
  797. Stub[8 * I + 1] = 0x67390000 | (HeigherAddr & 0xFFFF); // daddiu $t9,$t9,%higher(ptr)
  798. Stub[8 * I + 2] = 0x0019cc38; // dsll $t9,$t9,16
  799. Stub[8 * I + 3] = 0x67390000 | (HiAddr & 0xFFFF); // daddiu $t9,$t9,%hi(ptr)
  800. Stub[8 * I + 4] = 0x0019cc38; // dsll $t9,$t9,16
  801. Stub[8 * I + 5] = 0xdf390000 | (PtrAddr & 0xFFFF); // ld $t9,%lo(ptr)
  802. Stub[8 * I + 6] = 0x03200008; // jr $t9
  803. Stub[8 * I + 7] = 0x00000000; // nop
  804. }
  805. }
  806. void OrcRiscv64::writeResolverCode(char *ResolverWorkingMem,
  807. JITTargetAddress ResolverTargetAddress,
  808. JITTargetAddress ReentryFnAddr,
  809. JITTargetAddress ReentryCtxAddr) {
  810. const uint32_t ResolverCode[] = {
  811. 0xef810113, // 0x00: addi sp,sp,-264
  812. 0x00813023, // 0x04: sd s0,0(sp)
  813. 0x00913423, // 0x08: sd s1,8(sp)
  814. 0x01213823, // 0x0c: sd s2,16(sp)
  815. 0x01313c23, // 0x10: sd s3,24(sp)
  816. 0x03413023, // 0x14: sd s4,32(sp)
  817. 0x03513423, // 0x18: sd s5,40(sp)
  818. 0x03613823, // 0x1c: sd s6,48(sp)
  819. 0x03713c23, // 0x20: sd s7,56(sp)
  820. 0x05813023, // 0x24: sd s8,64(sp)
  821. 0x05913423, // 0x28: sd s9,72(sp)
  822. 0x05a13823, // 0x2c: sd s10,80(sp)
  823. 0x05b13c23, // 0x30: sd s11,88(sp)
  824. 0x06113023, // 0x34: sd ra,96(sp)
  825. 0x06a13423, // 0x38: sd a0,104(sp)
  826. 0x06b13823, // 0x3c: sd a1,112(sp)
  827. 0x06c13c23, // 0x40: sd a2,120(sp)
  828. 0x08d13023, // 0x44: sd a3,128(sp)
  829. 0x08e13423, // 0x48: sd a4,136(sp)
  830. 0x08f13823, // 0x4c: sd a5,144(sp)
  831. 0x09013c23, // 0x50: sd a6,152(sp)
  832. 0x0b113023, // 0x54: sd a7,160(sp)
  833. 0x0a813427, // 0x58: fsd fs0,168(sp)
  834. 0x0a913827, // 0x5c: fsd fs1,176(sp)
  835. 0x0b213c27, // 0x60: fsd fs2,184(sp)
  836. 0x0d313027, // 0x64: fsd fs3,192(sp)
  837. 0x0d413427, // 0x68: fsd fs4,200(sp)
  838. 0x0d513827, // 0x6c: fsd fs5,208(sp)
  839. 0x0d613c27, // 0x70: fsd fs6,216(sp)
  840. 0x0f713027, // 0x74: fsd fs7,224(sp)
  841. 0x0f813427, // 0x78: fsd fs8,232(sp)
  842. 0x0f913827, // 0x7c: fsd fs9,240(sp)
  843. 0x0fa13c27, // 0x80: fsd fs10,248(sp)
  844. 0x11b13027, // 0x84: fsd fs11,256(sp)
  845. 0x00000517, // 0x88: auipc a0,0x0
  846. 0x0b053503, // 0x8c: ld a0,176(a0) # 0x138
  847. 0x00030593, // 0x90: mv a1,t1
  848. 0xff458593, // 0x94: addi a1,a1,-12
  849. 0x00000617, // 0x98: auipc a2,0x0
  850. 0x0a863603, // 0x9c: ld a2,168(a2) # 0x140
  851. 0x000600e7, // 0xa0: jalr a2
  852. 0x00050293, // 0xa4: mv t0,a0
  853. 0x00013403, // 0xa8: ld s0,0(sp)
  854. 0x00813483, // 0xac: ld s1,8(sp)
  855. 0x01013903, // 0xb0: ld s2,16(sp)
  856. 0x01813983, // 0xb4: ld s3,24(sp)
  857. 0x02013a03, // 0xb8: ld s4,32(sp)
  858. 0x02813a83, // 0xbc: ld s5,40(sp)
  859. 0x03013b03, // 0xc0: ld s6,48(sp)
  860. 0x03813b83, // 0xc4: ld s7,56(sp)
  861. 0x04013c03, // 0xc8: ld s8,64(sp)
  862. 0x04813c83, // 0xcc: ld s9,72(sp)
  863. 0x05013d03, // 0xd0: ld s10,80(sp)
  864. 0x05813d83, // 0xd4: ld s11,88(sp)
  865. 0x06013083, // 0xd8: ld ra,96(sp)
  866. 0x06813503, // 0xdc: ld a0,104(sp)
  867. 0x07013583, // 0xe0: ld a1,112(sp)
  868. 0x07813603, // 0xe4: ld a2,120(sp)
  869. 0x08013683, // 0xe8: ld a3,128(sp)
  870. 0x08813703, // 0xec: ld a4,136(sp)
  871. 0x09013783, // 0xf0: ld a5,144(sp)
  872. 0x09813803, // 0xf4: ld a6,152(sp)
  873. 0x0a013883, // 0xf8: ld a7,160(sp)
  874. 0x0a813407, // 0xfc: fld fs0,168(sp)
  875. 0x0b013487, // 0x100: fld fs1,176(sp)
  876. 0x0b813907, // 0x104: fld fs2,184(sp)
  877. 0x0c013987, // 0x108: fld fs3,192(sp)
  878. 0x0c813a07, // 0x10c: fld fs4,200(sp)
  879. 0x0d013a87, // 0x110: fld fs5,208(sp)
  880. 0x0d813b07, // 0x114: fld fs6,216(sp)
  881. 0x0e013b87, // 0x118: fld fs7,224(sp)
  882. 0x0e813c07, // 0x11c: fld fs8,232(sp)
  883. 0x0f013c87, // 0x120: fld fs9,240(sp)
  884. 0x0f813d07, // 0x124: fld fs10,248(sp)
  885. 0x10013d87, // 0x128: fld fs11,256(sp)
  886. 0x10810113, // 0x12c: addi sp,sp,264
  887. 0x00028067, // 0x130: jr t0
  888. 0x12345678, // 0x134: padding to align at 8 byte
  889. 0x12345678, // 0x138: Lreentry_ctx_ptr:
  890. 0xdeadbeef, // 0x13c: .quad 0
  891. 0x98765432, // 0x140: Lreentry_fn_ptr:
  892. 0xcafef00d // 0x144: .quad 0
  893. };
  894. const unsigned ReentryCtxAddrOffset = 0x138;
  895. const unsigned ReentryFnAddrOffset = 0x140;
  896. memcpy(ResolverWorkingMem, ResolverCode, sizeof(ResolverCode));
  897. memcpy(ResolverWorkingMem + ReentryFnAddrOffset, &ReentryFnAddr,
  898. sizeof(uint64_t));
  899. memcpy(ResolverWorkingMem + ReentryCtxAddrOffset, &ReentryCtxAddr,
  900. sizeof(uint64_t));
  901. }
  902. void OrcRiscv64::writeTrampolines(char *TrampolineBlockWorkingMem,
  903. JITTargetAddress TrampolineBlockTargetAddress,
  904. JITTargetAddress ResolverAddr,
  905. unsigned NumTrampolines) {
  906. unsigned OffsetToPtr = alignTo(NumTrampolines * TrampolineSize, 8);
  907. memcpy(TrampolineBlockWorkingMem + OffsetToPtr, &ResolverAddr,
  908. sizeof(uint64_t));
  909. uint32_t *Trampolines =
  910. reinterpret_cast<uint32_t *>(TrampolineBlockWorkingMem);
  911. for (unsigned I = 0; I < NumTrampolines; ++I, OffsetToPtr -= TrampolineSize) {
  912. uint32_t Hi20 = (OffsetToPtr + 0x800) & 0xFFFFF000;
  913. uint32_t Lo12 = OffsetToPtr - Hi20;
  914. Trampolines[4 * I + 0] = 0x00000297 | Hi20; // auipc t0, %hi(Lptr)
  915. Trampolines[4 * I + 1] =
  916. 0x0002b283 | ((Lo12 & 0xFFF) << 20); // ld t0, %lo(Lptr)
  917. Trampolines[4 * I + 2] = 0x00028367; // jalr t1, t0
  918. Trampolines[4 * I + 3] = 0xdeadface; // padding
  919. }
  920. }
  921. void OrcRiscv64::writeIndirectStubsBlock(
  922. char *StubsBlockWorkingMem, JITTargetAddress StubsBlockTargetAddress,
  923. JITTargetAddress PointersBlockTargetAddress, unsigned NumStubs) {
  924. // Stub format is:
  925. //
  926. // .section __orc_stubs
  927. // stub1:
  928. // auipc t0, %hi(ptr1) ; PC-rel load of ptr1
  929. // ld t0, %lo(t0)
  930. // jr t0 ; Jump to resolver
  931. // .quad 0 ; Pad to 16 bytes
  932. // stub2:
  933. // auipc t0, %hi(ptr1) ; PC-rel load of ptr1
  934. // ld t0, %lo(t0)
  935. // jr t0 ; Jump to resolver
  936. // .quad 0
  937. //
  938. // ...
  939. //
  940. // .section __orc_ptrs
  941. // ptr1:
  942. // .quad 0x0
  943. // ptr2:
  944. // .quad 0x0
  945. //
  946. // ...
  947. assert(stubAndPointerRangesOk<OrcRiscv64>(
  948. StubsBlockTargetAddress, PointersBlockTargetAddress, NumStubs) &&
  949. "PointersBlock is out of range");
  950. uint32_t *Stub = reinterpret_cast<uint32_t *>(StubsBlockWorkingMem);
  951. for (unsigned I = 0; I < NumStubs; ++I) {
  952. uint64_t PtrDisplacement =
  953. PointersBlockTargetAddress - StubsBlockTargetAddress;
  954. uint32_t Hi20 = (PtrDisplacement + 0x800) & 0xFFFFF000;
  955. uint32_t Lo12 = PtrDisplacement - Hi20;
  956. Stub[4 * I + 0] = 0x00000297 | Hi20; // auipc t0, %hi(Lptr)
  957. Stub[4 * I + 1] = 0x0002b283 | ((Lo12 & 0xFFF) << 20); // ld t0, %lo(Lptr)
  958. Stub[4 * I + 2] = 0x00028067; // jr t0
  959. Stub[4 * I + 3] = 0xfeedbeef; // padding
  960. PointersBlockTargetAddress += PointerSize;
  961. StubsBlockTargetAddress += StubSize;
  962. }
  963. }
  964. void OrcLoongArch64::writeResolverCode(char *ResolverWorkingMem,
  965. JITTargetAddress ResolverTargetAddress,
  966. JITTargetAddress ReentryFnAddr,
  967. JITTargetAddress ReentryCtxAddr) {
  968. LLVM_DEBUG({
  969. dbgs() << "Writing resolver code to "
  970. << formatv("{0:x16}", ResolverTargetAddress) << "\n";
  971. });
  972. const uint32_t ResolverCode[] = {
  973. 0x02fde063, // 0x0: addi.d $sp, $sp, -136(0xf78)
  974. 0x29c00061, // 0x4: st.d $ra, $sp, 0
  975. 0x29c02064, // 0x8: st.d $a0, $sp, 8(0x8)
  976. 0x29c04065, // 0xc: st.d $a1, $sp, 16(0x10)
  977. 0x29c06066, // 0x10: st.d $a2, $sp, 24(0x18)
  978. 0x29c08067, // 0x14: st.d $a3, $sp, 32(0x20)
  979. 0x29c0a068, // 0x18: st.d $a4, $sp, 40(0x28)
  980. 0x29c0c069, // 0x1c: st.d $a5, $sp, 48(0x30)
  981. 0x29c0e06a, // 0x20: st.d $a6, $sp, 56(0x38)
  982. 0x29c1006b, // 0x24: st.d $a7, $sp, 64(0x40)
  983. 0x2bc12060, // 0x28: fst.d $fa0, $sp, 72(0x48)
  984. 0x2bc14061, // 0x2c: fst.d $fa1, $sp, 80(0x50)
  985. 0x2bc16062, // 0x30: fst.d $fa2, $sp, 88(0x58)
  986. 0x2bc18063, // 0x34: fst.d $fa3, $sp, 96(0x60)
  987. 0x2bc1a064, // 0x38: fst.d $fa4, $sp, 104(0x68)
  988. 0x2bc1c065, // 0x3c: fst.d $fa5, $sp, 112(0x70)
  989. 0x2bc1e066, // 0x40: fst.d $fa6, $sp, 120(0x78)
  990. 0x2bc20067, // 0x44: fst.d $fa7, $sp, 128(0x80)
  991. 0x1c000004, // 0x48: pcaddu12i $a0, 0
  992. 0x28c1c084, // 0x4c: ld.d $a0, $a0, 112(0x70)
  993. 0x001501a5, // 0x50: move $a1, $t1
  994. 0x02ffd0a5, // 0x54: addi.d $a1, $a1, -12(0xff4)
  995. 0x1c000006, // 0x58: pcaddu12i $a2, 0
  996. 0x28c1a0c6, // 0x5c: ld.d $a2, $a2, 104(0x68)
  997. 0x4c0000c1, // 0x60: jirl $ra, $a2, 0
  998. 0x0015008c, // 0x64: move $t0, $a0
  999. 0x2b820067, // 0x68: fld.d $fa7, $sp, 128(0x80)
  1000. 0x2b81e066, // 0x6c: fld.d $fa6, $sp, 120(0x78)
  1001. 0x2b81c065, // 0x70: fld.d $fa5, $sp, 112(0x70)
  1002. 0x2b81a064, // 0x74: fld.d $fa4, $sp, 104(0x68)
  1003. 0x2b818063, // 0x78: fld.d $fa3, $sp, 96(0x60)
  1004. 0x2b816062, // 0x7c: fld.d $fa2, $sp, 88(0x58)
  1005. 0x2b814061, // 0x80: fld.d $fa1, $sp, 80(0x50)
  1006. 0x2b812060, // 0x84: fld.d $fa0, $sp, 72(0x48)
  1007. 0x28c1006b, // 0x88: ld.d $a7, $sp, 64(0x40)
  1008. 0x28c0e06a, // 0x8c: ld.d $a6, $sp, 56(0x38)
  1009. 0x28c0c069, // 0x90: ld.d $a5, $sp, 48(0x30)
  1010. 0x28c0a068, // 0x94: ld.d $a4, $sp, 40(0x28)
  1011. 0x28c08067, // 0x98: ld.d $a3, $sp, 32(0x20)
  1012. 0x28c06066, // 0x9c: ld.d $a2, $sp, 24(0x18)
  1013. 0x28c04065, // 0xa0: ld.d $a1, $sp, 16(0x10)
  1014. 0x28c02064, // 0xa4: ld.d $a0, $sp, 8(0x8)
  1015. 0x28c00061, // 0xa8: ld.d $ra, $sp, 0
  1016. 0x02c22063, // 0xac: addi.d $sp, $sp, 136(0x88)
  1017. 0x4c000180, // 0xb0: jr $t0
  1018. 0x00000000, // 0xb4: padding to align at 8 bytes
  1019. 0x01234567, // 0xb8: Lreentry_ctx_ptr:
  1020. 0xdeedbeef, // 0xbc: .dword 0
  1021. 0x98765432, // 0xc0: Lreentry_fn_ptr:
  1022. 0xcafef00d, // 0xc4: .dword 0
  1023. };
  1024. const unsigned ReentryCtxAddrOffset = 0xb8;
  1025. const unsigned ReentryFnAddrOffset = 0xc0;
  1026. memcpy(ResolverWorkingMem, ResolverCode, sizeof(ResolverCode));
  1027. memcpy(ResolverWorkingMem + ReentryFnAddrOffset, &ReentryFnAddr,
  1028. sizeof(uint64_t));
  1029. memcpy(ResolverWorkingMem + ReentryCtxAddrOffset, &ReentryCtxAddr,
  1030. sizeof(uint64_t));
  1031. }
  1032. void OrcLoongArch64::writeTrampolines(
  1033. char *TrampolineBlockWorkingMem,
  1034. JITTargetAddress TrampolineBlockTargetAddress,
  1035. JITTargetAddress ResolverAddr, unsigned NumTrampolines) {
  1036. LLVM_DEBUG({
  1037. dbgs() << "Writing trampoline code to "
  1038. << formatv("{0:x16}", TrampolineBlockTargetAddress) << "\n";
  1039. });
  1040. unsigned OffsetToPtr = alignTo(NumTrampolines * TrampolineSize, 8);
  1041. memcpy(TrampolineBlockWorkingMem + OffsetToPtr, &ResolverAddr,
  1042. sizeof(uint64_t));
  1043. uint32_t *Trampolines =
  1044. reinterpret_cast<uint32_t *>(TrampolineBlockWorkingMem);
  1045. for (unsigned I = 0; I < NumTrampolines; ++I, OffsetToPtr -= TrampolineSize) {
  1046. uint32_t Hi20 = (OffsetToPtr + 0x800) & 0xfffff000;
  1047. uint32_t Lo12 = OffsetToPtr - Hi20;
  1048. Trampolines[4 * I + 0] =
  1049. 0x1c00000c |
  1050. (((Hi20 >> 12) & 0xfffff) << 5); // pcaddu12i $t0, %pc_hi20(Lptr)
  1051. Trampolines[4 * I + 1] =
  1052. 0x28c0018c | ((Lo12 & 0xfff) << 10); // ld.d $t0, $t0, %pc_lo12(Lptr)
  1053. Trampolines[4 * I + 2] = 0x4c00018d; // jirl $t1, $t0, 0
  1054. Trampolines[4 * I + 3] = 0x0; // padding
  1055. }
  1056. }
  1057. void OrcLoongArch64::writeIndirectStubsBlock(
  1058. char *StubsBlockWorkingMem, JITTargetAddress StubsBlockTargetAddress,
  1059. JITTargetAddress PointersBlockTargetAddress, unsigned NumStubs) {
  1060. // Stub format is:
  1061. //
  1062. // .section __orc_stubs
  1063. // stub1:
  1064. // pcaddu12i $t0, %pc_hi20(ptr1) ; PC-rel load of ptr1
  1065. // ld.d $t0, $t0, %pc_lo12(ptr1)
  1066. // jr $t0 ; Jump to resolver
  1067. // .dword 0 ; Pad to 16 bytes
  1068. // stub2:
  1069. // pcaddu12i $t0, %pc_hi20(ptr2) ; PC-rel load of ptr2
  1070. // ld.d $t0, $t0, %pc_lo12(ptr2)
  1071. // jr $t0 ; Jump to resolver
  1072. // .dword 0 ; Pad to 16 bytes
  1073. // ...
  1074. //
  1075. // .section __orc_ptrs
  1076. // ptr1:
  1077. // .dword 0x0
  1078. // ptr2:
  1079. // .dword 0x0
  1080. // ...
  1081. LLVM_DEBUG({
  1082. dbgs() << "Writing stubs code to "
  1083. << formatv("{0:x16}", StubsBlockTargetAddress) << "\n";
  1084. });
  1085. assert(stubAndPointerRangesOk<OrcLoongArch64>(
  1086. StubsBlockTargetAddress, PointersBlockTargetAddress, NumStubs) &&
  1087. "PointersBlock is out of range");
  1088. uint32_t *Stub = reinterpret_cast<uint32_t *>(StubsBlockWorkingMem);
  1089. for (unsigned I = 0; I < NumStubs; ++I) {
  1090. uint64_t PtrDisplacement =
  1091. PointersBlockTargetAddress - StubsBlockTargetAddress;
  1092. uint32_t Hi20 = (PtrDisplacement + 0x800) & 0xfffff000;
  1093. uint32_t Lo12 = PtrDisplacement - Hi20;
  1094. Stub[4 * I + 0] = 0x1c00000c | (((Hi20 >> 12) & 0xfffff)
  1095. << 5); // pcaddu12i $t0, %pc_hi20(Lptr)
  1096. Stub[4 * I + 1] =
  1097. 0x28c0018c | ((Lo12 & 0xfff) << 10); // ld.d $t0, $t0, %pc_lo12(Lptr)
  1098. Stub[4 * I + 2] = 0x4c000180; // jr $t0
  1099. Stub[4 * I + 3] = 0x0; // padding
  1100. PointersBlockTargetAddress += PointerSize;
  1101. StubsBlockTargetAddress += StubSize;
  1102. }
  1103. }
  1104. } // End namespace orc.
  1105. } // End namespace llvm.