X86DisassemblerTables.cpp 42 KB

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  1. //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // This file is part of the X86 Disassembler Emitter.
  10. // It contains the implementation of the disassembler tables.
  11. // Documentation for the disassembler emitter in general can be found in
  12. // X86DisassemblerEmitter.h.
  13. //
  14. //===----------------------------------------------------------------------===//
  15. #include "X86DisassemblerTables.h"
  16. #include "X86DisassemblerShared.h"
  17. #include "X86ModRMFilters.h"
  18. #include "llvm/ADT/SmallVector.h"
  19. #include "llvm/Support/ErrorHandling.h"
  20. #include "llvm/Support/Format.h"
  21. #include "llvm/Support/raw_ostream.h"
  22. #include <map>
  23. using namespace llvm;
  24. using namespace X86Disassembler;
  25. /// stringForContext - Returns a string containing the name of a particular
  26. /// InstructionContext, usually for diagnostic purposes.
  27. ///
  28. /// @param insnContext - The instruction class to transform to a string.
  29. /// @return - A statically-allocated string constant that contains the
  30. /// name of the instruction class.
  31. static inline const char* stringForContext(InstructionContext insnContext) {
  32. switch (insnContext) {
  33. default:
  34. llvm_unreachable("Unhandled instruction class");
  35. #define ENUM_ENTRY(n, r, d) case n: return #n; break;
  36. #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) ENUM_ENTRY(n##_K_B, r, d)\
  37. ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)\
  38. ENUM_ENTRY(n##_KZ_B, r, d)
  39. INSTRUCTION_CONTEXTS
  40. #undef ENUM_ENTRY
  41. #undef ENUM_ENTRY_K_B
  42. }
  43. }
  44. /// stringForOperandType - Like stringForContext, but for OperandTypes.
  45. static inline const char* stringForOperandType(OperandType type) {
  46. switch (type) {
  47. default:
  48. llvm_unreachable("Unhandled type");
  49. #define ENUM_ENTRY(i, d) case i: return #i;
  50. TYPES
  51. #undef ENUM_ENTRY
  52. }
  53. }
  54. /// stringForOperandEncoding - like stringForContext, but for
  55. /// OperandEncodings.
  56. static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
  57. switch (encoding) {
  58. default:
  59. llvm_unreachable("Unhandled encoding");
  60. #define ENUM_ENTRY(i, d) case i: return #i;
  61. ENCODINGS
  62. #undef ENUM_ENTRY
  63. }
  64. }
  65. /// inheritsFrom - Indicates whether all instructions in one class also belong
  66. /// to another class.
  67. ///
  68. /// @param child - The class that may be the subset
  69. /// @param parent - The class that may be the superset
  70. /// @return - True if child is a subset of parent, false otherwise.
  71. static inline bool inheritsFrom(InstructionContext child,
  72. InstructionContext parent, bool noPrefix = true,
  73. bool VEX_LIG = false, bool VEX_WIG = false,
  74. bool AdSize64 = false) {
  75. if (child == parent)
  76. return true;
  77. switch (parent) {
  78. case IC:
  79. return(inheritsFrom(child, IC_64BIT, AdSize64) ||
  80. (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) ||
  81. inheritsFrom(child, IC_ADSIZE) ||
  82. (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) ||
  83. (noPrefix && inheritsFrom(child, IC_XS, noPrefix)));
  84. case IC_64BIT:
  85. return(inheritsFrom(child, IC_64BIT_REXW) ||
  86. (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) ||
  87. (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) ||
  88. (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) ||
  89. (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix)));
  90. case IC_OPSIZE:
  91. return inheritsFrom(child, IC_64BIT_OPSIZE) ||
  92. inheritsFrom(child, IC_OPSIZE_ADSIZE);
  93. case IC_ADSIZE:
  94. return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix));
  95. case IC_OPSIZE_ADSIZE:
  96. return false;
  97. case IC_64BIT_ADSIZE:
  98. return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix));
  99. case IC_64BIT_OPSIZE_ADSIZE:
  100. return false;
  101. case IC_XD:
  102. return inheritsFrom(child, IC_64BIT_XD);
  103. case IC_XS:
  104. return inheritsFrom(child, IC_64BIT_XS);
  105. case IC_XD_OPSIZE:
  106. return inheritsFrom(child, IC_64BIT_XD_OPSIZE);
  107. case IC_XS_OPSIZE:
  108. return inheritsFrom(child, IC_64BIT_XS_OPSIZE);
  109. case IC_XD_ADSIZE:
  110. return inheritsFrom(child, IC_64BIT_XD_ADSIZE);
  111. case IC_XS_ADSIZE:
  112. return inheritsFrom(child, IC_64BIT_XS_ADSIZE);
  113. case IC_64BIT_REXW:
  114. return((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) ||
  115. (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) ||
  116. (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) ||
  117. (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)));
  118. case IC_64BIT_OPSIZE:
  119. return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) ||
  120. (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) ||
  121. (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE));
  122. case IC_64BIT_XD:
  123. return(inheritsFrom(child, IC_64BIT_REXW_XD) ||
  124. (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE)));
  125. case IC_64BIT_XS:
  126. return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
  127. (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE)));
  128. case IC_64BIT_XD_OPSIZE:
  129. case IC_64BIT_XS_OPSIZE:
  130. return false;
  131. case IC_64BIT_XD_ADSIZE:
  132. case IC_64BIT_XS_ADSIZE:
  133. return false;
  134. case IC_64BIT_REXW_XD:
  135. case IC_64BIT_REXW_XS:
  136. case IC_64BIT_REXW_OPSIZE:
  137. case IC_64BIT_REXW_ADSIZE:
  138. return false;
  139. case IC_VEX:
  140. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W)) ||
  141. (VEX_WIG && inheritsFrom(child, IC_VEX_W)) ||
  142. (VEX_LIG && inheritsFrom(child, IC_VEX_L));
  143. case IC_VEX_XS:
  144. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS)) ||
  145. (VEX_WIG && inheritsFrom(child, IC_VEX_W_XS)) ||
  146. (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS));
  147. case IC_VEX_XD:
  148. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD)) ||
  149. (VEX_WIG && inheritsFrom(child, IC_VEX_W_XD)) ||
  150. (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD));
  151. case IC_VEX_OPSIZE:
  152. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) ||
  153. (VEX_WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) ||
  154. (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE));
  155. case IC_VEX_W:
  156. return VEX_LIG && inheritsFrom(child, IC_VEX_L_W);
  157. case IC_VEX_W_XS:
  158. return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS);
  159. case IC_VEX_W_XD:
  160. return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD);
  161. case IC_VEX_W_OPSIZE:
  162. return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
  163. case IC_VEX_L:
  164. return VEX_WIG && inheritsFrom(child, IC_VEX_L_W);
  165. case IC_VEX_L_XS:
  166. return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS);
  167. case IC_VEX_L_XD:
  168. return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD);
  169. case IC_VEX_L_OPSIZE:
  170. return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
  171. case IC_VEX_L_W:
  172. case IC_VEX_L_W_XS:
  173. case IC_VEX_L_W_XD:
  174. case IC_VEX_L_W_OPSIZE:
  175. return false;
  176. case IC_EVEX:
  177. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W)) ||
  178. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W)) ||
  179. (VEX_WIG && inheritsFrom(child, IC_EVEX_W)) ||
  180. (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) ||
  181. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2));
  182. case IC_EVEX_XS:
  183. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
  184. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) ||
  185. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS)) ||
  186. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) ||
  187. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS));
  188. case IC_EVEX_XD:
  189. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
  190. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) ||
  191. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD)) ||
  192. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) ||
  193. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD));
  194. case IC_EVEX_OPSIZE:
  195. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
  196. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) ||
  197. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) ||
  198. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) ||
  199. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE));
  200. case IC_EVEX_K:
  201. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
  202. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) ||
  203. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K)) ||
  204. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) ||
  205. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K));
  206. case IC_EVEX_XS_K:
  207. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
  208. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) ||
  209. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) ||
  210. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) ||
  211. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K));
  212. case IC_EVEX_XD_K:
  213. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
  214. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) ||
  215. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) ||
  216. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) ||
  217. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K));
  218. case IC_EVEX_OPSIZE_K:
  219. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
  220. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) ||
  221. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) ||
  222. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) ||
  223. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K));
  224. case IC_EVEX_KZ:
  225. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
  226. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) ||
  227. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ)) ||
  228. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) ||
  229. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ));
  230. case IC_EVEX_XS_KZ:
  231. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
  232. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) ||
  233. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) ||
  234. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) ||
  235. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ));
  236. case IC_EVEX_XD_KZ:
  237. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
  238. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) ||
  239. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) ||
  240. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) ||
  241. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ));
  242. case IC_EVEX_OPSIZE_KZ:
  243. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
  244. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) ||
  245. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) ||
  246. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) ||
  247. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ));
  248. case IC_EVEX_W:
  249. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) ||
  250. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W));
  251. case IC_EVEX_W_XS:
  252. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
  253. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS));
  254. case IC_EVEX_W_XD:
  255. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
  256. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD));
  257. case IC_EVEX_W_OPSIZE:
  258. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
  259. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE));
  260. case IC_EVEX_W_K:
  261. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
  262. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K));
  263. case IC_EVEX_W_XS_K:
  264. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
  265. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K));
  266. case IC_EVEX_W_XD_K:
  267. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
  268. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K));
  269. case IC_EVEX_W_OPSIZE_K:
  270. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
  271. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K));
  272. case IC_EVEX_W_KZ:
  273. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
  274. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ));
  275. case IC_EVEX_W_XS_KZ:
  276. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
  277. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ));
  278. case IC_EVEX_W_XD_KZ:
  279. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
  280. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ));
  281. case IC_EVEX_W_OPSIZE_KZ:
  282. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
  283. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ));
  284. case IC_EVEX_L:
  285. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W);
  286. case IC_EVEX_L_XS:
  287. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS);
  288. case IC_EVEX_L_XD:
  289. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD);
  290. case IC_EVEX_L_OPSIZE:
  291. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE);
  292. case IC_EVEX_L_K:
  293. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K);
  294. case IC_EVEX_L_XS_K:
  295. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K);
  296. case IC_EVEX_L_XD_K:
  297. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K);
  298. case IC_EVEX_L_OPSIZE_K:
  299. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K);
  300. case IC_EVEX_L_KZ:
  301. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ);
  302. case IC_EVEX_L_XS_KZ:
  303. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ);
  304. case IC_EVEX_L_XD_KZ:
  305. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ);
  306. case IC_EVEX_L_OPSIZE_KZ:
  307. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ);
  308. case IC_EVEX_L_W:
  309. case IC_EVEX_L_W_XS:
  310. case IC_EVEX_L_W_XD:
  311. case IC_EVEX_L_W_OPSIZE:
  312. return false;
  313. case IC_EVEX_L_W_K:
  314. case IC_EVEX_L_W_XS_K:
  315. case IC_EVEX_L_W_XD_K:
  316. case IC_EVEX_L_W_OPSIZE_K:
  317. return false;
  318. case IC_EVEX_L_W_KZ:
  319. case IC_EVEX_L_W_XS_KZ:
  320. case IC_EVEX_L_W_XD_KZ:
  321. case IC_EVEX_L_W_OPSIZE_KZ:
  322. return false;
  323. case IC_EVEX_L2:
  324. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W);
  325. case IC_EVEX_L2_XS:
  326. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS);
  327. case IC_EVEX_L2_XD:
  328. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD);
  329. case IC_EVEX_L2_OPSIZE:
  330. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE);
  331. case IC_EVEX_L2_K:
  332. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K);
  333. case IC_EVEX_L2_XS_K:
  334. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K);
  335. case IC_EVEX_L2_XD_K:
  336. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K);
  337. case IC_EVEX_L2_OPSIZE_K:
  338. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K);
  339. case IC_EVEX_L2_KZ:
  340. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ);
  341. case IC_EVEX_L2_XS_KZ:
  342. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ);
  343. case IC_EVEX_L2_XD_KZ:
  344. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ);
  345. case IC_EVEX_L2_OPSIZE_KZ:
  346. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ);
  347. case IC_EVEX_L2_W:
  348. case IC_EVEX_L2_W_XS:
  349. case IC_EVEX_L2_W_XD:
  350. case IC_EVEX_L2_W_OPSIZE:
  351. return false;
  352. case IC_EVEX_L2_W_K:
  353. case IC_EVEX_L2_W_XS_K:
  354. case IC_EVEX_L2_W_XD_K:
  355. case IC_EVEX_L2_W_OPSIZE_K:
  356. return false;
  357. case IC_EVEX_L2_W_KZ:
  358. case IC_EVEX_L2_W_XS_KZ:
  359. case IC_EVEX_L2_W_XD_KZ:
  360. case IC_EVEX_L2_W_OPSIZE_KZ:
  361. return false;
  362. case IC_EVEX_B:
  363. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
  364. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) ||
  365. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_B)) ||
  366. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) ||
  367. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B));
  368. case IC_EVEX_XS_B:
  369. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
  370. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) ||
  371. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) ||
  372. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) ||
  373. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B));
  374. case IC_EVEX_XD_B:
  375. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
  376. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) ||
  377. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) ||
  378. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) ||
  379. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B));
  380. case IC_EVEX_OPSIZE_B:
  381. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
  382. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) ||
  383. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) ||
  384. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) ||
  385. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B));
  386. case IC_EVEX_K_B:
  387. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
  388. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) ||
  389. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K_B)) ||
  390. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) ||
  391. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B));
  392. case IC_EVEX_XS_K_B:
  393. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
  394. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) ||
  395. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) ||
  396. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) ||
  397. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B));
  398. case IC_EVEX_XD_K_B:
  399. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
  400. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) ||
  401. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) ||
  402. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) ||
  403. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B));
  404. case IC_EVEX_OPSIZE_K_B:
  405. return (VEX_LIG && VEX_WIG &&
  406. inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
  407. (VEX_LIG && VEX_WIG &&
  408. inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) ||
  409. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) ||
  410. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) ||
  411. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B));
  412. case IC_EVEX_KZ_B:
  413. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
  414. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) ||
  415. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) ||
  416. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) ||
  417. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B));
  418. case IC_EVEX_XS_KZ_B:
  419. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
  420. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) ||
  421. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) ||
  422. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) ||
  423. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B));
  424. case IC_EVEX_XD_KZ_B:
  425. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
  426. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) ||
  427. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) ||
  428. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) ||
  429. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B));
  430. case IC_EVEX_OPSIZE_KZ_B:
  431. return (VEX_LIG && VEX_WIG &&
  432. inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
  433. (VEX_LIG && VEX_WIG &&
  434. inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) ||
  435. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) ||
  436. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) ||
  437. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B));
  438. case IC_EVEX_W_B:
  439. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
  440. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B));
  441. case IC_EVEX_W_XS_B:
  442. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
  443. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B));
  444. case IC_EVEX_W_XD_B:
  445. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
  446. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B));
  447. case IC_EVEX_W_OPSIZE_B:
  448. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
  449. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B));
  450. case IC_EVEX_W_K_B:
  451. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
  452. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B));
  453. case IC_EVEX_W_XS_K_B:
  454. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
  455. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B));
  456. case IC_EVEX_W_XD_K_B:
  457. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
  458. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B));
  459. case IC_EVEX_W_OPSIZE_K_B:
  460. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
  461. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B));
  462. case IC_EVEX_W_KZ_B:
  463. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
  464. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B));
  465. case IC_EVEX_W_XS_KZ_B:
  466. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
  467. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B));
  468. case IC_EVEX_W_XD_KZ_B:
  469. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
  470. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B));
  471. case IC_EVEX_W_OPSIZE_KZ_B:
  472. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
  473. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B));
  474. case IC_EVEX_L_B:
  475. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B);
  476. case IC_EVEX_L_XS_B:
  477. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B);
  478. case IC_EVEX_L_XD_B:
  479. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B);
  480. case IC_EVEX_L_OPSIZE_B:
  481. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B);
  482. case IC_EVEX_L_K_B:
  483. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B);
  484. case IC_EVEX_L_XS_K_B:
  485. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B);
  486. case IC_EVEX_L_XD_K_B:
  487. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B);
  488. case IC_EVEX_L_OPSIZE_K_B:
  489. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B);
  490. case IC_EVEX_L_KZ_B:
  491. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B);
  492. case IC_EVEX_L_XS_KZ_B:
  493. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B);
  494. case IC_EVEX_L_XD_KZ_B:
  495. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B);
  496. case IC_EVEX_L_OPSIZE_KZ_B:
  497. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B);
  498. case IC_EVEX_L_W_B:
  499. case IC_EVEX_L_W_XS_B:
  500. case IC_EVEX_L_W_XD_B:
  501. case IC_EVEX_L_W_OPSIZE_B:
  502. return false;
  503. case IC_EVEX_L_W_K_B:
  504. case IC_EVEX_L_W_XS_K_B:
  505. case IC_EVEX_L_W_XD_K_B:
  506. case IC_EVEX_L_W_OPSIZE_K_B:
  507. return false;
  508. case IC_EVEX_L_W_KZ_B:
  509. case IC_EVEX_L_W_XS_KZ_B:
  510. case IC_EVEX_L_W_XD_KZ_B:
  511. case IC_EVEX_L_W_OPSIZE_KZ_B:
  512. return false;
  513. case IC_EVEX_L2_B:
  514. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B);
  515. case IC_EVEX_L2_XS_B:
  516. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B);
  517. case IC_EVEX_L2_XD_B:
  518. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B);
  519. case IC_EVEX_L2_OPSIZE_B:
  520. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B);
  521. case IC_EVEX_L2_K_B:
  522. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B);
  523. case IC_EVEX_L2_XS_K_B:
  524. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B);
  525. case IC_EVEX_L2_XD_K_B:
  526. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B);
  527. case IC_EVEX_L2_OPSIZE_K_B:
  528. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B);
  529. case IC_EVEX_L2_KZ_B:
  530. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B);
  531. case IC_EVEX_L2_XS_KZ_B:
  532. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B);
  533. case IC_EVEX_L2_XD_KZ_B:
  534. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B);
  535. case IC_EVEX_L2_OPSIZE_KZ_B:
  536. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B);
  537. case IC_EVEX_L2_W_B:
  538. case IC_EVEX_L2_W_XS_B:
  539. case IC_EVEX_L2_W_XD_B:
  540. case IC_EVEX_L2_W_OPSIZE_B:
  541. return false;
  542. case IC_EVEX_L2_W_K_B:
  543. case IC_EVEX_L2_W_XS_K_B:
  544. case IC_EVEX_L2_W_XD_K_B:
  545. case IC_EVEX_L2_W_OPSIZE_K_B:
  546. return false;
  547. case IC_EVEX_L2_W_KZ_B:
  548. case IC_EVEX_L2_W_XS_KZ_B:
  549. case IC_EVEX_L2_W_XD_KZ_B:
  550. case IC_EVEX_L2_W_OPSIZE_KZ_B:
  551. return false;
  552. default:
  553. errs() << "Unknown instruction class: " <<
  554. stringForContext((InstructionContext)parent) << "\n";
  555. llvm_unreachable("Unknown instruction class");
  556. }
  557. }
  558. /// outranks - Indicates whether, if an instruction has two different applicable
  559. /// classes, which class should be preferred when performing decode. This
  560. /// imposes a total ordering (ties are resolved toward "lower")
  561. ///
  562. /// @param upper - The class that may be preferable
  563. /// @param lower - The class that may be less preferable
  564. /// @return - True if upper is to be preferred, false otherwise.
  565. static inline bool outranks(InstructionContext upper,
  566. InstructionContext lower) {
  567. assert(upper < IC_max);
  568. assert(lower < IC_max);
  569. #define ENUM_ENTRY(n, r, d) r,
  570. #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) \
  571. ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) \
  572. ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)
  573. static int ranks[IC_max] = {
  574. INSTRUCTION_CONTEXTS
  575. };
  576. #undef ENUM_ENTRY
  577. #undef ENUM_ENTRY_K_B
  578. return (ranks[upper] > ranks[lower]);
  579. }
  580. /// getDecisionType - Determines whether a ModRM decision with 255 entries can
  581. /// be compacted by eliminating redundant information.
  582. ///
  583. /// @param decision - The decision to be compacted.
  584. /// @return - The compactest available representation for the decision.
  585. static ModRMDecisionType getDecisionType(ModRMDecision &decision) {
  586. bool satisfiesOneEntry = true;
  587. bool satisfiesSplitRM = true;
  588. bool satisfiesSplitReg = true;
  589. bool satisfiesSplitMisc = true;
  590. for (unsigned index = 0; index < 256; ++index) {
  591. if (decision.instructionIDs[index] != decision.instructionIDs[0])
  592. satisfiesOneEntry = false;
  593. if (((index & 0xc0) == 0xc0) &&
  594. (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
  595. satisfiesSplitRM = false;
  596. if (((index & 0xc0) != 0xc0) &&
  597. (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
  598. satisfiesSplitRM = false;
  599. if (((index & 0xc0) == 0xc0) &&
  600. (decision.instructionIDs[index] != decision.instructionIDs[index&0xf8]))
  601. satisfiesSplitReg = false;
  602. if (((index & 0xc0) != 0xc0) &&
  603. (decision.instructionIDs[index] != decision.instructionIDs[index&0x38]))
  604. satisfiesSplitMisc = false;
  605. }
  606. if (satisfiesOneEntry)
  607. return MODRM_ONEENTRY;
  608. if (satisfiesSplitRM)
  609. return MODRM_SPLITRM;
  610. if (satisfiesSplitReg && satisfiesSplitMisc)
  611. return MODRM_SPLITREG;
  612. if (satisfiesSplitMisc)
  613. return MODRM_SPLITMISC;
  614. return MODRM_FULL;
  615. }
  616. /// stringForDecisionType - Returns a statically-allocated string corresponding
  617. /// to a particular decision type.
  618. ///
  619. /// @param dt - The decision type.
  620. /// @return - A pointer to the statically-allocated string (e.g.,
  621. /// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
  622. static const char* stringForDecisionType(ModRMDecisionType dt) {
  623. #define ENUM_ENTRY(n) case n: return #n;
  624. switch (dt) {
  625. default:
  626. llvm_unreachable("Unknown decision type");
  627. MODRMTYPES
  628. };
  629. #undef ENUM_ENTRY
  630. }
  631. DisassemblerTables::DisassemblerTables() {
  632. for (unsigned i = 0; i < std::size(Tables); i++)
  633. Tables[i] = std::make_unique<ContextDecision>();
  634. HasConflicts = false;
  635. }
  636. DisassemblerTables::~DisassemblerTables() {
  637. }
  638. void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
  639. unsigned &i1, unsigned &i2,
  640. unsigned &ModRMTableNum,
  641. ModRMDecision &decision) const {
  642. static uint32_t sEntryNumber = 1;
  643. ModRMDecisionType dt = getDecisionType(decision);
  644. if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0) {
  645. // Empty table.
  646. o2 << "{" << stringForDecisionType(dt) << ", 0}";
  647. return;
  648. }
  649. std::vector<unsigned> ModRMDecision;
  650. switch (dt) {
  651. default:
  652. llvm_unreachable("Unknown decision type");
  653. case MODRM_ONEENTRY:
  654. ModRMDecision.push_back(decision.instructionIDs[0]);
  655. break;
  656. case MODRM_SPLITRM:
  657. ModRMDecision.push_back(decision.instructionIDs[0x00]);
  658. ModRMDecision.push_back(decision.instructionIDs[0xc0]);
  659. break;
  660. case MODRM_SPLITREG:
  661. for (unsigned index = 0; index < 64; index += 8)
  662. ModRMDecision.push_back(decision.instructionIDs[index]);
  663. for (unsigned index = 0xc0; index < 256; index += 8)
  664. ModRMDecision.push_back(decision.instructionIDs[index]);
  665. break;
  666. case MODRM_SPLITMISC:
  667. for (unsigned index = 0; index < 64; index += 8)
  668. ModRMDecision.push_back(decision.instructionIDs[index]);
  669. for (unsigned index = 0xc0; index < 256; ++index)
  670. ModRMDecision.push_back(decision.instructionIDs[index]);
  671. break;
  672. case MODRM_FULL:
  673. for (unsigned short InstructionID : decision.instructionIDs)
  674. ModRMDecision.push_back(InstructionID);
  675. break;
  676. }
  677. unsigned &EntryNumber = ModRMTable[ModRMDecision];
  678. if (EntryNumber == 0) {
  679. EntryNumber = ModRMTableNum;
  680. ModRMTableNum += ModRMDecision.size();
  681. o1 << "/*Table" << EntryNumber << "*/\n";
  682. i1++;
  683. for (unsigned I : ModRMDecision) {
  684. o1.indent(i1 * 2) << format("0x%hx", I) << ", /*"
  685. << InstructionSpecifiers[I].name << "*/\n";
  686. }
  687. i1--;
  688. }
  689. o2 << "{" << stringForDecisionType(dt) << ", " << EntryNumber << "}";
  690. switch (dt) {
  691. default:
  692. llvm_unreachable("Unknown decision type");
  693. case MODRM_ONEENTRY:
  694. sEntryNumber += 1;
  695. break;
  696. case MODRM_SPLITRM:
  697. sEntryNumber += 2;
  698. break;
  699. case MODRM_SPLITREG:
  700. sEntryNumber += 16;
  701. break;
  702. case MODRM_SPLITMISC:
  703. sEntryNumber += 8 + 64;
  704. break;
  705. case MODRM_FULL:
  706. sEntryNumber += 256;
  707. break;
  708. }
  709. // We assume that the index can fit into uint16_t.
  710. assert(sEntryNumber < 65536U &&
  711. "Index into ModRMDecision is too large for uint16_t!");
  712. (void)sEntryNumber;
  713. }
  714. void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2,
  715. unsigned &i1, unsigned &i2,
  716. unsigned &ModRMTableNum,
  717. OpcodeDecision &opDecision) const {
  718. o2 << "{";
  719. ++i2;
  720. unsigned index;
  721. for (index = 0; index < 256; ++index) {
  722. auto &decision = opDecision.modRMDecisions[index];
  723. ModRMDecisionType dt = getDecisionType(decision);
  724. if (!(dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0))
  725. break;
  726. }
  727. if (index == 256) {
  728. // If all 256 entries are MODRM_ONEENTRY, omit output.
  729. static_assert(MODRM_ONEENTRY == 0);
  730. --i2;
  731. o2 << "},\n";
  732. } else {
  733. o2 << " /* struct OpcodeDecision */ {\n";
  734. for (index = 0; index < 256; ++index) {
  735. o2.indent(i2);
  736. o2 << "/*0x" << format("%02hhx", index) << "*/";
  737. emitModRMDecision(o1, o2, i1, i2, ModRMTableNum,
  738. opDecision.modRMDecisions[index]);
  739. if (index < 255)
  740. o2 << ",";
  741. o2 << "\n";
  742. }
  743. o2.indent(i2) << "}\n";
  744. --i2;
  745. o2.indent(i2) << "},\n";
  746. }
  747. }
  748. void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
  749. unsigned &i1, unsigned &i2,
  750. unsigned &ModRMTableNum,
  751. ContextDecision &decision,
  752. const char* name) const {
  753. o2.indent(i2) << "static const struct ContextDecision " << name << " = {{/* opcodeDecisions */\n";
  754. i2++;
  755. for (unsigned index = 0; index < IC_max; ++index) {
  756. o2.indent(i2) << "/*";
  757. o2 << stringForContext((InstructionContext)index);
  758. o2 << "*/ ";
  759. emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum,
  760. decision.opcodeDecisions[index]);
  761. }
  762. i2--;
  763. o2.indent(i2) << "}};" << "\n";
  764. }
  765. void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
  766. unsigned &i) const {
  767. unsigned NumInstructions = InstructionSpecifiers.size();
  768. o << "static const struct OperandSpecifier x86OperandSets[]["
  769. << X86_MAX_OPERANDS << "] = {\n";
  770. typedef SmallVector<std::pair<OperandEncoding, OperandType>,
  771. X86_MAX_OPERANDS> OperandListTy;
  772. std::map<OperandListTy, unsigned> OperandSets;
  773. unsigned OperandSetNum = 0;
  774. for (unsigned Index = 0; Index < NumInstructions; ++Index) {
  775. OperandListTy OperandList;
  776. for (auto Operand : InstructionSpecifiers[Index].operands) {
  777. OperandEncoding Encoding = (OperandEncoding)Operand.encoding;
  778. OperandType Type = (OperandType)Operand.type;
  779. OperandList.push_back(std::make_pair(Encoding, Type));
  780. }
  781. unsigned &N = OperandSets[OperandList];
  782. if (N != 0) continue;
  783. N = ++OperandSetNum;
  784. o << " { /* " << (OperandSetNum - 1) << " */\n";
  785. for (unsigned i = 0, e = OperandList.size(); i != e; ++i) {
  786. const char *Encoding = stringForOperandEncoding(OperandList[i].first);
  787. const char *Type = stringForOperandType(OperandList[i].second);
  788. o << " { " << Encoding << ", " << Type << " },\n";
  789. }
  790. o << " },\n";
  791. }
  792. o << "};" << "\n\n";
  793. o.indent(i * 2) << "static const struct InstructionSpecifier ";
  794. o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
  795. i++;
  796. for (unsigned index = 0; index < NumInstructions; ++index) {
  797. o.indent(i * 2) << "{ /* " << index << " */\n";
  798. i++;
  799. OperandListTy OperandList;
  800. for (auto Operand : InstructionSpecifiers[index].operands) {
  801. OperandEncoding Encoding = (OperandEncoding)Operand.encoding;
  802. OperandType Type = (OperandType)Operand.type;
  803. OperandList.push_back(std::make_pair(Encoding, Type));
  804. }
  805. o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n";
  806. o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n";
  807. i--;
  808. o.indent(i * 2) << "},\n";
  809. }
  810. i--;
  811. o.indent(i * 2) << "};" << "\n";
  812. }
  813. void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
  814. o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR
  815. "[" << ATTR_max << "] = {\n";
  816. i++;
  817. for (unsigned index = 0; index < ATTR_max; ++index) {
  818. o.indent(i * 2);
  819. if ((index & ATTR_EVEX) || (index & ATTR_VEX) || (index & ATTR_VEXL)) {
  820. if (index & ATTR_EVEX)
  821. o << "IC_EVEX";
  822. else
  823. o << "IC_VEX";
  824. if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2))
  825. o << "_L2";
  826. else if (index & ATTR_VEXL)
  827. o << "_L";
  828. if (index & ATTR_REXW)
  829. o << "_W";
  830. if (index & ATTR_OPSIZE)
  831. o << "_OPSIZE";
  832. else if (index & ATTR_XD)
  833. o << "_XD";
  834. else if (index & ATTR_XS)
  835. o << "_XS";
  836. if ((index & ATTR_EVEX)) {
  837. if (index & ATTR_EVEXKZ)
  838. o << "_KZ";
  839. else if (index & ATTR_EVEXK)
  840. o << "_K";
  841. if (index & ATTR_EVEXB)
  842. o << "_B";
  843. }
  844. }
  845. else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
  846. o << "IC_64BIT_REXW_XS";
  847. else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
  848. o << "IC_64BIT_REXW_XD";
  849. else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
  850. (index & ATTR_OPSIZE))
  851. o << "IC_64BIT_REXW_OPSIZE";
  852. else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
  853. (index & ATTR_ADSIZE))
  854. o << "IC_64BIT_REXW_ADSIZE";
  855. else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
  856. o << "IC_64BIT_XD_OPSIZE";
  857. else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE))
  858. o << "IC_64BIT_XD_ADSIZE";
  859. else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE))
  860. o << "IC_64BIT_XS_OPSIZE";
  861. else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE))
  862. o << "IC_64BIT_XS_ADSIZE";
  863. else if ((index & ATTR_64BIT) && (index & ATTR_XS))
  864. o << "IC_64BIT_XS";
  865. else if ((index & ATTR_64BIT) && (index & ATTR_XD))
  866. o << "IC_64BIT_XD";
  867. else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) &&
  868. (index & ATTR_ADSIZE))
  869. o << "IC_64BIT_OPSIZE_ADSIZE";
  870. else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
  871. o << "IC_64BIT_OPSIZE";
  872. else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE))
  873. o << "IC_64BIT_ADSIZE";
  874. else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
  875. o << "IC_64BIT_REXW";
  876. else if ((index & ATTR_64BIT))
  877. o << "IC_64BIT";
  878. else if ((index & ATTR_XS) && (index & ATTR_OPSIZE))
  879. o << "IC_XS_OPSIZE";
  880. else if ((index & ATTR_XD) && (index & ATTR_OPSIZE))
  881. o << "IC_XD_OPSIZE";
  882. else if ((index & ATTR_XS) && (index & ATTR_ADSIZE))
  883. o << "IC_XS_ADSIZE";
  884. else if ((index & ATTR_XD) && (index & ATTR_ADSIZE))
  885. o << "IC_XD_ADSIZE";
  886. else if (index & ATTR_XS)
  887. o << "IC_XS";
  888. else if (index & ATTR_XD)
  889. o << "IC_XD";
  890. else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
  891. o << "IC_OPSIZE_ADSIZE";
  892. else if (index & ATTR_OPSIZE)
  893. o << "IC_OPSIZE";
  894. else if (index & ATTR_ADSIZE)
  895. o << "IC_ADSIZE";
  896. else
  897. o << "IC";
  898. o << ", // " << index << "\n";
  899. }
  900. i--;
  901. o.indent(i * 2) << "};" << "\n";
  902. }
  903. void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
  904. unsigned &i1, unsigned &i2,
  905. unsigned &ModRMTableNum) const {
  906. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR);
  907. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR);
  908. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR);
  909. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR);
  910. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR);
  911. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR);
  912. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR);
  913. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], THREEDNOW_MAP_STR);
  914. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[8], MAP5_STR);
  915. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[9], MAP6_STR);
  916. }
  917. void DisassemblerTables::emit(raw_ostream &o) const {
  918. unsigned i1 = 0;
  919. unsigned i2 = 0;
  920. std::string s1;
  921. std::string s2;
  922. raw_string_ostream o1(s1);
  923. raw_string_ostream o2(s2);
  924. emitInstructionInfo(o, i2);
  925. o << "\n";
  926. emitContextTable(o, i2);
  927. o << "\n";
  928. unsigned ModRMTableNum = 0;
  929. o << "static const InstrUID modRMTable[] = {\n";
  930. i1++;
  931. std::vector<unsigned> EmptyTable(1, 0);
  932. ModRMTable[EmptyTable] = ModRMTableNum;
  933. ModRMTableNum += EmptyTable.size();
  934. o1 << "/*EmptyTable*/\n";
  935. o1.indent(i1 * 2) << "0x0,\n";
  936. i1--;
  937. emitContextDecisions(o1, o2, i1, i2, ModRMTableNum);
  938. o << o1.str();
  939. o << " 0x0\n";
  940. o << "};\n";
  941. o << "\n";
  942. o << o2.str();
  943. o << "\n";
  944. o << "\n";
  945. }
  946. void DisassemblerTables::setTableFields(ModRMDecision &decision,
  947. const ModRMFilter &filter,
  948. InstrUID uid,
  949. uint8_t opcode) {
  950. for (unsigned index = 0; index < 256; ++index) {
  951. if (filter.accepts(index)) {
  952. if (decision.instructionIDs[index] == uid)
  953. continue;
  954. if (decision.instructionIDs[index] != 0) {
  955. InstructionSpecifier &newInfo =
  956. InstructionSpecifiers[uid];
  957. InstructionSpecifier &previousInfo =
  958. InstructionSpecifiers[decision.instructionIDs[index]];
  959. if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
  960. newInfo.name == "XCHG32ar" ||
  961. newInfo.name == "XCHG64ar"))
  962. continue; // special case for XCHG*ar and NOOP
  963. if (outranks(previousInfo.insnContext, newInfo.insnContext))
  964. continue;
  965. if (previousInfo.insnContext == newInfo.insnContext) {
  966. errs() << "Error: Primary decode conflict: ";
  967. errs() << newInfo.name << " would overwrite " << previousInfo.name;
  968. errs() << "\n";
  969. errs() << "ModRM " << index << "\n";
  970. errs() << "Opcode " << (uint16_t)opcode << "\n";
  971. errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
  972. HasConflicts = true;
  973. }
  974. }
  975. decision.instructionIDs[index] = uid;
  976. }
  977. }
  978. }
  979. void DisassemblerTables::setTableFields(OpcodeType type,
  980. InstructionContext insnContext,
  981. uint8_t opcode,
  982. const ModRMFilter &filter,
  983. InstrUID uid,
  984. bool is32bit,
  985. bool noPrefix,
  986. bool ignoresVEX_L,
  987. bool ignoresVEX_W,
  988. unsigned addressSize) {
  989. ContextDecision &decision = *Tables[type];
  990. for (unsigned index = 0; index < IC_max; ++index) {
  991. if ((is32bit || addressSize == 16) &&
  992. inheritsFrom((InstructionContext)index, IC_64BIT))
  993. continue;
  994. bool adSize64 = addressSize == 64;
  995. if (inheritsFrom((InstructionContext)index,
  996. InstructionSpecifiers[uid].insnContext, noPrefix,
  997. ignoresVEX_L, ignoresVEX_W, adSize64))
  998. setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
  999. filter,
  1000. uid,
  1001. opcode);
  1002. }
  1003. }