hdspm.h 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211
  1. /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
  2. #ifndef __SOUND_HDSPM_H
  3. #define __SOUND_HDSPM_H
  4. /*
  5. * Copyright (C) 2003 Winfried Ritsch (IEM)
  6. * based on hdsp.h from Thomas Charbonnel (thomas@undata.org)
  7. */
  8. #ifdef __linux__
  9. #include <linux/types.h>
  10. #endif
  11. /* Maximum channels is 64 even on 56Mode you have 64playbacks to matrix */
  12. #define HDSPM_MAX_CHANNELS 64
  13. enum hdspm_io_type {
  14. MADI,
  15. MADIface,
  16. AIO,
  17. AES32,
  18. RayDAT
  19. };
  20. enum hdspm_speed {
  21. ss,
  22. ds,
  23. qs
  24. };
  25. /* -------------------- IOCTL Peak/RMS Meters -------------------- */
  26. struct hdspm_peak_rms {
  27. __u32 input_peaks[64];
  28. __u32 playback_peaks[64];
  29. __u32 output_peaks[64];
  30. __u64 input_rms[64];
  31. __u64 playback_rms[64];
  32. __u64 output_rms[64];
  33. __u8 speed; /* enum {ss, ds, qs} */
  34. int status2;
  35. };
  36. #define SNDRV_HDSPM_IOCTL_GET_PEAK_RMS \
  37. _IOR('H', 0x42, struct hdspm_peak_rms)
  38. /* ------------ CONFIG block IOCTL ---------------------- */
  39. struct hdspm_config {
  40. unsigned char pref_sync_ref;
  41. unsigned char wordclock_sync_check;
  42. unsigned char madi_sync_check;
  43. unsigned int system_sample_rate;
  44. unsigned int autosync_sample_rate;
  45. unsigned char system_clock_mode;
  46. unsigned char clock_source;
  47. unsigned char autosync_ref;
  48. unsigned char line_out;
  49. unsigned int passthru;
  50. unsigned int analog_out;
  51. };
  52. #define SNDRV_HDSPM_IOCTL_GET_CONFIG \
  53. _IOR('H', 0x41, struct hdspm_config)
  54. /*
  55. * If there's a TCO (TimeCode Option) board installed,
  56. * there are further options and status data available.
  57. * The hdspm_ltc structure contains the current SMPTE
  58. * timecode and some status information and can be
  59. * obtained via SNDRV_HDSPM_IOCTL_GET_LTC or in the
  60. * hdspm_status struct.
  61. */
  62. enum hdspm_ltc_format {
  63. format_invalid,
  64. fps_24,
  65. fps_25,
  66. fps_2997,
  67. fps_30
  68. };
  69. enum hdspm_ltc_frame {
  70. frame_invalid,
  71. drop_frame,
  72. full_frame
  73. };
  74. enum hdspm_ltc_input_format {
  75. ntsc,
  76. pal,
  77. no_video
  78. };
  79. struct hdspm_ltc {
  80. unsigned int ltc;
  81. enum hdspm_ltc_format format;
  82. enum hdspm_ltc_frame frame;
  83. enum hdspm_ltc_input_format input_format;
  84. };
  85. #define SNDRV_HDSPM_IOCTL_GET_LTC _IOR('H', 0x46, struct hdspm_ltc)
  86. /*
  87. * The status data reflects the device's current state
  88. * as determined by the card's configuration and
  89. * connection status.
  90. */
  91. enum hdspm_sync {
  92. hdspm_sync_no_lock = 0,
  93. hdspm_sync_lock = 1,
  94. hdspm_sync_sync = 2
  95. };
  96. enum hdspm_madi_input {
  97. hdspm_input_optical = 0,
  98. hdspm_input_coax = 1
  99. };
  100. enum hdspm_madi_channel_format {
  101. hdspm_format_ch_64 = 0,
  102. hdspm_format_ch_56 = 1
  103. };
  104. enum hdspm_madi_frame_format {
  105. hdspm_frame_48 = 0,
  106. hdspm_frame_96 = 1
  107. };
  108. enum hdspm_syncsource {
  109. syncsource_wc = 0,
  110. syncsource_madi = 1,
  111. syncsource_tco = 2,
  112. syncsource_sync = 3,
  113. syncsource_none = 4
  114. };
  115. struct hdspm_status {
  116. __u8 card_type; /* enum hdspm_io_type */
  117. enum hdspm_syncsource autosync_source;
  118. __u64 card_clock;
  119. __u32 master_period;
  120. union {
  121. struct {
  122. __u8 sync_wc; /* enum hdspm_sync */
  123. __u8 sync_madi; /* enum hdspm_sync */
  124. __u8 sync_tco; /* enum hdspm_sync */
  125. __u8 sync_in; /* enum hdspm_sync */
  126. __u8 madi_input; /* enum hdspm_madi_input */
  127. __u8 channel_format; /* enum hdspm_madi_channel_format */
  128. __u8 frame_format; /* enum hdspm_madi_frame_format */
  129. } madi;
  130. } card_specific;
  131. };
  132. #define SNDRV_HDSPM_IOCTL_GET_STATUS \
  133. _IOR('H', 0x47, struct hdspm_status)
  134. /*
  135. * Get information about the card and its add-ons.
  136. */
  137. #define HDSPM_ADDON_TCO 1
  138. struct hdspm_version {
  139. __u8 card_type; /* enum hdspm_io_type */
  140. char cardname[20];
  141. unsigned int serial;
  142. unsigned short firmware_rev;
  143. int addons;
  144. };
  145. #define SNDRV_HDSPM_IOCTL_GET_VERSION _IOR('H', 0x48, struct hdspm_version)
  146. /* ------------- get Matrix Mixer IOCTL --------------- */
  147. /* MADI mixer: 64inputs+64playback in 64outputs = 8192 => *4Byte =
  148. * 32768 Bytes
  149. */
  150. /* organisation is 64 channelfader in a continuous memory block */
  151. /* equivalent to hardware definition, maybe for future feature of mmap of
  152. * them
  153. */
  154. /* each of 64 outputs has 64 infader and 64 outfader:
  155. Ins to Outs mixer[out].in[in], Outstreams to Outs mixer[out].pb[pb] */
  156. #define HDSPM_MIXER_CHANNELS HDSPM_MAX_CHANNELS
  157. struct hdspm_channelfader {
  158. unsigned int in[HDSPM_MIXER_CHANNELS];
  159. unsigned int pb[HDSPM_MIXER_CHANNELS];
  160. };
  161. struct hdspm_mixer {
  162. struct hdspm_channelfader ch[HDSPM_MIXER_CHANNELS];
  163. };
  164. struct hdspm_mixer_ioctl {
  165. struct hdspm_mixer *mixer;
  166. };
  167. /* use indirect access due to the limit of ioctl bit size */
  168. #define SNDRV_HDSPM_IOCTL_GET_MIXER _IOR('H', 0x44, struct hdspm_mixer_ioctl)
  169. #endif