gf_2vect_mad_avx2.asm 6.6 KB

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  1. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  2. ; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
  3. ;
  4. ; Redistribution and use in source and binary forms, with or without
  5. ; modification, are permitted provided that the following conditions
  6. ; are met:
  7. ; * Redistributions of source code must retain the above copyright
  8. ; notice, this list of conditions and the following disclaimer.
  9. ; * Redistributions in binary form must reproduce the above copyright
  10. ; notice, this list of conditions and the following disclaimer in
  11. ; the documentation and/or other materials provided with the
  12. ; distribution.
  13. ; * Neither the name of Intel Corporation nor the names of its
  14. ; contributors may be used to endorse or promote products derived
  15. ; from this software without specific prior written permission.
  16. ;
  17. ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20. ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21. ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22. ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23. ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24. ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25. ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26. ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27. ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  29. ;;;
  30. ;;; gf_2vect_mad_avx2(len, vec, vec_i, mul_array, src, dest);
  31. ;;;
  32. %include "reg_sizes.asm"
  33. %define PS 8
  34. %ifidn __OUTPUT_FORMAT__, win64
  35. %define arg0 rcx
  36. %define arg0.w ecx
  37. %define arg1 rdx
  38. %define arg2 r8
  39. %define arg3 r9
  40. %define arg4 r12
  41. %define arg5 r15
  42. %define tmp r11
  43. %define tmp.w r11d
  44. %define tmp.b r11b
  45. %define tmp2 r10
  46. %define return rax
  47. %define return.w eax
  48. %define stack_size 16*9 + 3*8 ; must be an odd multiple of 8
  49. %define arg(x) [rsp + stack_size + PS + PS*x]
  50. %define func(x) proc_frame x
  51. %macro FUNC_SAVE 0
  52. sub rsp, stack_size
  53. vmovdqa [rsp+16*0],xmm6
  54. vmovdqa [rsp+16*1],xmm7
  55. vmovdqa [rsp+16*2],xmm8
  56. vmovdqa [rsp+16*3],xmm9
  57. vmovdqa [rsp+16*4],xmm10
  58. vmovdqa [rsp+16*5],xmm11
  59. vmovdqa [rsp+16*6],xmm12
  60. vmovdqa [rsp+16*7],xmm13
  61. vmovdqa [rsp+16*8],xmm14
  62. save_reg r12, 9*16 + 0*8
  63. save_reg r15, 9*16 + 1*8
  64. end_prolog
  65. mov arg4, arg(4)
  66. mov arg5, arg(5)
  67. %endmacro
  68. %macro FUNC_RESTORE 0
  69. vmovdqa xmm6, [rsp+16*0]
  70. vmovdqa xmm7, [rsp+16*1]
  71. vmovdqa xmm8, [rsp+16*2]
  72. vmovdqa xmm9, [rsp+16*3]
  73. vmovdqa xmm10, [rsp+16*4]
  74. vmovdqa xmm11, [rsp+16*5]
  75. vmovdqa xmm12, [rsp+16*6]
  76. vmovdqa xmm13, [rsp+16*7]
  77. vmovdqa xmm14, [rsp+16*8]
  78. mov r12, [rsp + 9*16 + 0*8]
  79. mov r15, [rsp + 9*16 + 1*8]
  80. add rsp, stack_size
  81. %endmacro
  82. %endif
  83. %ifidn __OUTPUT_FORMAT__, elf64
  84. %define arg0 rdi
  85. %define arg0.w edi
  86. %define arg1 rsi
  87. %define arg2 rdx
  88. %define arg3 rcx
  89. %define arg4 r8
  90. %define arg5 r9
  91. %define tmp r11
  92. %define tmp.w r11d
  93. %define tmp.b r11b
  94. %define tmp2 r10
  95. %define return rax
  96. %define return.w eax
  97. %define func(x) x:
  98. %define FUNC_SAVE
  99. %define FUNC_RESTORE
  100. %endif
  101. ;;; gf_2vect_mad_avx2(len, vec, vec_i, mul_array, src, dest)
  102. %define len arg0
  103. %define len.w arg0.w
  104. %define vec arg1
  105. %define vec_i arg2
  106. %define mul_array arg3
  107. %define src arg4
  108. %define dest1 arg5
  109. %define pos return
  110. %define pos.w return.w
  111. %define dest2 tmp2
  112. %ifndef EC_ALIGNED_ADDR
  113. ;;; Use Un-aligned load/store
  114. %define XLDR vmovdqu
  115. %define XSTR vmovdqu
  116. %else
  117. ;;; Use Non-temporal load/stor
  118. %ifdef NO_NT_LDST
  119. %define XLDR vmovdqa
  120. %define XSTR vmovdqa
  121. %else
  122. %define XLDR vmovntdqa
  123. %define XSTR vmovntdq
  124. %endif
  125. %endif
  126. default rel
  127. [bits 64]
  128. section .text
  129. %define xmask0f ymm14
  130. %define xmask0fx xmm14
  131. %define xgft1_lo ymm13
  132. %define xgft1_hi ymm12
  133. %define xgft2_lo ymm11
  134. %define xgft2_hi ymm10
  135. %define x0 ymm0
  136. %define xtmpa ymm1
  137. %define xtmph1 ymm2
  138. %define xtmpl1 ymm3
  139. %define xtmph2 ymm4
  140. %define xtmpl2 ymm5
  141. %define xd1 ymm6
  142. %define xd2 ymm7
  143. %define xtmpd1 ymm8
  144. %define xtmpd2 ymm9
  145. align 16
  146. global gf_2vect_mad_avx2:ISAL_SYM_TYPE_FUNCTION
  147. func(gf_2vect_mad_avx2)
  148. %ifidn __OUTPUT_FORMAT__, macho64
  149. global _gf_2vect_mad_avx2:ISAL_SYM_TYPE_FUNCTION
  150. func(_gf_2vect_mad_avx2)
  151. %endif
  152. FUNC_SAVE
  153. sub len, 32
  154. jl .return_fail
  155. xor pos, pos
  156. mov tmp.b, 0x0f
  157. vpinsrb xmask0fx, xmask0fx, tmp.w, 0
  158. vpbroadcastb xmask0f, xmask0fx ;Construct mask 0x0f0f0f...
  159. sal vec_i, 5 ;Multiply by 32
  160. sal vec, 5
  161. lea tmp, [mul_array + vec_i]
  162. vmovdqu xgft1_lo, [tmp] ;Load array Ax{00}, Ax{01}, ..., Ax{0f}
  163. ; " Ax{00}, Ax{10}, ..., Ax{f0}
  164. vmovdqu xgft2_lo, [tmp+vec] ;Load array Bx{00}, Bx{01}, ..., Bx{0f}
  165. ; " Bx{00}, Bx{10}, ..., Bx{f0}
  166. vperm2i128 xgft1_hi, xgft1_lo, xgft1_lo, 0x11 ; swapped to hi | hi
  167. vperm2i128 xgft1_lo, xgft1_lo, xgft1_lo, 0x00 ; swapped to lo | lo
  168. vperm2i128 xgft2_hi, xgft2_lo, xgft2_lo, 0x11 ; swapped to hi | hi
  169. vperm2i128 xgft2_lo, xgft2_lo, xgft2_lo, 0x00 ; swapped to lo | lo
  170. mov dest2, [dest1+PS] ; reuse mul_array
  171. mov dest1, [dest1]
  172. XLDR xtmpd1, [dest1+len] ;backup the last 16 bytes in dest
  173. XLDR xtmpd2, [dest2+len] ;backup the last 16 bytes in dest
  174. .loop32:
  175. XLDR xd1, [dest1+pos] ;Get next dest vector
  176. XLDR xd2, [dest2+pos] ;Get next dest vector
  177. .loop32_overlap:
  178. XLDR x0, [src+pos] ;Get next source vector
  179. vpand xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
  180. vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
  181. vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
  182. vpshufb xtmph1, xgft1_hi, x0 ;Lookup mul table of high nibble
  183. vpshufb xtmpl1, xgft1_lo, xtmpa ;Lookup mul table of low nibble
  184. vpxor xtmph1, xtmph1, xtmpl1 ;GF add high and low partials
  185. vpxor xd1, xd1, xtmph1 ;xd1 += partial
  186. vpshufb xtmph2, xgft2_hi, x0 ;Lookup mul table of high nibble
  187. vpshufb xtmpl2, xgft2_lo, xtmpa ;Lookup mul table of low nibble
  188. vpxor xtmph2, xtmph2, xtmpl2 ;GF add high and low partials
  189. vpxor xd2, xd2, xtmph2 ;xd2 += partial
  190. XSTR [dest1+pos], xd1
  191. XSTR [dest2+pos], xd2
  192. add pos, 32 ;Loop on 32 bytes at a time
  193. cmp pos, len
  194. jle .loop32
  195. lea tmp, [len + 32]
  196. cmp pos, tmp
  197. je .return_pass
  198. ;; Tail len
  199. mov pos, len ;Overlapped offset length-32
  200. vmovdqa xd1, xtmpd1 ;Restore xd1
  201. vmovdqa xd2, xtmpd2 ;Restore xd2
  202. jmp .loop32_overlap ;Do one more overlap pass
  203. .return_pass:
  204. mov return, 0
  205. FUNC_RESTORE
  206. ret
  207. .return_fail:
  208. mov return, 1
  209. FUNC_RESTORE
  210. ret
  211. endproc_frame
  212. section .data
  213. ;;; func core, ver, snum
  214. slversion gf_2vect_mad_avx2, 04, 01, 0205