checksum.cpp 2.5 KB

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  1. //===-- checksum.cpp --------------------------------------------*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. #include "checksum.h"
  9. #include "atomic_helpers.h"
  10. #if defined(__x86_64__) || defined(__i386__)
  11. #include <cpuid.h>
  12. #elif defined(__arm__) || defined(__aarch64__)
  13. #if SCUDO_FUCHSIA
  14. #error #include <zircon/features.h>
  15. #error #include <zircon/syscalls.h>
  16. #else
  17. #include <sys/auxv.h>
  18. #endif
  19. #endif
  20. namespace scudo {
  21. Checksum HashAlgorithm = {Checksum::BSD};
  22. #if defined(__x86_64__) || defined(__i386__)
  23. // i386 and x86_64 specific code to detect CRC32 hardware support via CPUID.
  24. // CRC32 requires the SSE 4.2 instruction set.
  25. #ifndef bit_SSE4_2
  26. #define bit_SSE4_2 bit_SSE42 // clang and gcc have different defines.
  27. #endif
  28. #ifndef signature_HYGON_ebx // They are not defined in gcc.
  29. // HYGON: "HygonGenuine".
  30. #define signature_HYGON_ebx 0x6f677948
  31. #define signature_HYGON_edx 0x6e65476e
  32. #define signature_HYGON_ecx 0x656e6975
  33. #endif
  34. bool hasHardwareCRC32() {
  35. u32 Eax, Ebx = 0, Ecx = 0, Edx = 0;
  36. __get_cpuid(0, &Eax, &Ebx, &Ecx, &Edx);
  37. const bool IsIntel = (Ebx == signature_INTEL_ebx) &&
  38. (Edx == signature_INTEL_edx) &&
  39. (Ecx == signature_INTEL_ecx);
  40. const bool IsAMD = (Ebx == signature_AMD_ebx) && (Edx == signature_AMD_edx) &&
  41. (Ecx == signature_AMD_ecx);
  42. const bool IsHygon = (Ebx == signature_HYGON_ebx) &&
  43. (Edx == signature_HYGON_edx) &&
  44. (Ecx == signature_HYGON_ecx);
  45. if (!IsIntel && !IsAMD && !IsHygon)
  46. return false;
  47. __get_cpuid(1, &Eax, &Ebx, &Ecx, &Edx);
  48. return !!(Ecx & bit_SSE4_2);
  49. }
  50. #elif defined(__arm__) || defined(__aarch64__)
  51. #ifndef AT_HWCAP
  52. #define AT_HWCAP 16
  53. #endif
  54. #ifndef HWCAP_CRC32
  55. #define HWCAP_CRC32 (1U << 7) // HWCAP_CRC32 is missing on older platforms.
  56. #endif
  57. bool hasHardwareCRC32() {
  58. #if SCUDO_FUCHSIA
  59. u32 HWCap;
  60. const zx_status_t Status =
  61. zx_system_get_features(ZX_FEATURE_KIND_CPU, &HWCap);
  62. if (Status != ZX_OK)
  63. return false;
  64. return !!(HWCap & ZX_ARM64_FEATURE_ISA_CRC32);
  65. #else
  66. return !!(getauxval(AT_HWCAP) & HWCAP_CRC32);
  67. #endif // SCUDO_FUCHSIA
  68. }
  69. #else
  70. // No hardware CRC32 implemented in Scudo for other architectures.
  71. bool hasHardwareCRC32() { return false; }
  72. #endif // defined(__x86_64__) || defined(__i386__)
  73. } // namespace scudo