kfd_ioctl.h 16 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. */
  22. #ifndef KFD_IOCTL_H_INCLUDED
  23. #define KFD_IOCTL_H_INCLUDED
  24. #include <drm/drm.h>
  25. #include <linux/ioctl.h>
  26. #define KFD_IOCTL_MAJOR_VERSION 1
  27. #define KFD_IOCTL_MINOR_VERSION 1
  28. struct kfd_ioctl_get_version_args {
  29. __u32 major_version; /* from KFD */
  30. __u32 minor_version; /* from KFD */
  31. };
  32. /* For kfd_ioctl_create_queue_args.queue_type. */
  33. #define KFD_IOC_QUEUE_TYPE_COMPUTE 0x0
  34. #define KFD_IOC_QUEUE_TYPE_SDMA 0x1
  35. #define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 0x2
  36. #define KFD_IOC_QUEUE_TYPE_SDMA_XGMI 0x3
  37. #define KFD_MAX_QUEUE_PERCENTAGE 100
  38. #define KFD_MAX_QUEUE_PRIORITY 15
  39. struct kfd_ioctl_create_queue_args {
  40. __u64 ring_base_address; /* to KFD */
  41. __u64 write_pointer_address; /* from KFD */
  42. __u64 read_pointer_address; /* from KFD */
  43. __u64 doorbell_offset; /* from KFD */
  44. __u32 ring_size; /* to KFD */
  45. __u32 gpu_id; /* to KFD */
  46. __u32 queue_type; /* to KFD */
  47. __u32 queue_percentage; /* to KFD */
  48. __u32 queue_priority; /* to KFD */
  49. __u32 queue_id; /* from KFD */
  50. __u64 eop_buffer_address; /* to KFD */
  51. __u64 eop_buffer_size; /* to KFD */
  52. __u64 ctx_save_restore_address; /* to KFD */
  53. __u32 ctx_save_restore_size; /* to KFD */
  54. __u32 ctl_stack_size; /* to KFD */
  55. };
  56. struct kfd_ioctl_destroy_queue_args {
  57. __u32 queue_id; /* to KFD */
  58. __u32 pad;
  59. };
  60. struct kfd_ioctl_update_queue_args {
  61. __u64 ring_base_address; /* to KFD */
  62. __u32 queue_id; /* to KFD */
  63. __u32 ring_size; /* to KFD */
  64. __u32 queue_percentage; /* to KFD */
  65. __u32 queue_priority; /* to KFD */
  66. };
  67. struct kfd_ioctl_set_cu_mask_args {
  68. __u32 queue_id; /* to KFD */
  69. __u32 num_cu_mask; /* to KFD */
  70. __u64 cu_mask_ptr; /* to KFD */
  71. };
  72. struct kfd_ioctl_get_queue_wave_state_args {
  73. __u64 ctl_stack_address; /* to KFD */
  74. __u32 ctl_stack_used_size; /* from KFD */
  75. __u32 save_area_used_size; /* from KFD */
  76. __u32 queue_id; /* to KFD */
  77. __u32 pad;
  78. };
  79. /* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */
  80. #define KFD_IOC_CACHE_POLICY_COHERENT 0
  81. #define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
  82. struct kfd_ioctl_set_memory_policy_args {
  83. __u64 alternate_aperture_base; /* to KFD */
  84. __u64 alternate_aperture_size; /* to KFD */
  85. __u32 gpu_id; /* to KFD */
  86. __u32 default_policy; /* to KFD */
  87. __u32 alternate_policy; /* to KFD */
  88. __u32 pad;
  89. };
  90. /*
  91. * All counters are monotonic. They are used for profiling of compute jobs.
  92. * The profiling is done by userspace.
  93. *
  94. * In case of GPU reset, the counter should not be affected.
  95. */
  96. struct kfd_ioctl_get_clock_counters_args {
  97. __u64 gpu_clock_counter; /* from KFD */
  98. __u64 cpu_clock_counter; /* from KFD */
  99. __u64 system_clock_counter; /* from KFD */
  100. __u64 system_clock_freq; /* from KFD */
  101. __u32 gpu_id; /* to KFD */
  102. __u32 pad;
  103. };
  104. struct kfd_process_device_apertures {
  105. __u64 lds_base; /* from KFD */
  106. __u64 lds_limit; /* from KFD */
  107. __u64 scratch_base; /* from KFD */
  108. __u64 scratch_limit; /* from KFD */
  109. __u64 gpuvm_base; /* from KFD */
  110. __u64 gpuvm_limit; /* from KFD */
  111. __u32 gpu_id; /* from KFD */
  112. __u32 pad;
  113. };
  114. /*
  115. * AMDKFD_IOC_GET_PROCESS_APERTURES is deprecated. Use
  116. * AMDKFD_IOC_GET_PROCESS_APERTURES_NEW instead, which supports an
  117. * unlimited number of GPUs.
  118. */
  119. #define NUM_OF_SUPPORTED_GPUS 7
  120. struct kfd_ioctl_get_process_apertures_args {
  121. struct kfd_process_device_apertures
  122. process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */
  123. /* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */
  124. __u32 num_of_nodes;
  125. __u32 pad;
  126. };
  127. struct kfd_ioctl_get_process_apertures_new_args {
  128. /* User allocated. Pointer to struct kfd_process_device_apertures
  129. * filled in by Kernel
  130. */
  131. __u64 kfd_process_device_apertures_ptr;
  132. /* to KFD - indicates amount of memory present in
  133. * kfd_process_device_apertures_ptr
  134. * from KFD - Number of entries filled by KFD.
  135. */
  136. __u32 num_of_nodes;
  137. __u32 pad;
  138. };
  139. #define MAX_ALLOWED_NUM_POINTS 100
  140. #define MAX_ALLOWED_AW_BUFF_SIZE 4096
  141. #define MAX_ALLOWED_WAC_BUFF_SIZE 128
  142. struct kfd_ioctl_dbg_register_args {
  143. __u32 gpu_id; /* to KFD */
  144. __u32 pad;
  145. };
  146. struct kfd_ioctl_dbg_unregister_args {
  147. __u32 gpu_id; /* to KFD */
  148. __u32 pad;
  149. };
  150. struct kfd_ioctl_dbg_address_watch_args {
  151. __u64 content_ptr; /* a pointer to the actual content */
  152. __u32 gpu_id; /* to KFD */
  153. __u32 buf_size_in_bytes; /*including gpu_id and buf_size */
  154. };
  155. struct kfd_ioctl_dbg_wave_control_args {
  156. __u64 content_ptr; /* a pointer to the actual content */
  157. __u32 gpu_id; /* to KFD */
  158. __u32 buf_size_in_bytes; /*including gpu_id and buf_size */
  159. };
  160. /* Matching HSA_EVENTTYPE */
  161. #define KFD_IOC_EVENT_SIGNAL 0
  162. #define KFD_IOC_EVENT_NODECHANGE 1
  163. #define KFD_IOC_EVENT_DEVICESTATECHANGE 2
  164. #define KFD_IOC_EVENT_HW_EXCEPTION 3
  165. #define KFD_IOC_EVENT_SYSTEM_EVENT 4
  166. #define KFD_IOC_EVENT_DEBUG_EVENT 5
  167. #define KFD_IOC_EVENT_PROFILE_EVENT 6
  168. #define KFD_IOC_EVENT_QUEUE_EVENT 7
  169. #define KFD_IOC_EVENT_MEMORY 8
  170. #define KFD_IOC_WAIT_RESULT_COMPLETE 0
  171. #define KFD_IOC_WAIT_RESULT_TIMEOUT 1
  172. #define KFD_IOC_WAIT_RESULT_FAIL 2
  173. #define KFD_SIGNAL_EVENT_LIMIT 4096
  174. /* For kfd_event_data.hw_exception_data.reset_type. */
  175. #define KFD_HW_EXCEPTION_WHOLE_GPU_RESET 0
  176. #define KFD_HW_EXCEPTION_PER_ENGINE_RESET 1
  177. /* For kfd_event_data.hw_exception_data.reset_cause. */
  178. #define KFD_HW_EXCEPTION_GPU_HANG 0
  179. #define KFD_HW_EXCEPTION_ECC 1
  180. /* For kfd_hsa_memory_exception_data.ErrorType */
  181. #define KFD_MEM_ERR_NO_RAS 0
  182. #define KFD_MEM_ERR_SRAM_ECC 1
  183. #define KFD_MEM_ERR_POISON_CONSUMED 2
  184. #define KFD_MEM_ERR_GPU_HANG 3
  185. struct kfd_ioctl_create_event_args {
  186. __u64 event_page_offset; /* from KFD */
  187. __u32 event_trigger_data; /* from KFD - signal events only */
  188. __u32 event_type; /* to KFD */
  189. __u32 auto_reset; /* to KFD */
  190. __u32 node_id; /* to KFD - only valid for certain
  191. event types */
  192. __u32 event_id; /* from KFD */
  193. __u32 event_slot_index; /* from KFD */
  194. };
  195. struct kfd_ioctl_destroy_event_args {
  196. __u32 event_id; /* to KFD */
  197. __u32 pad;
  198. };
  199. struct kfd_ioctl_set_event_args {
  200. __u32 event_id; /* to KFD */
  201. __u32 pad;
  202. };
  203. struct kfd_ioctl_reset_event_args {
  204. __u32 event_id; /* to KFD */
  205. __u32 pad;
  206. };
  207. struct kfd_memory_exception_failure {
  208. __u32 NotPresent; /* Page not present or supervisor privilege */
  209. __u32 ReadOnly; /* Write access to a read-only page */
  210. __u32 NoExecute; /* Execute access to a page marked NX */
  211. __u32 imprecise; /* Can't determine the exact fault address */
  212. };
  213. /* memory exception data*/
  214. struct kfd_hsa_memory_exception_data {
  215. struct kfd_memory_exception_failure failure;
  216. __u64 va;
  217. __u32 gpu_id;
  218. __u32 ErrorType; /* 0 = no RAS error,
  219. * 1 = ECC_SRAM,
  220. * 2 = Link_SYNFLOOD (poison),
  221. * 3 = GPU hang (not attributable to a specific cause),
  222. * other values reserved
  223. */
  224. };
  225. /* hw exception data */
  226. struct kfd_hsa_hw_exception_data {
  227. __u32 reset_type;
  228. __u32 reset_cause;
  229. __u32 memory_lost;
  230. __u32 gpu_id;
  231. };
  232. /* Event data */
  233. struct kfd_event_data {
  234. union {
  235. struct kfd_hsa_memory_exception_data memory_exception_data;
  236. struct kfd_hsa_hw_exception_data hw_exception_data;
  237. }; /* From KFD */
  238. __u64 kfd_event_data_ext; /* pointer to an extension structure
  239. for future exception types */
  240. __u32 event_id; /* to KFD */
  241. __u32 pad;
  242. };
  243. struct kfd_ioctl_wait_events_args {
  244. __u64 events_ptr; /* pointed to struct
  245. kfd_event_data array, to KFD */
  246. __u32 num_events; /* to KFD */
  247. __u32 wait_for_all; /* to KFD */
  248. __u32 timeout; /* to KFD */
  249. __u32 wait_result; /* from KFD */
  250. };
  251. struct kfd_ioctl_set_scratch_backing_va_args {
  252. __u64 va_addr; /* to KFD */
  253. __u32 gpu_id; /* to KFD */
  254. __u32 pad;
  255. };
  256. struct kfd_ioctl_get_tile_config_args {
  257. /* to KFD: pointer to tile array */
  258. __u64 tile_config_ptr;
  259. /* to KFD: pointer to macro tile array */
  260. __u64 macro_tile_config_ptr;
  261. /* to KFD: array size allocated by user mode
  262. * from KFD: array size filled by kernel
  263. */
  264. __u32 num_tile_configs;
  265. /* to KFD: array size allocated by user mode
  266. * from KFD: array size filled by kernel
  267. */
  268. __u32 num_macro_tile_configs;
  269. __u32 gpu_id; /* to KFD */
  270. __u32 gb_addr_config; /* from KFD */
  271. __u32 num_banks; /* from KFD */
  272. __u32 num_ranks; /* from KFD */
  273. /* struct size can be extended later if needed
  274. * without breaking ABI compatibility
  275. */
  276. };
  277. struct kfd_ioctl_set_trap_handler_args {
  278. __u64 tba_addr; /* to KFD */
  279. __u64 tma_addr; /* to KFD */
  280. __u32 gpu_id; /* to KFD */
  281. __u32 pad;
  282. };
  283. struct kfd_ioctl_acquire_vm_args {
  284. __u32 drm_fd; /* to KFD */
  285. __u32 gpu_id; /* to KFD */
  286. };
  287. /* Allocation flags: memory types */
  288. #define KFD_IOC_ALLOC_MEM_FLAGS_VRAM (1 << 0)
  289. #define KFD_IOC_ALLOC_MEM_FLAGS_GTT (1 << 1)
  290. #define KFD_IOC_ALLOC_MEM_FLAGS_USERPTR (1 << 2)
  291. #define KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL (1 << 3)
  292. #define KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP (1 << 4)
  293. /* Allocation flags: attributes/access options */
  294. #define KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE (1 << 31)
  295. #define KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30)
  296. #define KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC (1 << 29)
  297. #define KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE (1 << 28)
  298. #define KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM (1 << 27)
  299. #define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT (1 << 26)
  300. /* Allocate memory for later SVM (shared virtual memory) mapping.
  301. *
  302. * @va_addr: virtual address of the memory to be allocated
  303. * all later mappings on all GPUs will use this address
  304. * @size: size in bytes
  305. * @handle: buffer handle returned to user mode, used to refer to
  306. * this allocation for mapping, unmapping and freeing
  307. * @mmap_offset: for CPU-mapping the allocation by mmapping a render node
  308. * for userptrs this is overloaded to specify the CPU address
  309. * @gpu_id: device identifier
  310. * @flags: memory type and attributes. See KFD_IOC_ALLOC_MEM_FLAGS above
  311. */
  312. struct kfd_ioctl_alloc_memory_of_gpu_args {
  313. __u64 va_addr; /* to KFD */
  314. __u64 size; /* to KFD */
  315. __u64 handle; /* from KFD */
  316. __u64 mmap_offset; /* to KFD (userptr), from KFD (mmap offset) */
  317. __u32 gpu_id; /* to KFD */
  318. __u32 flags;
  319. };
  320. /* Free memory allocated with kfd_ioctl_alloc_memory_of_gpu
  321. *
  322. * @handle: memory handle returned by alloc
  323. */
  324. struct kfd_ioctl_free_memory_of_gpu_args {
  325. __u64 handle; /* to KFD */
  326. };
  327. /* Map memory to one or more GPUs
  328. *
  329. * @handle: memory handle returned by alloc
  330. * @device_ids_array_ptr: array of gpu_ids (__u32 per device)
  331. * @n_devices: number of devices in the array
  332. * @n_success: number of devices mapped successfully
  333. *
  334. * @n_success returns information to the caller how many devices from
  335. * the start of the array have mapped the buffer successfully. It can
  336. * be passed into a subsequent retry call to skip those devices. For
  337. * the first call the caller should initialize it to 0.
  338. *
  339. * If the ioctl completes with return code 0 (success), n_success ==
  340. * n_devices.
  341. */
  342. struct kfd_ioctl_map_memory_to_gpu_args {
  343. __u64 handle; /* to KFD */
  344. __u64 device_ids_array_ptr; /* to KFD */
  345. __u32 n_devices; /* to KFD */
  346. __u32 n_success; /* to/from KFD */
  347. };
  348. /* Unmap memory from one or more GPUs
  349. *
  350. * same arguments as for mapping
  351. */
  352. struct kfd_ioctl_unmap_memory_from_gpu_args {
  353. __u64 handle; /* to KFD */
  354. __u64 device_ids_array_ptr; /* to KFD */
  355. __u32 n_devices; /* to KFD */
  356. __u32 n_success; /* to/from KFD */
  357. };
  358. struct kfd_ioctl_get_dmabuf_info_args {
  359. __u64 size; /* from KFD */
  360. __u64 metadata_ptr; /* to KFD */
  361. __u32 metadata_size; /* to KFD (space allocated by user)
  362. * from KFD (actual metadata size)
  363. */
  364. __u32 gpu_id; /* from KFD */
  365. __u32 flags; /* from KFD (KFD_IOC_ALLOC_MEM_FLAGS) */
  366. __u32 dmabuf_fd; /* to KFD */
  367. };
  368. struct kfd_ioctl_import_dmabuf_args {
  369. __u64 va_addr; /* to KFD */
  370. __u64 handle; /* from KFD */
  371. __u32 gpu_id; /* to KFD */
  372. __u32 dmabuf_fd; /* to KFD */
  373. };
  374. /* Register offset inside the remapped mmio page
  375. */
  376. enum kfd_mmio_remap {
  377. KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL = 0,
  378. KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL = 4,
  379. };
  380. #define AMDKFD_IOCTL_BASE 'K'
  381. #define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
  382. #define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type)
  383. #define AMDKFD_IOW(nr, type) _IOW(AMDKFD_IOCTL_BASE, nr, type)
  384. #define AMDKFD_IOWR(nr, type) _IOWR(AMDKFD_IOCTL_BASE, nr, type)
  385. #define AMDKFD_IOC_GET_VERSION \
  386. AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
  387. #define AMDKFD_IOC_CREATE_QUEUE \
  388. AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
  389. #define AMDKFD_IOC_DESTROY_QUEUE \
  390. AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
  391. #define AMDKFD_IOC_SET_MEMORY_POLICY \
  392. AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
  393. #define AMDKFD_IOC_GET_CLOCK_COUNTERS \
  394. AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
  395. #define AMDKFD_IOC_GET_PROCESS_APERTURES \
  396. AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
  397. #define AMDKFD_IOC_UPDATE_QUEUE \
  398. AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
  399. #define AMDKFD_IOC_CREATE_EVENT \
  400. AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args)
  401. #define AMDKFD_IOC_DESTROY_EVENT \
  402. AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args)
  403. #define AMDKFD_IOC_SET_EVENT \
  404. AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args)
  405. #define AMDKFD_IOC_RESET_EVENT \
  406. AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args)
  407. #define AMDKFD_IOC_WAIT_EVENTS \
  408. AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
  409. #define AMDKFD_IOC_DBG_REGISTER \
  410. AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
  411. #define AMDKFD_IOC_DBG_UNREGISTER \
  412. AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
  413. #define AMDKFD_IOC_DBG_ADDRESS_WATCH \
  414. AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
  415. #define AMDKFD_IOC_DBG_WAVE_CONTROL \
  416. AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
  417. #define AMDKFD_IOC_SET_SCRATCH_BACKING_VA \
  418. AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args)
  419. #define AMDKFD_IOC_GET_TILE_CONFIG \
  420. AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args)
  421. #define AMDKFD_IOC_SET_TRAP_HANDLER \
  422. AMDKFD_IOW(0x13, struct kfd_ioctl_set_trap_handler_args)
  423. #define AMDKFD_IOC_GET_PROCESS_APERTURES_NEW \
  424. AMDKFD_IOWR(0x14, \
  425. struct kfd_ioctl_get_process_apertures_new_args)
  426. #define AMDKFD_IOC_ACQUIRE_VM \
  427. AMDKFD_IOW(0x15, struct kfd_ioctl_acquire_vm_args)
  428. #define AMDKFD_IOC_ALLOC_MEMORY_OF_GPU \
  429. AMDKFD_IOWR(0x16, struct kfd_ioctl_alloc_memory_of_gpu_args)
  430. #define AMDKFD_IOC_FREE_MEMORY_OF_GPU \
  431. AMDKFD_IOW(0x17, struct kfd_ioctl_free_memory_of_gpu_args)
  432. #define AMDKFD_IOC_MAP_MEMORY_TO_GPU \
  433. AMDKFD_IOWR(0x18, struct kfd_ioctl_map_memory_to_gpu_args)
  434. #define AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU \
  435. AMDKFD_IOWR(0x19, struct kfd_ioctl_unmap_memory_from_gpu_args)
  436. #define AMDKFD_IOC_SET_CU_MASK \
  437. AMDKFD_IOW(0x1A, struct kfd_ioctl_set_cu_mask_args)
  438. #define AMDKFD_IOC_GET_QUEUE_WAVE_STATE \
  439. AMDKFD_IOWR(0x1B, struct kfd_ioctl_get_queue_wave_state_args)
  440. #define AMDKFD_IOC_GET_DMABUF_INFO \
  441. AMDKFD_IOWR(0x1C, struct kfd_ioctl_get_dmabuf_info_args)
  442. #define AMDKFD_IOC_IMPORT_DMABUF \
  443. AMDKFD_IOWR(0x1D, struct kfd_ioctl_import_dmabuf_args)
  444. #define AMDKFD_COMMAND_START 0x01
  445. #define AMDKFD_COMMAND_END 0x1E
  446. #endif