LiveIntervalUnion.cpp 6.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212
  1. //===- LiveIntervalUnion.cpp - Live interval union data structure ---------===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // LiveIntervalUnion represents a coalesced set of live intervals. This may be
  10. // used during coalescing to represent a congruence class, or during register
  11. // allocation to model liveness of a physical register.
  12. //
  13. //===----------------------------------------------------------------------===//
  14. #include "llvm/CodeGen/LiveIntervalUnion.h"
  15. #include "llvm/ADT/STLExtras.h"
  16. #include "llvm/ADT/SparseBitVector.h"
  17. #include "llvm/CodeGen/LiveInterval.h"
  18. #include "llvm/CodeGen/TargetRegisterInfo.h"
  19. #include "llvm/Support/raw_ostream.h"
  20. #include <cassert>
  21. #include <cstdlib>
  22. using namespace llvm;
  23. #define DEBUG_TYPE "regalloc"
  24. // Merge a LiveInterval's segments. Guarantee no overlaps.
  25. void LiveIntervalUnion::unify(LiveInterval &VirtReg, const LiveRange &Range) {
  26. if (Range.empty())
  27. return;
  28. ++Tag;
  29. // Insert each of the virtual register's live segments into the map.
  30. LiveRange::const_iterator RegPos = Range.begin();
  31. LiveRange::const_iterator RegEnd = Range.end();
  32. SegmentIter SegPos = Segments.find(RegPos->start);
  33. while (SegPos.valid()) {
  34. SegPos.insert(RegPos->start, RegPos->end, &VirtReg);
  35. if (++RegPos == RegEnd)
  36. return;
  37. SegPos.advanceTo(RegPos->start);
  38. }
  39. // We have reached the end of Segments, so it is no longer necessary to search
  40. // for the insertion position.
  41. // It is faster to insert the end first.
  42. --RegEnd;
  43. SegPos.insert(RegEnd->start, RegEnd->end, &VirtReg);
  44. for (; RegPos != RegEnd; ++RegPos, ++SegPos)
  45. SegPos.insert(RegPos->start, RegPos->end, &VirtReg);
  46. }
  47. // Remove a live virtual register's segments from this union.
  48. void LiveIntervalUnion::extract(LiveInterval &VirtReg, const LiveRange &Range) {
  49. if (Range.empty())
  50. return;
  51. ++Tag;
  52. // Remove each of the virtual register's live segments from the map.
  53. LiveRange::const_iterator RegPos = Range.begin();
  54. LiveRange::const_iterator RegEnd = Range.end();
  55. SegmentIter SegPos = Segments.find(RegPos->start);
  56. while (true) {
  57. assert(SegPos.value() == &VirtReg && "Inconsistent LiveInterval");
  58. SegPos.erase();
  59. if (!SegPos.valid())
  60. return;
  61. // Skip all segments that may have been coalesced.
  62. RegPos = Range.advanceTo(RegPos, SegPos.start());
  63. if (RegPos == RegEnd)
  64. return;
  65. SegPos.advanceTo(RegPos->start);
  66. }
  67. }
  68. void
  69. LiveIntervalUnion::print(raw_ostream &OS, const TargetRegisterInfo *TRI) const {
  70. if (empty()) {
  71. OS << " empty\n";
  72. return;
  73. }
  74. for (LiveSegments::const_iterator SI = Segments.begin(); SI.valid(); ++SI) {
  75. OS << " [" << SI.start() << ' ' << SI.stop()
  76. << "):" << printReg(SI.value()->reg(), TRI);
  77. }
  78. OS << '\n';
  79. }
  80. #ifndef NDEBUG
  81. // Verify the live intervals in this union and add them to the visited set.
  82. void LiveIntervalUnion::verify(LiveVirtRegBitSet& VisitedVRegs) {
  83. for (SegmentIter SI = Segments.begin(); SI.valid(); ++SI)
  84. VisitedVRegs.set(SI.value()->reg());
  85. }
  86. #endif //!NDEBUG
  87. LiveInterval *LiveIntervalUnion::getOneVReg() const {
  88. if (empty())
  89. return nullptr;
  90. for (LiveSegments::const_iterator SI = Segments.begin(); SI.valid(); ++SI) {
  91. // return the first valid live interval
  92. return SI.value();
  93. }
  94. return nullptr;
  95. }
  96. // Scan the vector of interfering virtual registers in this union. Assume it's
  97. // quite small.
  98. bool LiveIntervalUnion::Query::isSeenInterference(LiveInterval *VirtReg) const {
  99. return is_contained(InterferingVRegs, VirtReg);
  100. }
  101. // Collect virtual registers in this union that interfere with this
  102. // query's live virtual register.
  103. //
  104. // The query state is one of:
  105. //
  106. // 1. CheckedFirstInterference == false: Iterators are uninitialized.
  107. // 2. SeenAllInterferences == true: InterferingVRegs complete, iterators unused.
  108. // 3. Iterators left at the last seen intersection.
  109. //
  110. unsigned
  111. LiveIntervalUnion::Query::collectInterferingVRegs(unsigned MaxInterferingRegs) {
  112. // Fast path return if we already have the desired information.
  113. if (SeenAllInterferences || InterferingVRegs.size() >= MaxInterferingRegs)
  114. return InterferingVRegs.size();
  115. // Set up iterators on the first call.
  116. if (!CheckedFirstInterference) {
  117. CheckedFirstInterference = true;
  118. // Quickly skip interference check for empty sets.
  119. if (LR->empty() || LiveUnion->empty()) {
  120. SeenAllInterferences = true;
  121. return 0;
  122. }
  123. // In most cases, the union will start before LR.
  124. LRI = LR->begin();
  125. LiveUnionI.setMap(LiveUnion->getMap());
  126. LiveUnionI.find(LRI->start);
  127. }
  128. LiveRange::const_iterator LREnd = LR->end();
  129. LiveInterval *RecentReg = nullptr;
  130. while (LiveUnionI.valid()) {
  131. assert(LRI != LREnd && "Reached end of LR");
  132. // Check for overlapping interference.
  133. while (LRI->start < LiveUnionI.stop() && LRI->end > LiveUnionI.start()) {
  134. // This is an overlap, record the interfering register.
  135. LiveInterval *VReg = LiveUnionI.value();
  136. if (VReg != RecentReg && !isSeenInterference(VReg)) {
  137. RecentReg = VReg;
  138. InterferingVRegs.push_back(VReg);
  139. if (InterferingVRegs.size() >= MaxInterferingRegs)
  140. return InterferingVRegs.size();
  141. }
  142. // This LiveUnion segment is no longer interesting.
  143. if (!(++LiveUnionI).valid()) {
  144. SeenAllInterferences = true;
  145. return InterferingVRegs.size();
  146. }
  147. }
  148. // The iterators are now not overlapping, LiveUnionI has been advanced
  149. // beyond LRI.
  150. assert(LRI->end <= LiveUnionI.start() && "Expected non-overlap");
  151. // Advance the iterator that ends first.
  152. LRI = LR->advanceTo(LRI, LiveUnionI.start());
  153. if (LRI == LREnd)
  154. break;
  155. // Detect overlap, handle above.
  156. if (LRI->start < LiveUnionI.stop())
  157. continue;
  158. // Still not overlapping. Catch up LiveUnionI.
  159. LiveUnionI.advanceTo(LRI->start);
  160. }
  161. SeenAllInterferences = true;
  162. return InterferingVRegs.size();
  163. }
  164. void LiveIntervalUnion::Array::init(LiveIntervalUnion::Allocator &Alloc,
  165. unsigned NSize) {
  166. // Reuse existing allocation.
  167. if (NSize == Size)
  168. return;
  169. clear();
  170. Size = NSize;
  171. LIUs = static_cast<LiveIntervalUnion*>(
  172. safe_malloc(sizeof(LiveIntervalUnion)*NSize));
  173. for (unsigned i = 0; i != Size; ++i)
  174. new(LIUs + i) LiveIntervalUnion(Alloc);
  175. }
  176. void LiveIntervalUnion::Array::clear() {
  177. if (!LIUs)
  178. return;
  179. for (unsigned i = 0; i != Size; ++i)
  180. LIUs[i].~LiveIntervalUnion();
  181. free(LIUs);
  182. Size = 0;
  183. LIUs = nullptr;
  184. }