gf_3vect_mad_avx.asm 8.2 KB

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  1. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  2. ; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
  3. ;
  4. ; Redistribution and use in source and binary forms, with or without
  5. ; modification, are permitted provided that the following conditions
  6. ; are met:
  7. ; * Redistributions of source code must retain the above copyright
  8. ; notice, this list of conditions and the following disclaimer.
  9. ; * Redistributions in binary form must reproduce the above copyright
  10. ; notice, this list of conditions and the following disclaimer in
  11. ; the documentation and/or other materials provided with the
  12. ; distribution.
  13. ; * Neither the name of Intel Corporation nor the names of its
  14. ; contributors may be used to endorse or promote products derived
  15. ; from this software without specific prior written permission.
  16. ;
  17. ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18. ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19. ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20. ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21. ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22. ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23. ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24. ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25. ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26. ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27. ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  29. ;;;
  30. ;;; gf_3vect_mad_avx(len, vec, vec_i, mul_array, src, dest);
  31. ;;;
  32. %include "reg_sizes.asm"
  33. %define PS 8
  34. %ifidn __OUTPUT_FORMAT__, win64
  35. %define arg0 rcx
  36. %define arg0.w ecx
  37. %define arg1 rdx
  38. %define arg2 r8
  39. %define arg3 r9
  40. %define arg4 r12
  41. %define arg5 r15
  42. %define tmp r11
  43. %define return rax
  44. %define return.w eax
  45. %define stack_size 16*10 + 3*8
  46. %define arg(x) [rsp + stack_size + PS + PS*x]
  47. %define func(x) proc_frame x
  48. %macro FUNC_SAVE 0
  49. sub rsp, stack_size
  50. vmovdqa [rsp+16*0],xmm6
  51. vmovdqa [rsp+16*1],xmm7
  52. vmovdqa [rsp+16*2],xmm8
  53. vmovdqa [rsp+16*3],xmm9
  54. vmovdqa [rsp+16*4],xmm10
  55. vmovdqa [rsp+16*5],xmm11
  56. vmovdqa [rsp+16*6],xmm12
  57. vmovdqa [rsp+16*7],xmm13
  58. vmovdqa [rsp+16*8],xmm14
  59. vmovdqa [rsp+16*9],xmm15
  60. save_reg r12, 10*16 + 0*8
  61. save_reg r15, 10*16 + 1*8
  62. end_prolog
  63. mov arg4, arg(4)
  64. mov arg5, arg(5)
  65. %endmacro
  66. %macro FUNC_RESTORE 0
  67. vmovdqa xmm6, [rsp+16*0]
  68. vmovdqa xmm7, [rsp+16*1]
  69. vmovdqa xmm8, [rsp+16*2]
  70. vmovdqa xmm9, [rsp+16*3]
  71. vmovdqa xmm10, [rsp+16*4]
  72. vmovdqa xmm11, [rsp+16*5]
  73. vmovdqa xmm12, [rsp+16*6]
  74. vmovdqa xmm13, [rsp+16*7]
  75. vmovdqa xmm14, [rsp+16*8]
  76. vmovdqa xmm15, [rsp+16*9]
  77. mov r12, [rsp + 10*16 + 0*8]
  78. mov r15, [rsp + 10*16 + 1*8]
  79. add rsp, stack_size
  80. %endmacro
  81. %elifidn __OUTPUT_FORMAT__, elf64
  82. %define arg0 rdi
  83. %define arg0.w edi
  84. %define arg1 rsi
  85. %define arg2 rdx
  86. %define arg3 rcx
  87. %define arg4 r8
  88. %define arg5 r9
  89. %define tmp r11
  90. %define return rax
  91. %define return.w eax
  92. %define func(x) x:
  93. %define FUNC_SAVE
  94. %define FUNC_RESTORE
  95. %endif
  96. ;;; gf_3vect_mad_avx(len, vec, vec_i, mul_array, src, dest)
  97. %define len arg0
  98. %define len.w arg0.w
  99. %define vec arg1
  100. %define vec_i arg2
  101. %define mul_array arg3
  102. %define src arg4
  103. %define dest1 arg5
  104. %define pos return
  105. %define pos.w return.w
  106. %define dest2 mul_array
  107. %define dest3 vec_i
  108. %ifndef EC_ALIGNED_ADDR
  109. ;;; Use Un-aligned load/store
  110. %define XLDR vmovdqu
  111. %define XSTR vmovdqu
  112. %else
  113. ;;; Use Non-temporal load/stor
  114. %ifdef NO_NT_LDST
  115. %define XLDR vmovdqa
  116. %define XSTR vmovdqa
  117. %else
  118. %define XLDR vmovntdqa
  119. %define XSTR vmovntdq
  120. %endif
  121. %endif
  122. default rel
  123. [bits 64]
  124. section .text
  125. %define xmask0f xmm15
  126. %define xgft1_lo xmm14
  127. %define xgft1_hi xmm13
  128. %define xgft2_lo xmm12
  129. %define xgft2_hi xmm11
  130. %define xgft3_lo xmm10
  131. %define xgft3_hi xmm9
  132. %define x0 xmm0
  133. %define xtmpa xmm1
  134. %define xtmph1 xmm2
  135. %define xtmpl1 xmm3
  136. %define xtmph2 xmm4
  137. %define xtmpl2 xmm5
  138. %define xtmph3 xmm6
  139. %define xtmpl3 xmm7
  140. %define xd1 xmm8
  141. %define xd2 xtmpl1
  142. %define xd3 xtmph1
  143. align 16
  144. global gf_3vect_mad_avx:ISAL_SYM_TYPE_FUNCTION
  145. func(gf_3vect_mad_avx)
  146. %ifidn __OUTPUT_FORMAT__, macho64
  147. global _gf_3vect_mad_avx:ISAL_SYM_TYPE_FUNCTION
  148. func(_gf_3vect_mad_avx)
  149. %endif
  150. FUNC_SAVE
  151. sub len, 16
  152. jl .return_fail
  153. xor pos, pos
  154. vmovdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
  155. sal vec_i, 5 ;Multiply by 32
  156. sal vec, 5
  157. lea tmp, [mul_array + vec_i]
  158. vmovdqu xgft1_lo, [tmp] ;Load array Ax{00}, Ax{01}, Ax{02}, ...
  159. vmovdqu xgft1_hi, [tmp+16] ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
  160. vmovdqu xgft2_lo, [tmp+vec] ;Load array Bx{00}, Bx{01}, Bx{02}, ...
  161. vmovdqu xgft2_hi, [tmp+vec+16] ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
  162. vmovdqu xgft3_lo, [tmp+2*vec] ;Load array Cx{00}, Cx{01}, Cx{02}, ...
  163. vmovdqu xgft3_hi, [tmp+2*vec+16]; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
  164. mov dest2, [dest1+PS] ; reuse mul_array
  165. mov dest3, [dest1+2*PS] ; reuse vec_i
  166. mov dest1, [dest1]
  167. .loop16:
  168. XLDR x0, [src+pos] ;Get next source vector
  169. XLDR xd1, [dest1+pos] ;Get next dest vector
  170. vpand xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
  171. vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
  172. vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
  173. ; dest1
  174. vpshufb xtmph1, xgft1_hi, x0 ;Lookup mul table of high nibble
  175. vpshufb xtmpl1, xgft1_lo, xtmpa ;Lookup mul table of low nibble
  176. vpxor xtmph1, xtmph1, xtmpl1 ;GF add high and low partials
  177. vpxor xd1, xd1, xtmph1 ;xd1 += partial
  178. XLDR xd2, [dest2+pos] ;reuse xtmpl1. Get next dest vector
  179. XLDR xd3, [dest3+pos] ;reuse xtmph1. Get next dest vector
  180. ; dest2
  181. vpshufb xtmph2, xgft2_hi, x0 ;Lookup mul table of high nibble
  182. vpshufb xtmpl2, xgft2_lo, xtmpa ;Lookup mul table of low nibble
  183. vpxor xtmph2, xtmph2, xtmpl2 ;GF add high and low partials
  184. vpxor xd2, xd2, xtmph2 ;xd2 += partial
  185. ; dest3
  186. vpshufb xtmph3, xgft3_hi, x0 ;Lookup mul table of high nibble
  187. vpshufb xtmpl3, xgft3_lo, xtmpa ;Lookup mul table of low nibble
  188. vpxor xtmph3, xtmph3, xtmpl3 ;GF add high and low partials
  189. vpxor xd3, xd3, xtmph3 ;xd3 += partial
  190. XSTR [dest1+pos], xd1
  191. XSTR [dest2+pos], xd2
  192. XSTR [dest3+pos], xd3
  193. add pos, 16 ;Loop on 16 bytes at a time
  194. cmp pos, len
  195. jle .loop16
  196. lea tmp, [len + 16]
  197. cmp pos, tmp
  198. je .return_pass
  199. .lessthan16:
  200. ;; Tail len
  201. ;; Do one more overlap pass
  202. mov tmp, len ;Overlapped offset length-16
  203. XLDR x0, [src+tmp] ;Get next source vector
  204. XLDR xd1, [dest1+tmp] ;Get next dest vector
  205. XLDR xd2, [dest2+tmp] ;reuse xtmpl1. Get next dest vector
  206. XLDR xd3, [dest3+tmp] ;reuse xtmph1. Get next dest vector
  207. sub len, pos
  208. movdqa xtmph3, [constip16] ;Load const of i + 16
  209. vpinsrb xtmpl3, xtmpl3, len.w, 15
  210. vpshufb xtmpl3, xtmpl3, xmask0f ;Broadcast len to all bytes
  211. vpcmpgtb xtmpl3, xtmpl3, xtmph3
  212. vpand xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
  213. vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
  214. vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
  215. ; dest1
  216. vpshufb xgft1_hi, xgft1_hi, x0 ;Lookup mul table of high nibble
  217. vpshufb xgft1_lo, xgft1_lo, xtmpa ;Lookup mul table of low nibble
  218. vpxor xgft1_hi, xgft1_hi, xgft1_lo ;GF add high and low partials
  219. vpand xgft1_hi, xgft1_hi, xtmpl3
  220. vpxor xd1, xd1, xgft1_hi
  221. ; dest2
  222. vpshufb xgft2_hi, xgft2_hi, x0 ;Lookup mul table of high nibble
  223. vpshufb xgft2_lo, xgft2_lo, xtmpa ;Lookup mul table of low nibble
  224. vpxor xgft2_hi, xgft2_hi, xgft2_lo ;GF add high and low partials
  225. vpand xgft2_hi, xgft2_hi, xtmpl3
  226. vpxor xd2, xd2, xgft2_hi
  227. ; dest3
  228. vpshufb xgft3_hi, xgft3_hi, x0 ;Lookup mul table of high nibble
  229. vpshufb xgft3_lo, xgft3_lo, xtmpa ;Lookup mul table of low nibble
  230. vpxor xgft3_hi, xgft3_hi, xgft3_lo ;GF add high and low partials
  231. vpand xgft3_hi, xgft3_hi, xtmpl3
  232. vpxor xd3, xd3, xgft3_hi
  233. XSTR [dest1+tmp], xd1
  234. XSTR [dest2+tmp], xd2
  235. XSTR [dest3+tmp], xd3
  236. .return_pass:
  237. mov return, 0
  238. FUNC_RESTORE
  239. ret
  240. .return_fail:
  241. mov return, 1
  242. FUNC_RESTORE
  243. ret
  244. endproc_frame
  245. section .data
  246. align 16
  247. mask0f: dq 0x0f0f0f0f0f0f0f0f, 0x0f0f0f0f0f0f0f0f
  248. constip16:
  249. dq 0xf8f9fafbfcfdfeff, 0xf0f1f2f3f4f5f6f7
  250. ;;; func core, ver, snum
  251. slversion gf_3vect_mad_avx, 02, 01, 0207