PPCMCCodeEmitter.h 6.6 KB

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  1. //===-- PPCMCCodeEmitter.h - Convert PPC code to machine code -------------===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // This file implements the PPCMCCodeEmitter class.
  10. //
  11. //===----------------------------------------------------------------------===//
  12. #ifndef LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H
  13. #define LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H
  14. #include "llvm/MC/MCAsmInfo.h"
  15. #include "llvm/MC/MCCodeEmitter.h"
  16. #include "llvm/MC/MCSubtargetInfo.h"
  17. #include "llvm/MC/MCInstrInfo.h"
  18. #include "llvm/MC/MCContext.h"
  19. #include "llvm/MC/MCInst.h"
  20. namespace llvm {
  21. class PPCMCCodeEmitter : public MCCodeEmitter {
  22. const MCInstrInfo &MCII;
  23. const MCContext &CTX;
  24. bool IsLittleEndian;
  25. public:
  26. PPCMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx)
  27. : MCII(mcii), CTX(ctx),
  28. IsLittleEndian(ctx.getAsmInfo()->isLittleEndian()) {}
  29. PPCMCCodeEmitter(const PPCMCCodeEmitter &) = delete;
  30. void operator=(const PPCMCCodeEmitter &) = delete;
  31. ~PPCMCCodeEmitter() override = default;
  32. unsigned getDirectBrEncoding(const MCInst &MI, unsigned OpNo,
  33. SmallVectorImpl<MCFixup> &Fixups,
  34. const MCSubtargetInfo &STI) const;
  35. unsigned getCondBrEncoding(const MCInst &MI, unsigned OpNo,
  36. SmallVectorImpl<MCFixup> &Fixups,
  37. const MCSubtargetInfo &STI) const;
  38. unsigned getAbsDirectBrEncoding(const MCInst &MI, unsigned OpNo,
  39. SmallVectorImpl<MCFixup> &Fixups,
  40. const MCSubtargetInfo &STI) const;
  41. unsigned getAbsCondBrEncoding(const MCInst &MI, unsigned OpNo,
  42. SmallVectorImpl<MCFixup> &Fixups,
  43. const MCSubtargetInfo &STI) const;
  44. unsigned getImm16Encoding(const MCInst &MI, unsigned OpNo,
  45. SmallVectorImpl<MCFixup> &Fixups,
  46. const MCSubtargetInfo &STI) const;
  47. uint64_t getImm34Encoding(const MCInst &MI, unsigned OpNo,
  48. SmallVectorImpl<MCFixup> &Fixups,
  49. const MCSubtargetInfo &STI,
  50. MCFixupKind Fixup) const;
  51. uint64_t getImm34EncodingNoPCRel(const MCInst &MI, unsigned OpNo,
  52. SmallVectorImpl<MCFixup> &Fixups,
  53. const MCSubtargetInfo &STI) const;
  54. uint64_t getImm34EncodingPCRel(const MCInst &MI, unsigned OpNo,
  55. SmallVectorImpl<MCFixup> &Fixups,
  56. const MCSubtargetInfo &STI) const;
  57. unsigned getMemRIEncoding(const MCInst &MI, unsigned OpNo,
  58. SmallVectorImpl<MCFixup> &Fixups,
  59. const MCSubtargetInfo &STI) const;
  60. unsigned getMemRIXEncoding(const MCInst &MI, unsigned OpNo,
  61. SmallVectorImpl<MCFixup> &Fixups,
  62. const MCSubtargetInfo &STI) const;
  63. unsigned getMemRIX16Encoding(const MCInst &MI, unsigned OpNo,
  64. SmallVectorImpl<MCFixup> &Fixups,
  65. const MCSubtargetInfo &STI) const;
  66. unsigned getMemRIHashEncoding(const MCInst &MI, unsigned OpNo,
  67. SmallVectorImpl<MCFixup> &Fixups,
  68. const MCSubtargetInfo &STI) const;
  69. uint64_t getMemRI34PCRelEncoding(const MCInst &MI, unsigned OpNo,
  70. SmallVectorImpl<MCFixup> &Fixups,
  71. const MCSubtargetInfo &STI) const;
  72. uint64_t getMemRI34Encoding(const MCInst &MI, unsigned OpNo,
  73. SmallVectorImpl<MCFixup> &Fixups,
  74. const MCSubtargetInfo &STI) const;
  75. unsigned getSPE8DisEncoding(const MCInst &MI, unsigned OpNo,
  76. SmallVectorImpl<MCFixup> &Fixups,
  77. const MCSubtargetInfo &STI) const;
  78. unsigned getSPE4DisEncoding(const MCInst &MI, unsigned OpNo,
  79. SmallVectorImpl<MCFixup> &Fixups,
  80. const MCSubtargetInfo &STI) const;
  81. unsigned getSPE2DisEncoding(const MCInst &MI, unsigned OpNo,
  82. SmallVectorImpl<MCFixup> &Fixups,
  83. const MCSubtargetInfo &STI) const;
  84. unsigned getTLSRegEncoding(const MCInst &MI, unsigned OpNo,
  85. SmallVectorImpl<MCFixup> &Fixups,
  86. const MCSubtargetInfo &STI) const;
  87. unsigned getTLSCallEncoding(const MCInst &MI, unsigned OpNo,
  88. SmallVectorImpl<MCFixup> &Fixups,
  89. const MCSubtargetInfo &STI) const;
  90. unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo,
  91. SmallVectorImpl<MCFixup> &Fixups,
  92. const MCSubtargetInfo &STI) const;
  93. unsigned getVSRpEvenEncoding(const MCInst &MI, unsigned OpNo,
  94. SmallVectorImpl<MCFixup> &Fixups,
  95. const MCSubtargetInfo &STI) const;
  96. /// getMachineOpValue - Return binary encoding of operand. If the machine
  97. /// operand requires relocation, record the relocation and return zero.
  98. uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
  99. SmallVectorImpl<MCFixup> &Fixups,
  100. const MCSubtargetInfo &STI) const;
  101. // getBinaryCodeForInstr - TableGen'erated function for getting the
  102. // binary encoding for an instruction.
  103. uint64_t getBinaryCodeForInstr(const MCInst &MI,
  104. SmallVectorImpl<MCFixup> &Fixups,
  105. const MCSubtargetInfo &STI) const;
  106. void encodeInstruction(const MCInst &MI, raw_ostream &OS,
  107. SmallVectorImpl<MCFixup> &Fixups,
  108. const MCSubtargetInfo &STI) const override;
  109. // Get the number of bytes used to encode the given MCInst.
  110. unsigned getInstSizeInBytes(const MCInst &MI) const;
  111. // Is this instruction a prefixed instruction.
  112. bool isPrefixedInstruction(const MCInst &MI) const;
  113. private:
  114. FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) const;
  115. void
  116. verifyInstructionPredicates(const MCInst &MI,
  117. const FeatureBitset &AvailableFeatures) const;
  118. };
  119. } // namespace llvm
  120. #endif // LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H