Thumb1InstrInfo.h 2.4 KB

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  1. //===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // This file contains the Thumb-1 implementation of the TargetInstrInfo class.
  10. //
  11. //===----------------------------------------------------------------------===//
  12. #ifndef LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
  13. #define LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
  14. #include "ARMBaseInstrInfo.h"
  15. #include "ThumbRegisterInfo.h"
  16. namespace llvm {
  17. class ARMSubtarget;
  18. class Thumb1InstrInfo : public ARMBaseInstrInfo {
  19. ThumbRegisterInfo RI;
  20. public:
  21. explicit Thumb1InstrInfo(const ARMSubtarget &STI);
  22. /// Return the noop instruction to use for a noop.
  23. MCInst getNop() const override;
  24. // Return the non-pre/post incrementing version of 'Opc'. Return 0
  25. // if there is not such an opcode.
  26. unsigned getUnindexedOpcode(unsigned Opc) const override;
  27. /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
  28. /// such, whenever a client has an instance of instruction info, it should
  29. /// always be able to get register info as well (through this method).
  30. ///
  31. const ThumbRegisterInfo &getRegisterInfo() const override { return RI; }
  32. void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
  33. const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
  34. bool KillSrc) const override;
  35. void storeRegToStackSlot(MachineBasicBlock &MBB,
  36. MachineBasicBlock::iterator MBBI,
  37. Register SrcReg, bool isKill, int FrameIndex,
  38. const TargetRegisterClass *RC,
  39. const TargetRegisterInfo *TRI) const override;
  40. void loadRegFromStackSlot(MachineBasicBlock &MBB,
  41. MachineBasicBlock::iterator MBBI,
  42. Register DestReg, int FrameIndex,
  43. const TargetRegisterClass *RC,
  44. const TargetRegisterInfo *TRI) const override;
  45. bool canCopyGluedNodeDuringSchedule(SDNode *N) const override;
  46. private:
  47. void expandLoadStackGuard(MachineBasicBlock::iterator MI) const override;
  48. };
  49. }
  50. #endif