MCInstrDesc.cpp 2.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354
  1. //===------ llvm/MC/MCInstrDesc.cpp- Instruction Descriptors --------------===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // This file defines methods on the MCOperandInfo and MCInstrDesc classes, which
  10. // are used to describe target instructions and their operands.
  11. //
  12. //===----------------------------------------------------------------------===//
  13. #include "llvm/MC/MCInstrDesc.h"
  14. #include "llvm/MC/MCInst.h"
  15. #include "llvm/MC/MCRegisterInfo.h"
  16. #include "llvm/MC/MCSubtargetInfo.h"
  17. using namespace llvm;
  18. bool MCInstrDesc::mayAffectControlFlow(const MCInst &MI,
  19. const MCRegisterInfo &RI) const {
  20. if (isBranch() || isCall() || isReturn() || isIndirectBranch())
  21. return true;
  22. unsigned PC = RI.getProgramCounter();
  23. if (PC == 0)
  24. return false;
  25. if (hasDefOfPhysReg(MI, PC, RI))
  26. return true;
  27. return false;
  28. }
  29. bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg,
  30. const MCRegisterInfo *MRI) const {
  31. if (const MCPhysReg *ImpDefs = ImplicitDefs)
  32. for (; *ImpDefs; ++ImpDefs)
  33. if (*ImpDefs == Reg || (MRI && MRI->isSubRegister(Reg, *ImpDefs)))
  34. return true;
  35. return false;
  36. }
  37. bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg,
  38. const MCRegisterInfo &RI) const {
  39. for (int i = 0, e = NumDefs; i != e; ++i)
  40. if (MI.getOperand(i).isReg() &&
  41. RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg()))
  42. return true;
  43. if (variadicOpsAreDefs())
  44. for (int i = NumOperands - 1, e = MI.getNumOperands(); i != e; ++i)
  45. if (MI.getOperand(i).isReg() &&
  46. RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg()))
  47. return true;
  48. return hasImplicitDefOfPhysReg(Reg, &RI);
  49. }