X86DisassemblerTables.cpp 43 KB

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  1. //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. //
  9. // This file is part of the X86 Disassembler Emitter.
  10. // It contains the implementation of the disassembler tables.
  11. // Documentation for the disassembler emitter in general can be found in
  12. // X86DisassemblerEmitter.h.
  13. //
  14. //===----------------------------------------------------------------------===//
  15. #include "X86DisassemblerTables.h"
  16. #include "X86DisassemblerShared.h"
  17. #include "llvm/ADT/STLExtras.h"
  18. #include "llvm/Support/ErrorHandling.h"
  19. #include "llvm/Support/Format.h"
  20. #include <map>
  21. using namespace llvm;
  22. using namespace X86Disassembler;
  23. /// stringForContext - Returns a string containing the name of a particular
  24. /// InstructionContext, usually for diagnostic purposes.
  25. ///
  26. /// @param insnContext - The instruction class to transform to a string.
  27. /// @return - A statically-allocated string constant that contains the
  28. /// name of the instruction class.
  29. static inline const char* stringForContext(InstructionContext insnContext) {
  30. switch (insnContext) {
  31. default:
  32. llvm_unreachable("Unhandled instruction class");
  33. #define ENUM_ENTRY(n, r, d) case n: return #n; break;
  34. #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) ENUM_ENTRY(n##_K_B, r, d)\
  35. ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)\
  36. ENUM_ENTRY(n##_KZ_B, r, d)
  37. INSTRUCTION_CONTEXTS
  38. #undef ENUM_ENTRY
  39. #undef ENUM_ENTRY_K_B
  40. }
  41. }
  42. /// stringForOperandType - Like stringForContext, but for OperandTypes.
  43. static inline const char* stringForOperandType(OperandType type) {
  44. switch (type) {
  45. default:
  46. llvm_unreachable("Unhandled type");
  47. #define ENUM_ENTRY(i, d) case i: return #i;
  48. TYPES
  49. #undef ENUM_ENTRY
  50. }
  51. }
  52. /// stringForOperandEncoding - like stringForContext, but for
  53. /// OperandEncodings.
  54. static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
  55. switch (encoding) {
  56. default:
  57. llvm_unreachable("Unhandled encoding");
  58. #define ENUM_ENTRY(i, d) case i: return #i;
  59. ENCODINGS
  60. #undef ENUM_ENTRY
  61. }
  62. }
  63. /// inheritsFrom - Indicates whether all instructions in one class also belong
  64. /// to another class.
  65. ///
  66. /// @param child - The class that may be the subset
  67. /// @param parent - The class that may be the superset
  68. /// @return - True if child is a subset of parent, false otherwise.
  69. static inline bool inheritsFrom(InstructionContext child,
  70. InstructionContext parent, bool noPrefix = true,
  71. bool VEX_LIG = false, bool VEX_WIG = false,
  72. bool AdSize64 = false) {
  73. if (child == parent)
  74. return true;
  75. switch (parent) {
  76. case IC:
  77. return(inheritsFrom(child, IC_64BIT, AdSize64) ||
  78. (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) ||
  79. inheritsFrom(child, IC_ADSIZE) ||
  80. (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) ||
  81. (noPrefix && inheritsFrom(child, IC_XS, noPrefix)));
  82. case IC_64BIT:
  83. return(inheritsFrom(child, IC_64BIT_REXW) ||
  84. (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) ||
  85. (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) ||
  86. (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) ||
  87. (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix)));
  88. case IC_OPSIZE:
  89. return inheritsFrom(child, IC_64BIT_OPSIZE) ||
  90. inheritsFrom(child, IC_OPSIZE_ADSIZE);
  91. case IC_ADSIZE:
  92. return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix));
  93. case IC_OPSIZE_ADSIZE:
  94. return false;
  95. case IC_64BIT_ADSIZE:
  96. return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix));
  97. case IC_64BIT_OPSIZE_ADSIZE:
  98. return false;
  99. case IC_XD:
  100. return inheritsFrom(child, IC_64BIT_XD);
  101. case IC_XS:
  102. return inheritsFrom(child, IC_64BIT_XS);
  103. case IC_XD_OPSIZE:
  104. return inheritsFrom(child, IC_64BIT_XD_OPSIZE);
  105. case IC_XS_OPSIZE:
  106. return inheritsFrom(child, IC_64BIT_XS_OPSIZE);
  107. case IC_XD_ADSIZE:
  108. return inheritsFrom(child, IC_64BIT_XD_ADSIZE);
  109. case IC_XS_ADSIZE:
  110. return inheritsFrom(child, IC_64BIT_XS_ADSIZE);
  111. case IC_64BIT_REXW:
  112. return((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) ||
  113. (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) ||
  114. (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) ||
  115. (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)));
  116. case IC_64BIT_OPSIZE:
  117. return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) ||
  118. (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) ||
  119. (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE));
  120. case IC_64BIT_XD:
  121. return(inheritsFrom(child, IC_64BIT_REXW_XD) ||
  122. (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE)));
  123. case IC_64BIT_XS:
  124. return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
  125. (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE)));
  126. case IC_64BIT_XD_OPSIZE:
  127. case IC_64BIT_XS_OPSIZE:
  128. return false;
  129. case IC_64BIT_XD_ADSIZE:
  130. case IC_64BIT_XS_ADSIZE:
  131. return false;
  132. case IC_64BIT_REXW_XD:
  133. case IC_64BIT_REXW_XS:
  134. case IC_64BIT_REXW_OPSIZE:
  135. case IC_64BIT_REXW_ADSIZE:
  136. return false;
  137. case IC_VEX:
  138. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W)) ||
  139. (VEX_WIG && inheritsFrom(child, IC_VEX_W)) ||
  140. (VEX_LIG && inheritsFrom(child, IC_VEX_L));
  141. case IC_VEX_XS:
  142. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS)) ||
  143. (VEX_WIG && inheritsFrom(child, IC_VEX_W_XS)) ||
  144. (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS));
  145. case IC_VEX_XD:
  146. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD)) ||
  147. (VEX_WIG && inheritsFrom(child, IC_VEX_W_XD)) ||
  148. (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD));
  149. case IC_VEX_OPSIZE:
  150. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) ||
  151. (VEX_WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) ||
  152. (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE));
  153. case IC_VEX_W:
  154. return VEX_LIG && inheritsFrom(child, IC_VEX_L_W);
  155. case IC_VEX_W_XS:
  156. return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS);
  157. case IC_VEX_W_XD:
  158. return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD);
  159. case IC_VEX_W_OPSIZE:
  160. return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
  161. case IC_VEX_L:
  162. return VEX_WIG && inheritsFrom(child, IC_VEX_L_W);
  163. case IC_VEX_L_XS:
  164. return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS);
  165. case IC_VEX_L_XD:
  166. return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD);
  167. case IC_VEX_L_OPSIZE:
  168. return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
  169. case IC_VEX_L_W:
  170. case IC_VEX_L_W_XS:
  171. case IC_VEX_L_W_XD:
  172. case IC_VEX_L_W_OPSIZE:
  173. return false;
  174. case IC_EVEX:
  175. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W)) ||
  176. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W)) ||
  177. (VEX_WIG && inheritsFrom(child, IC_EVEX_W)) ||
  178. (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) ||
  179. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2));
  180. case IC_EVEX_XS:
  181. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
  182. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) ||
  183. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS)) ||
  184. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) ||
  185. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS));
  186. case IC_EVEX_XD:
  187. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
  188. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) ||
  189. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD)) ||
  190. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) ||
  191. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD));
  192. case IC_EVEX_OPSIZE:
  193. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
  194. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) ||
  195. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) ||
  196. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) ||
  197. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE));
  198. case IC_EVEX_K:
  199. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
  200. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) ||
  201. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K)) ||
  202. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) ||
  203. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K));
  204. case IC_EVEX_XS_K:
  205. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
  206. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) ||
  207. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) ||
  208. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) ||
  209. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K));
  210. case IC_EVEX_XD_K:
  211. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
  212. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) ||
  213. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) ||
  214. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) ||
  215. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K));
  216. case IC_EVEX_OPSIZE_K:
  217. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
  218. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) ||
  219. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) ||
  220. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) ||
  221. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K));
  222. case IC_EVEX_KZ:
  223. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
  224. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) ||
  225. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ)) ||
  226. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) ||
  227. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ));
  228. case IC_EVEX_XS_KZ:
  229. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
  230. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) ||
  231. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) ||
  232. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) ||
  233. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ));
  234. case IC_EVEX_XD_KZ:
  235. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
  236. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) ||
  237. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) ||
  238. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) ||
  239. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ));
  240. case IC_EVEX_OPSIZE_KZ:
  241. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
  242. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) ||
  243. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) ||
  244. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) ||
  245. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ));
  246. case IC_EVEX_W:
  247. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) ||
  248. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W));
  249. case IC_EVEX_W_XS:
  250. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
  251. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS));
  252. case IC_EVEX_W_XD:
  253. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
  254. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD));
  255. case IC_EVEX_W_OPSIZE:
  256. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
  257. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE));
  258. case IC_EVEX_W_K:
  259. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
  260. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K));
  261. case IC_EVEX_W_XS_K:
  262. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
  263. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K));
  264. case IC_EVEX_W_XD_K:
  265. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
  266. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K));
  267. case IC_EVEX_W_OPSIZE_K:
  268. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
  269. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K));
  270. case IC_EVEX_W_KZ:
  271. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
  272. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ));
  273. case IC_EVEX_W_XS_KZ:
  274. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
  275. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ));
  276. case IC_EVEX_W_XD_KZ:
  277. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
  278. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ));
  279. case IC_EVEX_W_OPSIZE_KZ:
  280. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
  281. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ));
  282. case IC_EVEX_L:
  283. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W);
  284. case IC_EVEX_L_XS:
  285. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS);
  286. case IC_EVEX_L_XD:
  287. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD);
  288. case IC_EVEX_L_OPSIZE:
  289. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE);
  290. case IC_EVEX_L_K:
  291. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K);
  292. case IC_EVEX_L_XS_K:
  293. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K);
  294. case IC_EVEX_L_XD_K:
  295. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K);
  296. case IC_EVEX_L_OPSIZE_K:
  297. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K);
  298. case IC_EVEX_L_KZ:
  299. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ);
  300. case IC_EVEX_L_XS_KZ:
  301. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ);
  302. case IC_EVEX_L_XD_KZ:
  303. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ);
  304. case IC_EVEX_L_OPSIZE_KZ:
  305. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ);
  306. case IC_EVEX_L_W:
  307. case IC_EVEX_L_W_XS:
  308. case IC_EVEX_L_W_XD:
  309. case IC_EVEX_L_W_OPSIZE:
  310. return false;
  311. case IC_EVEX_L_W_K:
  312. case IC_EVEX_L_W_XS_K:
  313. case IC_EVEX_L_W_XD_K:
  314. case IC_EVEX_L_W_OPSIZE_K:
  315. return false;
  316. case IC_EVEX_L_W_KZ:
  317. case IC_EVEX_L_W_XS_KZ:
  318. case IC_EVEX_L_W_XD_KZ:
  319. case IC_EVEX_L_W_OPSIZE_KZ:
  320. return false;
  321. case IC_EVEX_L2:
  322. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W);
  323. case IC_EVEX_L2_XS:
  324. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS);
  325. case IC_EVEX_L2_XD:
  326. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD);
  327. case IC_EVEX_L2_OPSIZE:
  328. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE);
  329. case IC_EVEX_L2_K:
  330. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K);
  331. case IC_EVEX_L2_XS_K:
  332. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K);
  333. case IC_EVEX_L2_XD_K:
  334. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K);
  335. case IC_EVEX_L2_OPSIZE_K:
  336. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K);
  337. case IC_EVEX_L2_KZ:
  338. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ);
  339. case IC_EVEX_L2_XS_KZ:
  340. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ);
  341. case IC_EVEX_L2_XD_KZ:
  342. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ);
  343. case IC_EVEX_L2_OPSIZE_KZ:
  344. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ);
  345. case IC_EVEX_L2_W:
  346. case IC_EVEX_L2_W_XS:
  347. case IC_EVEX_L2_W_XD:
  348. case IC_EVEX_L2_W_OPSIZE:
  349. return false;
  350. case IC_EVEX_L2_W_K:
  351. case IC_EVEX_L2_W_XS_K:
  352. case IC_EVEX_L2_W_XD_K:
  353. case IC_EVEX_L2_W_OPSIZE_K:
  354. return false;
  355. case IC_EVEX_L2_W_KZ:
  356. case IC_EVEX_L2_W_XS_KZ:
  357. case IC_EVEX_L2_W_XD_KZ:
  358. case IC_EVEX_L2_W_OPSIZE_KZ:
  359. return false;
  360. case IC_EVEX_B:
  361. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
  362. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) ||
  363. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_B)) ||
  364. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) ||
  365. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B));
  366. case IC_EVEX_XS_B:
  367. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
  368. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) ||
  369. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) ||
  370. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) ||
  371. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B));
  372. case IC_EVEX_XD_B:
  373. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
  374. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) ||
  375. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) ||
  376. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) ||
  377. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B));
  378. case IC_EVEX_OPSIZE_B:
  379. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
  380. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) ||
  381. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) ||
  382. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) ||
  383. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B));
  384. case IC_EVEX_K_B:
  385. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
  386. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) ||
  387. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K_B)) ||
  388. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) ||
  389. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B));
  390. case IC_EVEX_XS_K_B:
  391. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
  392. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) ||
  393. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) ||
  394. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) ||
  395. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B));
  396. case IC_EVEX_XD_K_B:
  397. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
  398. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) ||
  399. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) ||
  400. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) ||
  401. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B));
  402. case IC_EVEX_OPSIZE_K_B:
  403. return (VEX_LIG && VEX_WIG &&
  404. inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
  405. (VEX_LIG && VEX_WIG &&
  406. inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) ||
  407. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) ||
  408. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) ||
  409. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B));
  410. case IC_EVEX_KZ_B:
  411. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
  412. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) ||
  413. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) ||
  414. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) ||
  415. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B));
  416. case IC_EVEX_XS_KZ_B:
  417. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
  418. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) ||
  419. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) ||
  420. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) ||
  421. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B));
  422. case IC_EVEX_XD_KZ_B:
  423. return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
  424. (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) ||
  425. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) ||
  426. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) ||
  427. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B));
  428. case IC_EVEX_OPSIZE_KZ_B:
  429. return (VEX_LIG && VEX_WIG &&
  430. inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
  431. (VEX_LIG && VEX_WIG &&
  432. inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) ||
  433. (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) ||
  434. (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) ||
  435. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B));
  436. case IC_EVEX_W_B:
  437. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
  438. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B));
  439. case IC_EVEX_W_XS_B:
  440. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
  441. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B));
  442. case IC_EVEX_W_XD_B:
  443. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
  444. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B));
  445. case IC_EVEX_W_OPSIZE_B:
  446. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
  447. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B));
  448. case IC_EVEX_W_K_B:
  449. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
  450. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B));
  451. case IC_EVEX_W_XS_K_B:
  452. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
  453. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B));
  454. case IC_EVEX_W_XD_K_B:
  455. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
  456. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B));
  457. case IC_EVEX_W_OPSIZE_K_B:
  458. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
  459. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B));
  460. case IC_EVEX_W_KZ_B:
  461. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
  462. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B));
  463. case IC_EVEX_W_XS_KZ_B:
  464. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
  465. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B));
  466. case IC_EVEX_W_XD_KZ_B:
  467. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
  468. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B));
  469. case IC_EVEX_W_OPSIZE_KZ_B:
  470. return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
  471. (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B));
  472. case IC_EVEX_L_B:
  473. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B);
  474. case IC_EVEX_L_XS_B:
  475. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B);
  476. case IC_EVEX_L_XD_B:
  477. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B);
  478. case IC_EVEX_L_OPSIZE_B:
  479. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B);
  480. case IC_EVEX_L_K_B:
  481. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B);
  482. case IC_EVEX_L_XS_K_B:
  483. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B);
  484. case IC_EVEX_L_XD_K_B:
  485. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B);
  486. case IC_EVEX_L_OPSIZE_K_B:
  487. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B);
  488. case IC_EVEX_L_KZ_B:
  489. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B);
  490. case IC_EVEX_L_XS_KZ_B:
  491. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B);
  492. case IC_EVEX_L_XD_KZ_B:
  493. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B);
  494. case IC_EVEX_L_OPSIZE_KZ_B:
  495. return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B);
  496. case IC_EVEX_L_W_B:
  497. case IC_EVEX_L_W_XS_B:
  498. case IC_EVEX_L_W_XD_B:
  499. case IC_EVEX_L_W_OPSIZE_B:
  500. return false;
  501. case IC_EVEX_L_W_K_B:
  502. case IC_EVEX_L_W_XS_K_B:
  503. case IC_EVEX_L_W_XD_K_B:
  504. case IC_EVEX_L_W_OPSIZE_K_B:
  505. return false;
  506. case IC_EVEX_L_W_KZ_B:
  507. case IC_EVEX_L_W_XS_KZ_B:
  508. case IC_EVEX_L_W_XD_KZ_B:
  509. case IC_EVEX_L_W_OPSIZE_KZ_B:
  510. return false;
  511. case IC_EVEX_L2_B:
  512. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B);
  513. case IC_EVEX_L2_XS_B:
  514. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B);
  515. case IC_EVEX_L2_XD_B:
  516. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B);
  517. case IC_EVEX_L2_OPSIZE_B:
  518. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B);
  519. case IC_EVEX_L2_K_B:
  520. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B);
  521. case IC_EVEX_L2_XS_K_B:
  522. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B);
  523. case IC_EVEX_L2_XD_K_B:
  524. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B);
  525. case IC_EVEX_L2_OPSIZE_K_B:
  526. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B);
  527. case IC_EVEX_L2_KZ_B:
  528. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B);
  529. case IC_EVEX_L2_XS_KZ_B:
  530. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B);
  531. case IC_EVEX_L2_XD_KZ_B:
  532. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B);
  533. case IC_EVEX_L2_OPSIZE_KZ_B:
  534. return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B);
  535. case IC_EVEX_L2_W_B:
  536. case IC_EVEX_L2_W_XS_B:
  537. case IC_EVEX_L2_W_XD_B:
  538. case IC_EVEX_L2_W_OPSIZE_B:
  539. return false;
  540. case IC_EVEX_L2_W_K_B:
  541. case IC_EVEX_L2_W_XS_K_B:
  542. case IC_EVEX_L2_W_XD_K_B:
  543. case IC_EVEX_L2_W_OPSIZE_K_B:
  544. return false;
  545. case IC_EVEX_L2_W_KZ_B:
  546. case IC_EVEX_L2_W_XS_KZ_B:
  547. case IC_EVEX_L2_W_XD_KZ_B:
  548. case IC_EVEX_L2_W_OPSIZE_KZ_B:
  549. return false;
  550. default:
  551. errs() << "Unknown instruction class: " <<
  552. stringForContext((InstructionContext)parent) << "\n";
  553. llvm_unreachable("Unknown instruction class");
  554. }
  555. }
  556. /// outranks - Indicates whether, if an instruction has two different applicable
  557. /// classes, which class should be preferred when performing decode. This
  558. /// imposes a total ordering (ties are resolved toward "lower")
  559. ///
  560. /// @param upper - The class that may be preferable
  561. /// @param lower - The class that may be less preferable
  562. /// @return - True if upper is to be preferred, false otherwise.
  563. static inline bool outranks(InstructionContext upper,
  564. InstructionContext lower) {
  565. assert(upper < IC_max);
  566. assert(lower < IC_max);
  567. #define ENUM_ENTRY(n, r, d) r,
  568. #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) \
  569. ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) \
  570. ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)
  571. static int ranks[IC_max] = {
  572. INSTRUCTION_CONTEXTS
  573. };
  574. #undef ENUM_ENTRY
  575. #undef ENUM_ENTRY_K_B
  576. return (ranks[upper] > ranks[lower]);
  577. }
  578. /// getDecisionType - Determines whether a ModRM decision with 255 entries can
  579. /// be compacted by eliminating redundant information.
  580. ///
  581. /// @param decision - The decision to be compacted.
  582. /// @return - The compactest available representation for the decision.
  583. static ModRMDecisionType getDecisionType(ModRMDecision &decision) {
  584. bool satisfiesOneEntry = true;
  585. bool satisfiesSplitRM = true;
  586. bool satisfiesSplitReg = true;
  587. bool satisfiesSplitMisc = true;
  588. for (unsigned index = 0; index < 256; ++index) {
  589. if (decision.instructionIDs[index] != decision.instructionIDs[0])
  590. satisfiesOneEntry = false;
  591. if (((index & 0xc0) == 0xc0) &&
  592. (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
  593. satisfiesSplitRM = false;
  594. if (((index & 0xc0) != 0xc0) &&
  595. (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
  596. satisfiesSplitRM = false;
  597. if (((index & 0xc0) == 0xc0) &&
  598. (decision.instructionIDs[index] != decision.instructionIDs[index&0xf8]))
  599. satisfiesSplitReg = false;
  600. if (((index & 0xc0) != 0xc0) &&
  601. (decision.instructionIDs[index] != decision.instructionIDs[index&0x38]))
  602. satisfiesSplitMisc = false;
  603. }
  604. if (satisfiesOneEntry)
  605. return MODRM_ONEENTRY;
  606. if (satisfiesSplitRM)
  607. return MODRM_SPLITRM;
  608. if (satisfiesSplitReg && satisfiesSplitMisc)
  609. return MODRM_SPLITREG;
  610. if (satisfiesSplitMisc)
  611. return MODRM_SPLITMISC;
  612. return MODRM_FULL;
  613. }
  614. /// stringForDecisionType - Returns a statically-allocated string corresponding
  615. /// to a particular decision type.
  616. ///
  617. /// @param dt - The decision type.
  618. /// @return - A pointer to the statically-allocated string (e.g.,
  619. /// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
  620. static const char* stringForDecisionType(ModRMDecisionType dt) {
  621. #define ENUM_ENTRY(n) case n: return #n;
  622. switch (dt) {
  623. default:
  624. llvm_unreachable("Unknown decision type");
  625. MODRMTYPES
  626. };
  627. #undef ENUM_ENTRY
  628. }
  629. DisassemblerTables::DisassemblerTables() {
  630. for (unsigned i = 0; i < array_lengthof(Tables); i++)
  631. Tables[i] = std::make_unique<ContextDecision>();
  632. HasConflicts = false;
  633. }
  634. DisassemblerTables::~DisassemblerTables() {
  635. }
  636. void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
  637. unsigned &i1, unsigned &i2,
  638. unsigned &ModRMTableNum,
  639. ModRMDecision &decision) const {
  640. static uint32_t sTableNumber = 0;
  641. static uint32_t sEntryNumber = 1;
  642. ModRMDecisionType dt = getDecisionType(decision);
  643. if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0) {
  644. // Empty table.
  645. o2 << "{" << stringForDecisionType(dt) << ", 0}";
  646. return;
  647. }
  648. std::vector<unsigned> ModRMDecision;
  649. switch (dt) {
  650. default:
  651. llvm_unreachable("Unknown decision type");
  652. case MODRM_ONEENTRY:
  653. ModRMDecision.push_back(decision.instructionIDs[0]);
  654. break;
  655. case MODRM_SPLITRM:
  656. ModRMDecision.push_back(decision.instructionIDs[0x00]);
  657. ModRMDecision.push_back(decision.instructionIDs[0xc0]);
  658. break;
  659. case MODRM_SPLITREG:
  660. for (unsigned index = 0; index < 64; index += 8)
  661. ModRMDecision.push_back(decision.instructionIDs[index]);
  662. for (unsigned index = 0xc0; index < 256; index += 8)
  663. ModRMDecision.push_back(decision.instructionIDs[index]);
  664. break;
  665. case MODRM_SPLITMISC:
  666. for (unsigned index = 0; index < 64; index += 8)
  667. ModRMDecision.push_back(decision.instructionIDs[index]);
  668. for (unsigned index = 0xc0; index < 256; ++index)
  669. ModRMDecision.push_back(decision.instructionIDs[index]);
  670. break;
  671. case MODRM_FULL:
  672. for (unsigned index = 0; index < 256; ++index)
  673. ModRMDecision.push_back(decision.instructionIDs[index]);
  674. break;
  675. }
  676. unsigned &EntryNumber = ModRMTable[ModRMDecision];
  677. if (EntryNumber == 0) {
  678. EntryNumber = ModRMTableNum;
  679. ModRMTableNum += ModRMDecision.size();
  680. o1 << "/*Table" << EntryNumber << "*/\n";
  681. i1++;
  682. for (std::vector<unsigned>::const_iterator I = ModRMDecision.begin(),
  683. E = ModRMDecision.end(); I != E; ++I) {
  684. o1.indent(i1 * 2) << format("0x%hx", *I) << ", /*"
  685. << InstructionSpecifiers[*I].name << "*/\n";
  686. }
  687. i1--;
  688. }
  689. o2 << "{" << stringForDecisionType(dt) << ", " << EntryNumber << "}";
  690. switch (dt) {
  691. default:
  692. llvm_unreachable("Unknown decision type");
  693. case MODRM_ONEENTRY:
  694. sEntryNumber += 1;
  695. break;
  696. case MODRM_SPLITRM:
  697. sEntryNumber += 2;
  698. break;
  699. case MODRM_SPLITREG:
  700. sEntryNumber += 16;
  701. break;
  702. case MODRM_SPLITMISC:
  703. sEntryNumber += 8 + 64;
  704. break;
  705. case MODRM_FULL:
  706. sEntryNumber += 256;
  707. break;
  708. }
  709. // We assume that the index can fit into uint16_t.
  710. assert(sEntryNumber < 65536U &&
  711. "Index into ModRMDecision is too large for uint16_t!");
  712. ++sTableNumber;
  713. }
  714. void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2,
  715. unsigned &i1, unsigned &i2,
  716. unsigned &ModRMTableNum,
  717. OpcodeDecision &opDecision) const {
  718. o2 << "{";
  719. ++i2;
  720. unsigned index;
  721. for (index = 0; index < 256; ++index) {
  722. auto &decision = opDecision.modRMDecisions[index];
  723. ModRMDecisionType dt = getDecisionType(decision);
  724. if (!(dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0))
  725. break;
  726. }
  727. if (index == 256) {
  728. // If all 256 entries are MODRM_ONEENTRY, omit output.
  729. static_assert(MODRM_ONEENTRY == 0, "");
  730. --i2;
  731. o2 << "},\n";
  732. } else {
  733. o2 << " /* struct OpcodeDecision */ {\n";
  734. for (index = 0; index < 256; ++index) {
  735. o2.indent(i2);
  736. o2 << "/*0x" << format("%02hhx", index) << "*/";
  737. emitModRMDecision(o1, o2, i1, i2, ModRMTableNum,
  738. opDecision.modRMDecisions[index]);
  739. if (index < 255)
  740. o2 << ",";
  741. o2 << "\n";
  742. }
  743. o2.indent(i2) << "}\n";
  744. --i2;
  745. o2.indent(i2) << "},\n";
  746. }
  747. }
  748. void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
  749. unsigned &i1, unsigned &i2,
  750. unsigned &ModRMTableNum,
  751. ContextDecision &decision,
  752. const char* name) const {
  753. o2.indent(i2) << "static const struct ContextDecision " << name << " = {{/* opcodeDecisions */\n";
  754. i2++;
  755. for (unsigned index = 0; index < IC_max; ++index) {
  756. o2.indent(i2) << "/*";
  757. o2 << stringForContext((InstructionContext)index);
  758. o2 << "*/ ";
  759. emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum,
  760. decision.opcodeDecisions[index]);
  761. }
  762. i2--;
  763. o2.indent(i2) << "}};" << "\n";
  764. }
  765. void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
  766. unsigned &i) const {
  767. unsigned NumInstructions = InstructionSpecifiers.size();
  768. o << "static const struct OperandSpecifier x86OperandSets[]["
  769. << X86_MAX_OPERANDS << "] = {\n";
  770. typedef SmallVector<std::pair<OperandEncoding, OperandType>,
  771. X86_MAX_OPERANDS> OperandListTy;
  772. std::map<OperandListTy, unsigned> OperandSets;
  773. unsigned OperandSetNum = 0;
  774. for (unsigned Index = 0; Index < NumInstructions; ++Index) {
  775. OperandListTy OperandList;
  776. for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS;
  777. ++OperandIndex) {
  778. OperandEncoding Encoding = (OperandEncoding)InstructionSpecifiers[Index]
  779. .operands[OperandIndex].encoding;
  780. OperandType Type = (OperandType)InstructionSpecifiers[Index]
  781. .operands[OperandIndex].type;
  782. OperandList.push_back(std::make_pair(Encoding, Type));
  783. }
  784. unsigned &N = OperandSets[OperandList];
  785. if (N != 0) continue;
  786. N = ++OperandSetNum;
  787. o << " { /* " << (OperandSetNum - 1) << " */\n";
  788. for (unsigned i = 0, e = OperandList.size(); i != e; ++i) {
  789. const char *Encoding = stringForOperandEncoding(OperandList[i].first);
  790. const char *Type = stringForOperandType(OperandList[i].second);
  791. o << " { " << Encoding << ", " << Type << " },\n";
  792. }
  793. o << " },\n";
  794. }
  795. o << "};" << "\n\n";
  796. o.indent(i * 2) << "static const struct InstructionSpecifier ";
  797. o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
  798. i++;
  799. for (unsigned index = 0; index < NumInstructions; ++index) {
  800. o.indent(i * 2) << "{ /* " << index << " */\n";
  801. i++;
  802. OperandListTy OperandList;
  803. for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS;
  804. ++OperandIndex) {
  805. OperandEncoding Encoding = (OperandEncoding)InstructionSpecifiers[index]
  806. .operands[OperandIndex].encoding;
  807. OperandType Type = (OperandType)InstructionSpecifiers[index]
  808. .operands[OperandIndex].type;
  809. OperandList.push_back(std::make_pair(Encoding, Type));
  810. }
  811. o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n";
  812. o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n";
  813. i--;
  814. o.indent(i * 2) << "},\n";
  815. }
  816. i--;
  817. o.indent(i * 2) << "};" << "\n";
  818. }
  819. void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
  820. o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR
  821. "[" << ATTR_max << "] = {\n";
  822. i++;
  823. for (unsigned index = 0; index < ATTR_max; ++index) {
  824. o.indent(i * 2);
  825. if ((index & ATTR_EVEX) || (index & ATTR_VEX) || (index & ATTR_VEXL)) {
  826. if (index & ATTR_EVEX)
  827. o << "IC_EVEX";
  828. else
  829. o << "IC_VEX";
  830. if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2))
  831. o << "_L2";
  832. else if (index & ATTR_VEXL)
  833. o << "_L";
  834. if (index & ATTR_REXW)
  835. o << "_W";
  836. if (index & ATTR_OPSIZE)
  837. o << "_OPSIZE";
  838. else if (index & ATTR_XD)
  839. o << "_XD";
  840. else if (index & ATTR_XS)
  841. o << "_XS";
  842. if ((index & ATTR_EVEX)) {
  843. if (index & ATTR_EVEXKZ)
  844. o << "_KZ";
  845. else if (index & ATTR_EVEXK)
  846. o << "_K";
  847. if (index & ATTR_EVEXB)
  848. o << "_B";
  849. }
  850. }
  851. else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
  852. o << "IC_64BIT_REXW_XS";
  853. else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
  854. o << "IC_64BIT_REXW_XD";
  855. else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
  856. (index & ATTR_OPSIZE))
  857. o << "IC_64BIT_REXW_OPSIZE";
  858. else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
  859. (index & ATTR_ADSIZE))
  860. o << "IC_64BIT_REXW_ADSIZE";
  861. else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
  862. o << "IC_64BIT_XD_OPSIZE";
  863. else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE))
  864. o << "IC_64BIT_XD_ADSIZE";
  865. else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE))
  866. o << "IC_64BIT_XS_OPSIZE";
  867. else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE))
  868. o << "IC_64BIT_XS_ADSIZE";
  869. else if ((index & ATTR_64BIT) && (index & ATTR_XS))
  870. o << "IC_64BIT_XS";
  871. else if ((index & ATTR_64BIT) && (index & ATTR_XD))
  872. o << "IC_64BIT_XD";
  873. else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) &&
  874. (index & ATTR_ADSIZE))
  875. o << "IC_64BIT_OPSIZE_ADSIZE";
  876. else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
  877. o << "IC_64BIT_OPSIZE";
  878. else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE))
  879. o << "IC_64BIT_ADSIZE";
  880. else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
  881. o << "IC_64BIT_REXW";
  882. else if ((index & ATTR_64BIT))
  883. o << "IC_64BIT";
  884. else if ((index & ATTR_XS) && (index & ATTR_OPSIZE))
  885. o << "IC_XS_OPSIZE";
  886. else if ((index & ATTR_XD) && (index & ATTR_OPSIZE))
  887. o << "IC_XD_OPSIZE";
  888. else if ((index & ATTR_XS) && (index & ATTR_ADSIZE))
  889. o << "IC_XS_ADSIZE";
  890. else if ((index & ATTR_XD) && (index & ATTR_ADSIZE))
  891. o << "IC_XD_ADSIZE";
  892. else if (index & ATTR_XS)
  893. o << "IC_XS";
  894. else if (index & ATTR_XD)
  895. o << "IC_XD";
  896. else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
  897. o << "IC_OPSIZE_ADSIZE";
  898. else if (index & ATTR_OPSIZE)
  899. o << "IC_OPSIZE";
  900. else if (index & ATTR_ADSIZE)
  901. o << "IC_ADSIZE";
  902. else
  903. o << "IC";
  904. o << ", // " << index << "\n";
  905. }
  906. i--;
  907. o.indent(i * 2) << "};" << "\n";
  908. }
  909. void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
  910. unsigned &i1, unsigned &i2,
  911. unsigned &ModRMTableNum) const {
  912. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR);
  913. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR);
  914. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR);
  915. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR);
  916. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR);
  917. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR);
  918. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR);
  919. emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], THREEDNOW_MAP_STR);
  920. }
  921. void DisassemblerTables::emit(raw_ostream &o) const {
  922. unsigned i1 = 0;
  923. unsigned i2 = 0;
  924. std::string s1;
  925. std::string s2;
  926. raw_string_ostream o1(s1);
  927. raw_string_ostream o2(s2);
  928. emitInstructionInfo(o, i2);
  929. o << "\n";
  930. emitContextTable(o, i2);
  931. o << "\n";
  932. unsigned ModRMTableNum = 0;
  933. o << "static const InstrUID modRMTable[] = {\n";
  934. i1++;
  935. std::vector<unsigned> EmptyTable(1, 0);
  936. ModRMTable[EmptyTable] = ModRMTableNum;
  937. ModRMTableNum += EmptyTable.size();
  938. o1 << "/*EmptyTable*/\n";
  939. o1.indent(i1 * 2) << "0x0,\n";
  940. i1--;
  941. emitContextDecisions(o1, o2, i1, i2, ModRMTableNum);
  942. o << o1.str();
  943. o << " 0x0\n";
  944. o << "};\n";
  945. o << "\n";
  946. o << o2.str();
  947. o << "\n";
  948. o << "\n";
  949. }
  950. void DisassemblerTables::setTableFields(ModRMDecision &decision,
  951. const ModRMFilter &filter,
  952. InstrUID uid,
  953. uint8_t opcode) {
  954. for (unsigned index = 0; index < 256; ++index) {
  955. if (filter.accepts(index)) {
  956. if (decision.instructionIDs[index] == uid)
  957. continue;
  958. if (decision.instructionIDs[index] != 0) {
  959. InstructionSpecifier &newInfo =
  960. InstructionSpecifiers[uid];
  961. InstructionSpecifier &previousInfo =
  962. InstructionSpecifiers[decision.instructionIDs[index]];
  963. if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
  964. newInfo.name == "XCHG32ar" ||
  965. newInfo.name == "XCHG64ar"))
  966. continue; // special case for XCHG*ar and NOOP
  967. if (outranks(previousInfo.insnContext, newInfo.insnContext))
  968. continue;
  969. if (previousInfo.insnContext == newInfo.insnContext) {
  970. errs() << "Error: Primary decode conflict: ";
  971. errs() << newInfo.name << " would overwrite " << previousInfo.name;
  972. errs() << "\n";
  973. errs() << "ModRM " << index << "\n";
  974. errs() << "Opcode " << (uint16_t)opcode << "\n";
  975. errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
  976. HasConflicts = true;
  977. }
  978. }
  979. decision.instructionIDs[index] = uid;
  980. }
  981. }
  982. }
  983. void DisassemblerTables::setTableFields(OpcodeType type,
  984. InstructionContext insnContext,
  985. uint8_t opcode,
  986. const ModRMFilter &filter,
  987. InstrUID uid,
  988. bool is32bit,
  989. bool noPrefix,
  990. bool ignoresVEX_L,
  991. bool ignoresVEX_W,
  992. unsigned addressSize) {
  993. ContextDecision &decision = *Tables[type];
  994. for (unsigned index = 0; index < IC_max; ++index) {
  995. if ((is32bit || addressSize == 16) &&
  996. inheritsFrom((InstructionContext)index, IC_64BIT))
  997. continue;
  998. bool adSize64 = addressSize == 64;
  999. if (inheritsFrom((InstructionContext)index,
  1000. InstructionSpecifiers[uid].insnContext, noPrefix,
  1001. ignoresVEX_L, ignoresVEX_W, adSize64))
  1002. setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
  1003. filter,
  1004. uid,
  1005. opcode);
  1006. }
  1007. }