//===- Mem2Reg.cpp - The -mem2reg pass, a wrapper around the Utils lib ----===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This pass is a simple pass wrapper around the PromoteMemToReg function call // exposed by the Utils library. // //===----------------------------------------------------------------------===// #include "llvm/Transforms/Utils/Mem2Reg.h" #include "llvm/ADT/Statistic.h" #include "llvm/Analysis/AssumptionCache.h" #include "llvm/IR/BasicBlock.h" #include "llvm/IR/Dominators.h" #include "llvm/IR/Function.h" #include "llvm/IR/Instructions.h" #include "llvm/IR/PassManager.h" #include "llvm/InitializePasses.h" #include "llvm/Pass.h" #include "llvm/Support/Casting.h" #include "llvm/Transforms/Utils.h" #include "llvm/Transforms/Utils/PromoteMemToReg.h" #include using namespace llvm; #define DEBUG_TYPE "mem2reg" STATISTIC(NumPromoted, "Number of alloca's promoted"); static bool promoteMemoryToRegister(Function &F, DominatorTree &DT, AssumptionCache &AC) { std::vector Allocas; BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function bool Changed = false; while (true) { Allocas.clear(); // Find allocas that are safe to promote, by looking at all instructions in // the entry node for (BasicBlock::iterator I = BB.begin(), E = --BB.end(); I != E; ++I) if (AllocaInst *AI = dyn_cast(I)) // Is it an alloca? if (isAllocaPromotable(AI)) Allocas.push_back(AI); if (Allocas.empty()) break; PromoteMemToReg(Allocas, DT, &AC); NumPromoted += Allocas.size(); Changed = true; } return Changed; } PreservedAnalyses PromotePass::run(Function &F, FunctionAnalysisManager &AM) { auto &DT = AM.getResult(F); auto &AC = AM.getResult(F); if (!promoteMemoryToRegister(F, DT, AC)) return PreservedAnalyses::all(); PreservedAnalyses PA; PA.preserveSet(); return PA; } namespace { struct PromoteLegacyPass : public FunctionPass { // Pass identification, replacement for typeid static char ID; PromoteLegacyPass() : FunctionPass(ID) { initializePromoteLegacyPassPass(*PassRegistry::getPassRegistry()); } // runOnFunction - To run this pass, first we calculate the alloca // instructions that are safe for promotion, then we promote each one. bool runOnFunction(Function &F) override { if (skipFunction(F)) return false; DominatorTree &DT = getAnalysis().getDomTree(); AssumptionCache &AC = getAnalysis().getAssumptionCache(F); return promoteMemoryToRegister(F, DT, AC); } void getAnalysisUsage(AnalysisUsage &AU) const override { AU.addRequired(); AU.addRequired(); AU.setPreservesCFG(); } }; } // end anonymous namespace char PromoteLegacyPass::ID = 0; INITIALIZE_PASS_BEGIN(PromoteLegacyPass, "mem2reg", "Promote Memory to " "Register", false, false) INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker) INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass) INITIALIZE_PASS_END(PromoteLegacyPass, "mem2reg", "Promote Memory to Register", false, false) // createPromoteMemoryToRegister - Provide an entry point to create this pass. FunctionPass *llvm::createPromoteMemoryToRegisterPass() { return new PromoteLegacyPass(); }