Port VQE to Xtensa Hifi4 DSPs (part I)

76fe082cd069e31ecdd31397ef217cbdd9a3b61b

build/ymake_conf.py

@@ -119,7 +119,9 @@ class Platform(object):
         self.is_nds32 = self.arch in ('nds32le_elf_mculib_v5f',)
         self.is_tc32 = self.arch in ('tc32_elf',)
 
-        self.is_xtensa = self.arch in ('xtensa_hifi4', 'xtensa_hifi5',)
+        self.is_xtensa_hifi4 = self.arch == 'xtensa_hifi4'
+        self.is_xtensa_hifi5 = self.arch == 'xtensa_hifi5'
+        self.is_xtensa = self.is_xtensa_hifi4 or self.is_xtensa_hifi5
 
         self.armv7_float_abi = None
         if self.is_armv7:
@@ -224,6 +226,8 @@ class Platform(object):
             (self.is_power8le, 'ARCH_POWER8LE'),
             (self.is_power9le, 'ARCH_POWER9LE'),
             (self.is_riscv32, 'ARCH_RISCV32'),
+            (self.is_xtensa_hifi4, 'ARCH_XTENSA_HIFI4'),
+            (self.is_xtensa_hifi5, 'ARCH_XTENSA_HIFI5'),
             (self.is_xtensa, 'ARCH_XTENSA'),
             (self.is_nds32, 'ARCH_NDS32'),
             (self.is_tc32, 'ARCH_TC32'),