variant_MARLIN_STM32G0B1VE.cpp 5.2 KB

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  1. /*
  2. *******************************************************************************
  3. * Copyright (c) 2020-2021, STMicroelectronics
  4. * All rights reserved.
  5. *
  6. * This software component is licensed by ST under BSD 3-Clause license,
  7. * the "License"; You may not use this file except in compliance with the
  8. * License. You may obtain a copy of the License at:
  9. * opensource.org/licenses/BSD-3-Clause
  10. *
  11. *******************************************************************************
  12. */
  13. #if defined(STM32G0B1xx)
  14. #include "pins_arduino.h"
  15. // Digital PinName array
  16. const PinName digitalPin[] = {
  17. PA_0, // D0/A0
  18. PA_1, // D1/A1
  19. PA_2, // D2/A2
  20. PA_3, // D3/A3
  21. PA_4, // D4/A4
  22. PA_5, // D5/A5
  23. PA_6, // D6/A6
  24. PA_7, // D7/A7
  25. PA_8, // D8
  26. PA_9, // D9
  27. PA_10, // D10
  28. PA_11, // D11
  29. PA_12, // D12
  30. PA_13, // D13
  31. PA_14, // D14
  32. PA_15, // D15
  33. PB_0, // D16/A8
  34. PB_1, // D17/A9
  35. PB_2, // D18/A10
  36. PB_3, // D19
  37. PB_4, // D20
  38. PB_5, // D21
  39. PB_6, // D22
  40. PB_7, // D23
  41. PB_8, // D24
  42. PB_9, // D25
  43. PB_10, // D26/A11
  44. PB_11, // D27/A12
  45. PB_12, // D28/A13
  46. PB_13, // D29
  47. PB_14, // D30
  48. PB_15, // D31
  49. PC_0, // D32
  50. PC_1, // D33
  51. PC_2, // D34
  52. PC_3, // D35
  53. PC_4, // D36/A14
  54. PC_5, // D37/A15
  55. PC_6, // D38
  56. PC_7, // D39
  57. PC_8, // D40
  58. PC_9, // D41
  59. PC_10, // D42
  60. PC_11, // D43
  61. PC_12, // D44
  62. PC_13, // D45
  63. PC_14, // D46
  64. PC_15, // D47
  65. PD_0, // D48
  66. PD_1, // D49
  67. PD_2, // D50
  68. PD_3, // D51
  69. PD_4, // D52
  70. PD_5, // D53
  71. PD_6, // D54
  72. PD_7, // D55
  73. PD_8, // D56
  74. PD_9, // D57
  75. PD_10, // D58
  76. PD_11, // D59
  77. PD_12, // D60
  78. PD_13, // D61
  79. PD_14, // D62
  80. PD_15, // D63
  81. PE_0, // D64
  82. PE_1, // D65
  83. PE_2, // D66
  84. PE_3, // D67
  85. PE_4, // D68
  86. PE_5, // D69
  87. PE_6, // D70
  88. PE_7, // D71
  89. PE_8, // D72
  90. PE_9, // D73
  91. PE_10, // D74
  92. PE_11, // D75
  93. PE_12, // D76
  94. PE_13, // D77
  95. PE_14, // D78
  96. PE_15, // D79
  97. PF_0, // D80
  98. PF_1, // D81
  99. PF_2, // D82
  100. PF_3, // D83
  101. PF_4, // D84
  102. PF_5, // D85
  103. PF_6, // D86
  104. PF_7, // D87
  105. PF_8, // D88
  106. PF_9, // D89
  107. PF_10, // D90
  108. PF_11, // D91
  109. PF_12, // D92
  110. PF_13, // D93
  111. PA_9_R, // D94
  112. PA_10_R // D95
  113. };
  114. // Analog (Ax) pin number array
  115. const uint32_t analogInputPin[] = {
  116. 0, // A0, PA0
  117. 1, // A1, PA1
  118. 2, // A2, PA2
  119. 3, // A3, PA3
  120. 4, // A4, PA4
  121. 5, // A5, PA5
  122. 6, // A6, PA6
  123. 7, // A7, PA7
  124. 16, // A8, PB0
  125. 17, // A9, PB1
  126. 18, // A10, PB2
  127. 26, // A11, PB10
  128. 27, // A12, PB11
  129. 28, // A13, PB12
  130. 36, // A14, PC4
  131. 37 // A15, PC5
  132. };
  133. // ----------------------------------------------------------------------------
  134. #ifdef __cplusplus
  135. extern "C" {
  136. #endif
  137. /**
  138. * @brief System Clock Configuration
  139. * The system Clock is configured as follows :
  140. * System Clock source = PLL (HSE)
  141. * SYSCLK(Hz) = 64000000
  142. * HCLK(Hz) = 64000000
  143. * AHB Prescaler = 1
  144. * APB1 Prescaler = 1
  145. * PLL_M = 1
  146. * PLL_N = 24
  147. * PLL_R = 3
  148. * PLL_P = 2
  149. * PLL_Q = 4
  150. * USB(Hz) = 48000000 (PLLQ)
  151. * @param None
  152. * @retval None
  153. */
  154. WEAK void SystemClock_Config(void)
  155. {
  156. RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  157. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  158. RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
  159. // Reset clock registers (in case bootloader has changed them)
  160. SystemInit();
  161. /** Configure the main internal regulator output voltage
  162. */
  163. HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
  164. /** Initializes the RCC Oscillators according to the specified parameters
  165. * in the RCC_OscInitTypeDef structure.
  166. */
  167. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  168. RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  169. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  170. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  171. RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
  172. RCC_OscInitStruct.PLL.PLLN = 24;
  173. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  174. RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
  175. RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3;
  176. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  177. {
  178. Error_Handler();
  179. }
  180. /** Initializes the CPU, AHB and APB buses clocks
  181. */
  182. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  183. |RCC_CLOCKTYPE_PCLK1;
  184. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  185. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  186. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  187. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
  188. {
  189. Error_Handler();
  190. }
  191. /** Initializes the peripherals clocks
  192. */
  193. PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
  194. PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
  195. if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
  196. {
  197. Error_Handler();
  198. }
  199. }
  200. #ifdef __cplusplus
  201. }
  202. #endif
  203. #endif /* STM32G0B1xx */