variant_MARLIN_STM32G0B1RE.cpp 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179
  1. /*
  2. *******************************************************************************
  3. * Copyright (c) 2020-2021, STMicroelectronics
  4. * All rights reserved.
  5. *
  6. * This software component is licensed by ST under BSD 3-Clause license,
  7. * the "License"; You may not use this file except in compliance with the
  8. * License. You may obtain a copy of the License at:
  9. * opensource.org/licenses/BSD-3-Clause
  10. *
  11. *******************************************************************************
  12. */
  13. #ifdef STM32G0B1xx
  14. #include "pins_arduino.h"
  15. // Digital PinName array
  16. const PinName digitalPin[] = {
  17. PA_0, // D0/A0
  18. PA_1, // D1/A1
  19. PA_2, // D2/A2
  20. PA_3, // D3/A3
  21. PA_4, // D4/A4
  22. PA_5, // D5/A5
  23. PA_6, // D6/A6
  24. PA_7, // D7/A7
  25. PA_8, // D8
  26. PA_9, // D9
  27. PA_10, // D10
  28. PA_11, // D11
  29. PA_12, // D12
  30. PA_13, // D13
  31. PA_14, // D14
  32. PA_15, // D15
  33. PB_0, // D16/A8
  34. PB_1, // D17/A9
  35. PB_2, // D18/A10
  36. PB_3, // D19
  37. PB_4, // D20
  38. PB_5, // D21
  39. PB_6, // D22
  40. PB_7, // D23
  41. PB_8, // D24
  42. PB_9, // D25
  43. PB_10, // D26/A11
  44. PB_11, // D27/A12
  45. PB_12, // D28/A13
  46. PB_13, // D29
  47. PB_14, // D30
  48. PB_15, // D31
  49. PC_0, // D32
  50. PC_1, // D33
  51. PC_2, // D34
  52. PC_3, // D35
  53. PC_4, // D36/A14
  54. PC_5, // D37/A15
  55. PC_6, // D38
  56. PC_7, // D39
  57. PC_8, // D40
  58. PC_9, // D41
  59. PC_10, // D42
  60. PC_11, // D43
  61. PC_12, // D44
  62. PC_13, // D45
  63. PC_14, // D46
  64. PC_15, // D47
  65. PD_0, // D48
  66. PD_1, // D49
  67. PD_2, // D50
  68. PD_3, // D51
  69. PD_4, // D52
  70. PD_5, // D53
  71. PD_6, // D54
  72. PD_8, // D55
  73. PD_9, // D56
  74. PF_0, // D57
  75. PF_1, // D58
  76. PF_2, // D59
  77. PA_9_R, // D60
  78. PA_10_R // D61
  79. };
  80. // Analog (Ax) pin number array
  81. const uint32_t analogInputPin[] = {
  82. 0, // A0, PA0
  83. 1, // A1, PA1
  84. 2, // A2, PA2
  85. 3, // A3, PA3
  86. 4, // A4, PA4
  87. 5, // A5, PA5
  88. 6, // A6, PA6
  89. 7, // A7, PA7
  90. 16, // A8, PB0
  91. 17, // A9, PB1
  92. 18, // A10, PB2
  93. 26, // A11, PB10
  94. 27, // A12, PB11
  95. 28, // A13, PB12
  96. 36, // A14, PC4
  97. 37 // A15, PC5
  98. };
  99. // ----------------------------------------------------------------------------
  100. #ifdef __cplusplus
  101. extern "C" {
  102. #endif
  103. /**
  104. * @brief System Clock Configuration
  105. * The system Clock is configured as follows :
  106. * System Clock source = PLL (HSE)
  107. * SYSCLK(Hz) = 64000000
  108. * HCLK(Hz) = 64000000
  109. * AHB Prescaler = 1
  110. * APB1 Prescaler = 1
  111. * PLL_M = 1
  112. * PLL_N = 24
  113. * PLL_R = 3
  114. * PLL_P = 2
  115. * PLL_Q = 4
  116. * USB(Hz) = 48000000 (PLLQ)
  117. * @param None
  118. * @retval None
  119. */
  120. WEAK void SystemClock_Config(void)
  121. {
  122. RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  123. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  124. RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
  125. // Reset clock registers (in case bootloader has changed them)
  126. SystemInit();
  127. /** Configure the main internal regulator output voltage
  128. */
  129. HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
  130. /** Initializes the RCC Oscillators according to the specified parameters
  131. * in the RCC_OscInitTypeDef structure.
  132. */
  133. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  134. RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  135. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  136. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  137. RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
  138. RCC_OscInitStruct.PLL.PLLN = 24;
  139. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  140. RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
  141. RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV3;
  142. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  143. {
  144. Error_Handler();
  145. }
  146. /** Initializes the CPU, AHB and APB buses clocks
  147. */
  148. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  149. |RCC_CLOCKTYPE_PCLK1;
  150. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  151. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  152. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  153. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
  154. {
  155. Error_Handler();
  156. }
  157. /** Initializes the peripherals clocks
  158. */
  159. PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
  160. PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
  161. if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
  162. {
  163. Error_Handler();
  164. }
  165. }
  166. #ifdef __cplusplus
  167. }
  168. #endif
  169. #endif /* STM32G0B1xx */