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  1. /**
  2. *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
  3. * @file startup_stm32f101xe.s
  4. * @author MCD Application Team
  5. * @brief STM32F101xE Value Line Devices vector table for Atollic toolchain.
  6. * This module performs:
  7. * - Set the initial SP
  8. * - Set the initial PC == Reset_Handler,
  9. * - Set the vector table entries with the exceptions ISR address
  10. * - Configure the clock system
  11. * - Branches to main in the C library (which eventually
  12. * calls main()).
  13. * After Reset the Cortex-M3 processor is in Thread mode,
  14. * priority is Privileged, and the Stack is set to Main.
  15. ******************************************************************************
  16. * @attention
  17. *
  18. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  19. * All rights reserved.</center></h2>
  20. *
  21. * This software component is licensed by ST under BSD 3-Clause license,
  22. * the "License"; You may not use this file except in compliance with the
  23. * License. You may obtain a copy of the License at:
  24. * opensource.org/licenses/BSD-3-Clause
  25. *
  26. ******************************************************************************
  27. */
  28. .syntax unified
  29. .cpu cortex-m3
  30. .fpu softvfp
  31. .thumb
  32. .global g_pfnVectors
  33. .global Default_Handler
  34. /* start address for the initialization values of the .data section.
  35. defined in linker script */
  36. .word _sidata
  37. /* start address for the .data section. defined in linker script */
  38. .word _sdata
  39. /* end address for the .data section. defined in linker script */
  40. .word _edata
  41. /* start address for the .bss section. defined in linker script */
  42. .word _sbss
  43. /* end address for the .bss section. defined in linker script */
  44. .word _ebss
  45. .equ BootRAM, 0xF1E0F85F
  46. /**
  47. * @brief This is the code that gets called when the processor first
  48. * starts execution following a reset event. Only the absolutely
  49. * necessary set is performed, after which the application
  50. * supplied main() routine is called.
  51. * @param None
  52. * @retval : None
  53. */
  54. .section .text.Reset_Handler
  55. .weak Reset_Handler
  56. .type Reset_Handler, %function
  57. Reset_Handler:
  58. /* Disable SysTick interrupt (was enabled by jg aurora bootloader) */
  59. ldr r2,SysTick
  60. movs r1, #0
  61. str r1, [r2]
  62. /* Copy the data segment initializers from flash to SRAM */
  63. b LoopCopyDataInit
  64. SysTick:
  65. .word 0xE000E010
  66. CopyDataInit:
  67. ldr r3, =_sidata
  68. ldr r3, [r3, r1]
  69. str r3, [r0, r1]
  70. adds r1, r1, #4
  71. LoopCopyDataInit:
  72. ldr r0, =_sdata
  73. ldr r3, =_edata
  74. adds r2, r0, r1
  75. cmp r2, r3
  76. bcc CopyDataInit
  77. ldr r2, =_sbss
  78. b LoopFillZerobss
  79. /* Zero fill the bss segment. */
  80. FillZerobss:
  81. movs r3, #0
  82. str r3, [r2], #4
  83. LoopFillZerobss:
  84. ldr r3, = _ebss
  85. cmp r2, r3
  86. bcc FillZerobss
  87. /* Call the clock system intitialization function.*/
  88. bl SystemInit
  89. /* Call static constructors */
  90. bl __libc_init_array
  91. /* Call the application's entry point.*/
  92. bl main
  93. bx lr
  94. .size Reset_Handler, .-Reset_Handler