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@@ -40,407 +40,370 @@
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#if !defined(USBCON) && (defined(UBRRH) || defined(UBRR0H) || defined(UBRR1H) || defined(UBRR2H) || defined(UBRR3H))
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- #include "MarlinSerial.h"
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- #include "../../MarlinCore.h"
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+#include "MarlinSerial.h"
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+#include "../../MarlinCore.h"
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+
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+#if ENABLED(DIRECT_STEPPING)
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+ #include "../../feature/direct_stepping.h"
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+#endif
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+
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+template<typename Cfg> typename MarlinSerial<Cfg>::ring_buffer_r MarlinSerial<Cfg>::rx_buffer = { 0, 0, { 0 } };
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+template<typename Cfg> typename MarlinSerial<Cfg>::ring_buffer_t MarlinSerial<Cfg>::tx_buffer = { 0 };
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+template<typename Cfg> bool MarlinSerial<Cfg>::_written = false;
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+template<typename Cfg> uint8_t MarlinSerial<Cfg>::xon_xoff_state = MarlinSerial<Cfg>::XON_XOFF_CHAR_SENT | MarlinSerial<Cfg>::XON_CHAR;
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+template<typename Cfg> uint8_t MarlinSerial<Cfg>::rx_dropped_bytes = 0;
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+template<typename Cfg> uint8_t MarlinSerial<Cfg>::rx_buffer_overruns = 0;
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+template<typename Cfg> uint8_t MarlinSerial<Cfg>::rx_framing_errors = 0;
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+template<typename Cfg> typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::rx_max_enqueued = 0;
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+
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+// A SW memory barrier, to ensure GCC does not overoptimize loops
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+#define sw_barrier() asm volatile("": : :"memory");
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+
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+#include "../../feature/e_parser.h"
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+
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+// "Atomically" read the RX head index value without disabling interrupts:
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+// This MUST be called with RX interrupts enabled, and CAN'T be called
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+// from the RX ISR itself!
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+template<typename Cfg>
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+FORCE_INLINE typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::atomic_read_rx_head() {
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+ if (Cfg::RX_SIZE > 256) {
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+ // Keep reading until 2 consecutive reads return the same value,
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+ // meaning there was no update in-between caused by an interrupt.
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+ // This works because serial RX interrupts happen at a slower rate
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+ // than successive reads of a variable, so 2 consecutive reads with
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+ // the same value means no interrupt updated it.
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+ ring_buffer_pos_t vold, vnew = rx_buffer.head;
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+ sw_barrier();
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+ do {
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+ vold = vnew;
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+ vnew = rx_buffer.head;
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+ sw_barrier();
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+ } while (vold != vnew);
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+ return vnew;
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+ }
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+ else {
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+ // With an 8bit index, reads are always atomic. No need for special handling
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+ return rx_buffer.head;
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+ }
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+}
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+
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+template<typename Cfg>
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+volatile bool MarlinSerial<Cfg>::rx_tail_value_not_stable = false;
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+template<typename Cfg>
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+volatile uint16_t MarlinSerial<Cfg>::rx_tail_value_backup = 0;
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+
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+// Set RX tail index, taking into account the RX ISR could interrupt
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+// the write to this variable in the middle - So a backup strategy
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+// is used to ensure reads of the correct values.
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+// -Must NOT be called from the RX ISR -
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+template<typename Cfg>
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+FORCE_INLINE void MarlinSerial<Cfg>::atomic_set_rx_tail(typename MarlinSerial<Cfg>::ring_buffer_pos_t value) {
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+ if (Cfg::RX_SIZE > 256) {
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+ // Store the new value in the backup
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+ rx_tail_value_backup = value;
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+ sw_barrier();
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+ // Flag we are about to change the true value
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+ rx_tail_value_not_stable = true;
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+ sw_barrier();
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+ // Store the new value
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+ rx_buffer.tail = value;
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+ sw_barrier();
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+ // Signal the new value is completely stored into the value
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+ rx_tail_value_not_stable = false;
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+ sw_barrier();
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+ }
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+ else
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+ rx_buffer.tail = value;
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+}
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+
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+// Get the RX tail index, taking into account the read could be
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+// interrupting in the middle of the update of that index value
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+// -Called from the RX ISR -
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+template<typename Cfg>
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+FORCE_INLINE typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::atomic_read_rx_tail() {
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+ if (Cfg::RX_SIZE > 256) {
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+ // If the true index is being modified, return the backup value
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+ if (rx_tail_value_not_stable) return rx_tail_value_backup;
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+ }
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+ // The true index is stable, return it
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+ return rx_buffer.tail;
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+}
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+
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+// (called with RX interrupts disabled)
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+template<typename Cfg>
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+FORCE_INLINE void MarlinSerial<Cfg>::store_rxd_char() {
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+
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+ static EmergencyParser::State emergency_state; // = EP_RESET
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+
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+ // This must read the R_UCSRA register before reading the received byte to detect error causes
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+ if (Cfg::DROPPED_RX && B_DOR && !++rx_dropped_bytes) --rx_dropped_bytes;
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+ if (Cfg::RX_OVERRUNS && B_DOR && !++rx_buffer_overruns) --rx_buffer_overruns;
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+ if (Cfg::RX_FRAMING_ERRORS && B_FE && !++rx_framing_errors) --rx_framing_errors;
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+
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+ // Read the character from the USART
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+ uint8_t c = R_UDR;
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#if ENABLED(DIRECT_STEPPING)
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- #include "../../feature/direct_stepping.h"
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+ if (page_manager.maybe_store_rxd_char(c)) return;
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#endif
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- template<typename Cfg> typename MarlinSerial<Cfg>::ring_buffer_r MarlinSerial<Cfg>::rx_buffer = { 0, 0, { 0 } };
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- template<typename Cfg> typename MarlinSerial<Cfg>::ring_buffer_t MarlinSerial<Cfg>::tx_buffer = { 0 };
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- template<typename Cfg> bool MarlinSerial<Cfg>::_written = false;
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- template<typename Cfg> uint8_t MarlinSerial<Cfg>::xon_xoff_state = MarlinSerial<Cfg>::XON_XOFF_CHAR_SENT | MarlinSerial<Cfg>::XON_CHAR;
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- template<typename Cfg> uint8_t MarlinSerial<Cfg>::rx_dropped_bytes = 0;
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- template<typename Cfg> uint8_t MarlinSerial<Cfg>::rx_buffer_overruns = 0;
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- template<typename Cfg> uint8_t MarlinSerial<Cfg>::rx_framing_errors = 0;
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- template<typename Cfg> typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::rx_max_enqueued = 0;
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-
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- // A SW memory barrier, to ensure GCC does not overoptimize loops
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- #define sw_barrier() asm volatile("": : :"memory");
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-
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- #include "../../feature/e_parser.h"
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-
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- // "Atomically" read the RX head index value without disabling interrupts:
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- // This MUST be called with RX interrupts enabled, and CAN'T be called
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- // from the RX ISR itself!
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- template<typename Cfg>
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- FORCE_INLINE typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::atomic_read_rx_head() {
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- if (Cfg::RX_SIZE > 256) {
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- // Keep reading until 2 consecutive reads return the same value,
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- // meaning there was no update in-between caused by an interrupt.
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- // This works because serial RX interrupts happen at a slower rate
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- // than successive reads of a variable, so 2 consecutive reads with
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- // the same value means no interrupt updated it.
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- ring_buffer_pos_t vold, vnew = rx_buffer.head;
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- sw_barrier();
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- do {
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- vold = vnew;
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- vnew = rx_buffer.head;
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- sw_barrier();
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- } while (vold != vnew);
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- return vnew;
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- }
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- else {
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- // With an 8bit index, reads are always atomic. No need for special handling
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- return rx_buffer.head;
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- }
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- }
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+ // Get the tail - Nothing can alter its value while this ISR is executing, but there's
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+ // a chance that this ISR interrupted the main process while it was updating the index.
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+ // The backup mechanism ensures the correct value is always returned.
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+ const ring_buffer_pos_t t = atomic_read_rx_tail();
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- template<typename Cfg>
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- volatile bool MarlinSerial<Cfg>::rx_tail_value_not_stable = false;
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- template<typename Cfg>
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- volatile uint16_t MarlinSerial<Cfg>::rx_tail_value_backup = 0;
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-
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- // Set RX tail index, taking into account the RX ISR could interrupt
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- // the write to this variable in the middle - So a backup strategy
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- // is used to ensure reads of the correct values.
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- // -Must NOT be called from the RX ISR -
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- template<typename Cfg>
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- FORCE_INLINE void MarlinSerial<Cfg>::atomic_set_rx_tail(typename MarlinSerial<Cfg>::ring_buffer_pos_t value) {
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- if (Cfg::RX_SIZE > 256) {
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- // Store the new value in the backup
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- rx_tail_value_backup = value;
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- sw_barrier();
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- // Flag we are about to change the true value
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- rx_tail_value_not_stable = true;
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- sw_barrier();
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- // Store the new value
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- rx_buffer.tail = value;
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- sw_barrier();
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- // Signal the new value is completely stored into the value
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- rx_tail_value_not_stable = false;
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- sw_barrier();
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- }
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- else
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- rx_buffer.tail = value;
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- }
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+ // Get the head pointer - This ISR is the only one that modifies its value, so it's safe to read here
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+ ring_buffer_pos_t h = rx_buffer.head;
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- // Get the RX tail index, taking into account the read could be
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- // interrupting in the middle of the update of that index value
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- // -Called from the RX ISR -
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- template<typename Cfg>
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- FORCE_INLINE typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::atomic_read_rx_tail() {
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- if (Cfg::RX_SIZE > 256) {
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- // If the true index is being modified, return the backup value
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- if (rx_tail_value_not_stable) return rx_tail_value_backup;
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- }
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- // The true index is stable, return it
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- return rx_buffer.tail;
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- }
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+ // Get the next element
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+ ring_buffer_pos_t i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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- // (called with RX interrupts disabled)
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- template<typename Cfg>
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- FORCE_INLINE void MarlinSerial<Cfg>::store_rxd_char() {
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+ if (Cfg::EMERGENCYPARSER) emergency_parser.update(emergency_state, c);
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+
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+ // If the character is to be stored at the index just before the tail
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+ // (such that the head would advance to the current tail), the RX FIFO is
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+ // full, so don't write the character or advance the head.
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+ if (i != t) {
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+ rx_buffer.buffer[h] = c;
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+ h = i;
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+ }
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+ else if (Cfg::DROPPED_RX && !++rx_dropped_bytes)
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+ --rx_dropped_bytes;
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- static EmergencyParser::State emergency_state; // = EP_RESET
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+ if (Cfg::MAX_RX_QUEUED) {
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+ // Calculate count of bytes stored into the RX buffer
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+ const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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- // This must read the R_UCSRA register before reading the received byte to detect error causes
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- if (Cfg::DROPPED_RX && B_DOR && !++rx_dropped_bytes) --rx_dropped_bytes;
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- if (Cfg::RX_OVERRUNS && B_DOR && !++rx_buffer_overruns) --rx_buffer_overruns;
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- if (Cfg::RX_FRAMING_ERRORS && B_FE && !++rx_framing_errors) --rx_framing_errors;
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+ // Keep track of the maximum count of enqueued bytes
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+ NOLESS(rx_max_enqueued, rx_count);
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+ }
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- // Read the character from the USART
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- uint8_t c = R_UDR;
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+ if (Cfg::XONOFF) {
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+ // If the last char that was sent was an XON
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+ if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XON_CHAR) {
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- #if ENABLED(DIRECT_STEPPING)
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- if (page_manager.maybe_store_rxd_char(c)) return;
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- #endif
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+ // Bytes stored into the RX buffer
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+ const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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- // Get the tail - Nothing can alter its value while this ISR is executing, but there's
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- // a chance that this ISR interrupted the main process while it was updating the index.
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- // The backup mechanism ensures the correct value is always returned.
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- const ring_buffer_pos_t t = atomic_read_rx_tail();
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+ // If over 12.5% of RX buffer capacity, send XOFF before running out of
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+ // RX buffer space .. 325 bytes @ 250kbits/s needed to let the host react
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+ // and stop sending bytes. This translates to 13mS propagation time.
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+ if (rx_count >= (Cfg::RX_SIZE) / 8) {
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- // Get the head pointer - This ISR is the only one that modifies its value, so it's safe to read here
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- ring_buffer_pos_t h = rx_buffer.head;
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+ // At this point, definitely no TX interrupt was executing, since the TX ISR can't be preempted.
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+ // Don't enable the TX interrupt here as a means to trigger the XOFF char, because if it happens
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+ // to be in the middle of trying to disable the RX interrupt in the main program, eventually the
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+ // enabling of the TX interrupt could be undone. The ONLY reliable thing this can do to ensure
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+ // the sending of the XOFF char is to send it HERE AND NOW.
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- // Get the next element
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- ring_buffer_pos_t i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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+ // About to send the XOFF char
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+ xon_xoff_state = XOFF_CHAR | XON_XOFF_CHAR_SENT;
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- if (Cfg::EMERGENCYPARSER) emergency_parser.update(emergency_state, c);
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+ // Wait until the TX register becomes empty and send it - Here there could be a problem
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+ // - While waiting for the TX register to empty, the RX register could receive a new
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+ // character. This must also handle that situation!
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+ while (!B_UDRE) {
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- // If the character is to be stored at the index just before the tail
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- // (such that the head would advance to the current tail), the RX FIFO is
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- // full, so don't write the character or advance the head.
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- if (i != t) {
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- rx_buffer.buffer[h] = c;
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- h = i;
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- }
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- else if (Cfg::DROPPED_RX && !++rx_dropped_bytes)
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- --rx_dropped_bytes;
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+ if (B_RXC) {
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+ // A char arrived while waiting for the TX buffer to be empty - Receive and process it!
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- if (Cfg::MAX_RX_QUEUED) {
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- // Calculate count of bytes stored into the RX buffer
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- const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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+ i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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- // Keep track of the maximum count of enqueued bytes
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- NOLESS(rx_max_enqueued, rx_count);
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- }
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+ // Read the character from the USART
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+ c = R_UDR;
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- if (Cfg::XONOFF) {
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- // If the last char that was sent was an XON
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- if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XON_CHAR) {
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-
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- // Bytes stored into the RX buffer
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- const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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-
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- // If over 12.5% of RX buffer capacity, send XOFF before running out of
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- // RX buffer space .. 325 bytes @ 250kbits/s needed to let the host react
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- // and stop sending bytes. This translates to 13mS propagation time.
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- if (rx_count >= (Cfg::RX_SIZE) / 8) {
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-
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- // At this point, definitely no TX interrupt was executing, since the TX ISR can't be preempted.
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- // Don't enable the TX interrupt here as a means to trigger the XOFF char, because if it happens
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- // to be in the middle of trying to disable the RX interrupt in the main program, eventually the
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- // enabling of the TX interrupt could be undone. The ONLY reliable thing this can do to ensure
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- // the sending of the XOFF char is to send it HERE AND NOW.
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-
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- // About to send the XOFF char
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- xon_xoff_state = XOFF_CHAR | XON_XOFF_CHAR_SENT;
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-
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- // Wait until the TX register becomes empty and send it - Here there could be a problem
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- // - While waiting for the TX register to empty, the RX register could receive a new
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- // character. This must also handle that situation!
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- while (!B_UDRE) {
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-
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- if (B_RXC) {
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- // A char arrived while waiting for the TX buffer to be empty - Receive and process it!
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-
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- i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
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-
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- // Read the character from the USART
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- c = R_UDR;
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-
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- if (Cfg::EMERGENCYPARSER) emergency_parser.update(emergency_state, c);
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-
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- // If the character is to be stored at the index just before the tail
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- // (such that the head would advance to the current tail), the FIFO is
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- // full, so don't write the character or advance the head.
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- if (i != t) {
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- rx_buffer.buffer[h] = c;
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- h = i;
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- }
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|
- else if (Cfg::DROPPED_RX && !++rx_dropped_bytes)
|
|
|
- --rx_dropped_bytes;
|
|
|
- }
|
|
|
- sw_barrier();
|
|
|
- }
|
|
|
+ if (Cfg::EMERGENCYPARSER) emergency_parser.update(emergency_state, c);
|
|
|
|
|
|
- R_UDR = XOFF_CHAR;
|
|
|
-
|
|
|
- // Clear the TXC bit -- "can be cleared by writing a one to its bit
|
|
|
- // location". This makes sure flush() won't return until the bytes
|
|
|
- // actually got written
|
|
|
- B_TXC = 1;
|
|
|
-
|
|
|
- // At this point there could be a race condition between the write() function
|
|
|
- // and this sending of the XOFF char. This interrupt could happen between the
|
|
|
- // wait to be empty TX buffer loop and the actual write of the character. Since
|
|
|
- // the TX buffer is full because it's sending the XOFF char, the only way to be
|
|
|
- // sure the write() function will succeed is to wait for the XOFF char to be
|
|
|
- // completely sent. Since an extra character could be received during the wait
|
|
|
- // it must also be handled!
|
|
|
- while (!B_UDRE) {
|
|
|
-
|
|
|
- if (B_RXC) {
|
|
|
- // A char arrived while waiting for the TX buffer to be empty - Receive and process it!
|
|
|
-
|
|
|
- i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
|
|
|
-
|
|
|
- // Read the character from the USART
|
|
|
- c = R_UDR;
|
|
|
-
|
|
|
- if (Cfg::EMERGENCYPARSER)
|
|
|
- emergency_parser.update(emergency_state, c);
|
|
|
-
|
|
|
- // If the character is to be stored at the index just before the tail
|
|
|
- // (such that the head would advance to the current tail), the FIFO is
|
|
|
- // full, so don't write the character or advance the head.
|
|
|
- if (i != t) {
|
|
|
- rx_buffer.buffer[h] = c;
|
|
|
- h = i;
|
|
|
- }
|
|
|
- else if (Cfg::DROPPED_RX && !++rx_dropped_bytes)
|
|
|
- --rx_dropped_bytes;
|
|
|
+ // If the character is to be stored at the index just before the tail
|
|
|
+ // (such that the head would advance to the current tail), the FIFO is
|
|
|
+ // full, so don't write the character or advance the head.
|
|
|
+ if (i != t) {
|
|
|
+ rx_buffer.buffer[h] = c;
|
|
|
+ h = i;
|
|
|
}
|
|
|
- sw_barrier();
|
|
|
+ else if (Cfg::DROPPED_RX && !++rx_dropped_bytes)
|
|
|
+ --rx_dropped_bytes;
|
|
|
}
|
|
|
-
|
|
|
- // At this point everything is ready. The write() function won't
|
|
|
- // have any issues writing to the UART TX register if it needs to!
|
|
|
+ sw_barrier();
|
|
|
}
|
|
|
- }
|
|
|
- }
|
|
|
|
|
|
- // Store the new head value - The main loop will retry until the value is stable
|
|
|
- rx_buffer.head = h;
|
|
|
- }
|
|
|
+ R_UDR = XOFF_CHAR;
|
|
|
|
|
|
- // (called with TX irqs disabled)
|
|
|
- template<typename Cfg>
|
|
|
- FORCE_INLINE void MarlinSerial<Cfg>::_tx_udr_empty_irq() {
|
|
|
- if (Cfg::TX_SIZE > 0) {
|
|
|
- // Read positions
|
|
|
- uint8_t t = tx_buffer.tail;
|
|
|
- const uint8_t h = tx_buffer.head;
|
|
|
+ // Clear the TXC bit -- "can be cleared by writing a one to its bit
|
|
|
+ // location". This makes sure flush() won't return until the bytes
|
|
|
+ // actually got written
|
|
|
+ B_TXC = 1;
|
|
|
|
|
|
- if (Cfg::XONOFF) {
|
|
|
- // If an XON char is pending to be sent, do it now
|
|
|
- if (xon_xoff_state == XON_CHAR) {
|
|
|
+ // At this point there could be a race condition between the write() function
|
|
|
+ // and this sending of the XOFF char. This interrupt could happen between the
|
|
|
+ // wait to be empty TX buffer loop and the actual write of the character. Since
|
|
|
+ // the TX buffer is full because it's sending the XOFF char, the only way to be
|
|
|
+ // sure the write() function will succeed is to wait for the XOFF char to be
|
|
|
+ // completely sent. Since an extra character could be received during the wait
|
|
|
+ // it must also be handled!
|
|
|
+ while (!B_UDRE) {
|
|
|
|
|
|
- // Send the character
|
|
|
- R_UDR = XON_CHAR;
|
|
|
+ if (B_RXC) {
|
|
|
+ // A char arrived while waiting for the TX buffer to be empty - Receive and process it!
|
|
|
|
|
|
- // clear the TXC bit -- "can be cleared by writing a one to its bit
|
|
|
- // location". This makes sure flush() won't return until the bytes
|
|
|
- // actually got written
|
|
|
- B_TXC = 1;
|
|
|
+ i = (ring_buffer_pos_t)(h + 1) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
|
|
|
|
|
|
- // Remember we sent it.
|
|
|
- xon_xoff_state = XON_CHAR | XON_XOFF_CHAR_SENT;
|
|
|
+ // Read the character from the USART
|
|
|
+ c = R_UDR;
|
|
|
|
|
|
- // If nothing else to transmit, just disable TX interrupts.
|
|
|
- if (h == t) B_UDRIE = 0; // (Non-atomic, could be reenabled by the main program, but eventually this will succeed)
|
|
|
+ if (Cfg::EMERGENCYPARSER)
|
|
|
+ emergency_parser.update(emergency_state, c);
|
|
|
|
|
|
- return;
|
|
|
+ // If the character is to be stored at the index just before the tail
|
|
|
+ // (such that the head would advance to the current tail), the FIFO is
|
|
|
+ // full, so don't write the character or advance the head.
|
|
|
+ if (i != t) {
|
|
|
+ rx_buffer.buffer[h] = c;
|
|
|
+ h = i;
|
|
|
+ }
|
|
|
+ else if (Cfg::DROPPED_RX && !++rx_dropped_bytes)
|
|
|
+ --rx_dropped_bytes;
|
|
|
+ }
|
|
|
+ sw_barrier();
|
|
|
}
|
|
|
- }
|
|
|
|
|
|
- // If nothing to transmit, just disable TX interrupts. This could
|
|
|
- // happen as the result of the non atomicity of the disabling of RX
|
|
|
- // interrupts that could end reenabling TX interrupts as a side effect.
|
|
|
- if (h == t) {
|
|
|
- B_UDRIE = 0; // (Non-atomic, could be reenabled by the main program, but eventually this will succeed)
|
|
|
- return;
|
|
|
+ // At this point everything is ready. The write() function won't
|
|
|
+ // have any issues writing to the UART TX register if it needs to!
|
|
|
}
|
|
|
-
|
|
|
- // There is something to TX, Send the next byte
|
|
|
- const uint8_t c = tx_buffer.buffer[t];
|
|
|
- t = (t + 1) & (Cfg::TX_SIZE - 1);
|
|
|
- R_UDR = c;
|
|
|
- tx_buffer.tail = t;
|
|
|
-
|
|
|
- // Clear the TXC bit (by writing a one to its bit location).
|
|
|
- // Ensures flush() won't return until the bytes are actually written/
|
|
|
- B_TXC = 1;
|
|
|
-
|
|
|
- // Disable interrupts if there is nothing to transmit following this byte
|
|
|
- if (h == t) B_UDRIE = 0; // (Non-atomic, could be reenabled by the main program, but eventually this will succeed)
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- // Public Methods
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::begin(const long baud) {
|
|
|
- uint16_t baud_setting;
|
|
|
- bool useU2X = true;
|
|
|
-
|
|
|
- #if F_CPU == 16000000UL && SERIAL_PORT == 0
|
|
|
- // Hard-coded exception for compatibility with the bootloader shipped
|
|
|
- // with the Duemilanove and previous boards, and the firmware on the
|
|
|
- // 8U2 on the Uno and Mega 2560.
|
|
|
- if (baud == 57600) useU2X = false;
|
|
|
- #endif
|
|
|
-
|
|
|
- R_UCSRA = 0;
|
|
|
- if (useU2X) {
|
|
|
- B_U2X = 1;
|
|
|
- baud_setting = (F_CPU / 4 / baud - 1) / 2;
|
|
|
}
|
|
|
- else
|
|
|
- baud_setting = (F_CPU / 8 / baud - 1) / 2;
|
|
|
-
|
|
|
- // assign the baud_setting, a.k.a. ubbr (USART Baud Rate Register)
|
|
|
- R_UBRRH = baud_setting >> 8;
|
|
|
- R_UBRRL = baud_setting;
|
|
|
-
|
|
|
- B_RXEN = 1;
|
|
|
- B_TXEN = 1;
|
|
|
- B_RXCIE = 1;
|
|
|
- if (Cfg::TX_SIZE > 0) B_UDRIE = 0;
|
|
|
- _written = false;
|
|
|
}
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::end() {
|
|
|
- B_RXEN = 0;
|
|
|
- B_TXEN = 0;
|
|
|
- B_RXCIE = 0;
|
|
|
- B_UDRIE = 0;
|
|
|
- }
|
|
|
+ // Store the new head value - The main loop will retry until the value is stable
|
|
|
+ rx_buffer.head = h;
|
|
|
+}
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- int MarlinSerial<Cfg>::peek() {
|
|
|
- const ring_buffer_pos_t h = atomic_read_rx_head(), t = rx_buffer.tail;
|
|
|
- return h == t ? -1 : rx_buffer.buffer[t];
|
|
|
- }
|
|
|
+// (called with TX irqs disabled)
|
|
|
+template<typename Cfg>
|
|
|
+FORCE_INLINE void MarlinSerial<Cfg>::_tx_udr_empty_irq() {
|
|
|
+ if (Cfg::TX_SIZE > 0) {
|
|
|
+ // Read positions
|
|
|
+ uint8_t t = tx_buffer.tail;
|
|
|
+ const uint8_t h = tx_buffer.head;
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- int MarlinSerial<Cfg>::read() {
|
|
|
- const ring_buffer_pos_t h = atomic_read_rx_head();
|
|
|
+ if (Cfg::XONOFF) {
|
|
|
+ // If an XON char is pending to be sent, do it now
|
|
|
+ if (xon_xoff_state == XON_CHAR) {
|
|
|
|
|
|
- // Read the tail. Main thread owns it, so it is safe to directly read it
|
|
|
- ring_buffer_pos_t t = rx_buffer.tail;
|
|
|
+ // Send the character
|
|
|
+ R_UDR = XON_CHAR;
|
|
|
|
|
|
- // If nothing to read, return now
|
|
|
- if (h == t) return -1;
|
|
|
+ // clear the TXC bit -- "can be cleared by writing a one to its bit
|
|
|
+ // location". This makes sure flush() won't return until the bytes
|
|
|
+ // actually got written
|
|
|
+ B_TXC = 1;
|
|
|
|
|
|
- // Get the next char
|
|
|
- const int v = rx_buffer.buffer[t];
|
|
|
- t = (ring_buffer_pos_t)(t + 1) & (Cfg::RX_SIZE - 1);
|
|
|
+ // Remember we sent it.
|
|
|
+ xon_xoff_state = XON_CHAR | XON_XOFF_CHAR_SENT;
|
|
|
|
|
|
- // Advance tail - Making sure the RX ISR will always get an stable value, even
|
|
|
- // if it interrupts the writing of the value of that variable in the middle.
|
|
|
- atomic_set_rx_tail(t);
|
|
|
+ // If nothing else to transmit, just disable TX interrupts.
|
|
|
+ if (h == t) B_UDRIE = 0; // (Non-atomic, could be reenabled by the main program, but eventually this will succeed)
|
|
|
|
|
|
- if (Cfg::XONOFF) {
|
|
|
- // If the XOFF char was sent, or about to be sent...
|
|
|
- if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XOFF_CHAR) {
|
|
|
- // Get count of bytes in the RX buffer
|
|
|
- const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
|
|
|
- if (rx_count < (Cfg::RX_SIZE) / 10) {
|
|
|
- if (Cfg::TX_SIZE > 0) {
|
|
|
- // Signal we want an XON character to be sent.
|
|
|
- xon_xoff_state = XON_CHAR;
|
|
|
- // Enable TX ISR. Non atomic, but it will eventually enable them
|
|
|
- B_UDRIE = 1;
|
|
|
- }
|
|
|
- else {
|
|
|
- // If not using TX interrupts, we must send the XON char now
|
|
|
- xon_xoff_state = XON_CHAR | XON_XOFF_CHAR_SENT;
|
|
|
- while (!B_UDRE) sw_barrier();
|
|
|
- R_UDR = XON_CHAR;
|
|
|
- }
|
|
|
- }
|
|
|
+ return;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- return v;
|
|
|
- }
|
|
|
+ // If nothing to transmit, just disable TX interrupts. This could
|
|
|
+ // happen as the result of the non atomicity of the disabling of RX
|
|
|
+ // interrupts that could end reenabling TX interrupts as a side effect.
|
|
|
+ if (h == t) {
|
|
|
+ B_UDRIE = 0; // (Non-atomic, could be reenabled by the main program, but eventually this will succeed)
|
|
|
+ return;
|
|
|
+ }
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::available() {
|
|
|
- const ring_buffer_pos_t h = atomic_read_rx_head(), t = rx_buffer.tail;
|
|
|
- return (ring_buffer_pos_t)(Cfg::RX_SIZE + h - t) & (Cfg::RX_SIZE - 1);
|
|
|
+ // There is something to TX, Send the next byte
|
|
|
+ const uint8_t c = tx_buffer.buffer[t];
|
|
|
+ t = (t + 1) & (Cfg::TX_SIZE - 1);
|
|
|
+ R_UDR = c;
|
|
|
+ tx_buffer.tail = t;
|
|
|
+
|
|
|
+ // Clear the TXC bit (by writing a one to its bit location).
|
|
|
+ // Ensures flush() won't return until the bytes are actually written/
|
|
|
+ B_TXC = 1;
|
|
|
+
|
|
|
+ // Disable interrupts if there is nothing to transmit following this byte
|
|
|
+ if (h == t) B_UDRIE = 0; // (Non-atomic, could be reenabled by the main program, but eventually this will succeed)
|
|
|
}
|
|
|
+}
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::flush() {
|
|
|
+// Public Methods
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::begin(const long baud) {
|
|
|
+ uint16_t baud_setting;
|
|
|
+ bool useU2X = true;
|
|
|
|
|
|
- // Set the tail to the head:
|
|
|
- // - Read the RX head index in a safe way. (See atomic_read_rx_head.)
|
|
|
- // - Set the tail, making sure the RX ISR will always get a stable value, even
|
|
|
- // if it interrupts the writing of the value of that variable in the middle.
|
|
|
- atomic_set_rx_tail(atomic_read_rx_head());
|
|
|
+ #if F_CPU == 16000000UL && SERIAL_PORT == 0
|
|
|
+ // Hard-coded exception for compatibility with the bootloader shipped
|
|
|
+ // with the Duemilanove and previous boards, and the firmware on the
|
|
|
+ // 8U2 on the Uno and Mega 2560.
|
|
|
+ if (baud == 57600) useU2X = false;
|
|
|
+ #endif
|
|
|
|
|
|
- if (Cfg::XONOFF) {
|
|
|
- // If the XOFF char was sent, or about to be sent...
|
|
|
- if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XOFF_CHAR) {
|
|
|
+ R_UCSRA = 0;
|
|
|
+ if (useU2X) {
|
|
|
+ B_U2X = 1;
|
|
|
+ baud_setting = (F_CPU / 4 / baud - 1) / 2;
|
|
|
+ }
|
|
|
+ else
|
|
|
+ baud_setting = (F_CPU / 8 / baud - 1) / 2;
|
|
|
+
|
|
|
+ // assign the baud_setting, a.k.a. ubbr (USART Baud Rate Register)
|
|
|
+ R_UBRRH = baud_setting >> 8;
|
|
|
+ R_UBRRL = baud_setting;
|
|
|
+
|
|
|
+ B_RXEN = 1;
|
|
|
+ B_TXEN = 1;
|
|
|
+ B_RXCIE = 1;
|
|
|
+ if (Cfg::TX_SIZE > 0) B_UDRIE = 0;
|
|
|
+ _written = false;
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::end() {
|
|
|
+ B_RXEN = 0;
|
|
|
+ B_TXEN = 0;
|
|
|
+ B_RXCIE = 0;
|
|
|
+ B_UDRIE = 0;
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+int MarlinSerial<Cfg>::peek() {
|
|
|
+ const ring_buffer_pos_t h = atomic_read_rx_head(), t = rx_buffer.tail;
|
|
|
+ return h == t ? -1 : rx_buffer.buffer[t];
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+int MarlinSerial<Cfg>::read() {
|
|
|
+ const ring_buffer_pos_t h = atomic_read_rx_head();
|
|
|
+
|
|
|
+ // Read the tail. Main thread owns it, so it is safe to directly read it
|
|
|
+ ring_buffer_pos_t t = rx_buffer.tail;
|
|
|
+
|
|
|
+ // If nothing to read, return now
|
|
|
+ if (h == t) return -1;
|
|
|
+
|
|
|
+ // Get the next char
|
|
|
+ const int v = rx_buffer.buffer[t];
|
|
|
+ t = (ring_buffer_pos_t)(t + 1) & (Cfg::RX_SIZE - 1);
|
|
|
+
|
|
|
+ // Advance tail - Making sure the RX ISR will always get an stable value, even
|
|
|
+ // if it interrupts the writing of the value of that variable in the middle.
|
|
|
+ atomic_set_rx_tail(t);
|
|
|
+
|
|
|
+ if (Cfg::XONOFF) {
|
|
|
+ // If the XOFF char was sent, or about to be sent...
|
|
|
+ if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XOFF_CHAR) {
|
|
|
+ // Get count of bytes in the RX buffer
|
|
|
+ const ring_buffer_pos_t rx_count = (ring_buffer_pos_t)(h - t) & (ring_buffer_pos_t)(Cfg::RX_SIZE - 1);
|
|
|
+ if (rx_count < (Cfg::RX_SIZE) / 10) {
|
|
|
if (Cfg::TX_SIZE > 0) {
|
|
|
// Signal we want an XON character to be sent.
|
|
|
xon_xoff_state = XON_CHAR;
|
|
|
- // Enable TX ISR. Non atomic, but it will eventually enable it.
|
|
|
+ // Enable TX ISR. Non atomic, but it will eventually enable them
|
|
|
B_UDRIE = 1;
|
|
|
}
|
|
|
else {
|
|
|
@@ -453,363 +416,384 @@
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::write(const uint8_t c) {
|
|
|
- if (Cfg::TX_SIZE == 0) {
|
|
|
-
|
|
|
- _written = true;
|
|
|
- while (!B_UDRE) sw_barrier();
|
|
|
- R_UDR = c;
|
|
|
-
|
|
|
- }
|
|
|
- else {
|
|
|
-
|
|
|
- _written = true;
|
|
|
-
|
|
|
- // If the TX interrupts are disabled and the data register
|
|
|
- // is empty, just write the byte to the data register and
|
|
|
- // be done. This shortcut helps significantly improve the
|
|
|
- // effective datarate at high (>500kbit/s) bitrates, where
|
|
|
- // interrupt overhead becomes a slowdown.
|
|
|
- // Yes, there is a race condition between the sending of the
|
|
|
- // XOFF char at the RX ISR, but it is properly handled there
|
|
|
- if (!B_UDRIE && B_UDRE) {
|
|
|
- R_UDR = c;
|
|
|
-
|
|
|
- // clear the TXC bit -- "can be cleared by writing a one to its bit
|
|
|
- // location". This makes sure flush() won't return until the bytes
|
|
|
- // actually got written
|
|
|
- B_TXC = 1;
|
|
|
- return;
|
|
|
- }
|
|
|
-
|
|
|
- const uint8_t i = (tx_buffer.head + 1) & (Cfg::TX_SIZE - 1);
|
|
|
-
|
|
|
- // If global interrupts are disabled (as the result of being called from an ISR)...
|
|
|
- if (!ISRS_ENABLED()) {
|
|
|
-
|
|
|
- // Make room by polling if it is possible to transmit, and do so!
|
|
|
- while (i == tx_buffer.tail) {
|
|
|
-
|
|
|
- // If we can transmit another byte, do it.
|
|
|
- if (B_UDRE) _tx_udr_empty_irq();
|
|
|
-
|
|
|
- // Make sure compiler rereads tx_buffer.tail
|
|
|
- sw_barrier();
|
|
|
- }
|
|
|
+ return v;
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::available() {
|
|
|
+ const ring_buffer_pos_t h = atomic_read_rx_head(), t = rx_buffer.tail;
|
|
|
+ return (ring_buffer_pos_t)(Cfg::RX_SIZE + h - t) & (Cfg::RX_SIZE - 1);
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::flush() {
|
|
|
+
|
|
|
+ // Set the tail to the head:
|
|
|
+ // - Read the RX head index in a safe way. (See atomic_read_rx_head.)
|
|
|
+ // - Set the tail, making sure the RX ISR will always get a stable value, even
|
|
|
+ // if it interrupts the writing of the value of that variable in the middle.
|
|
|
+ atomic_set_rx_tail(atomic_read_rx_head());
|
|
|
+
|
|
|
+ if (Cfg::XONOFF) {
|
|
|
+ // If the XOFF char was sent, or about to be sent...
|
|
|
+ if ((xon_xoff_state & XON_XOFF_CHAR_MASK) == XOFF_CHAR) {
|
|
|
+ if (Cfg::TX_SIZE > 0) {
|
|
|
+ // Signal we want an XON character to be sent.
|
|
|
+ xon_xoff_state = XON_CHAR;
|
|
|
+ // Enable TX ISR. Non atomic, but it will eventually enable it.
|
|
|
+ B_UDRIE = 1;
|
|
|
}
|
|
|
else {
|
|
|
- // Interrupts are enabled, just wait until there is space
|
|
|
- while (i == tx_buffer.tail) sw_barrier();
|
|
|
+ // If not using TX interrupts, we must send the XON char now
|
|
|
+ xon_xoff_state = XON_CHAR | XON_XOFF_CHAR_SENT;
|
|
|
+ while (!B_UDRE) sw_barrier();
|
|
|
+ R_UDR = XON_CHAR;
|
|
|
}
|
|
|
-
|
|
|
- // Store new char. head is always safe to move
|
|
|
- tx_buffer.buffer[tx_buffer.head] = c;
|
|
|
- tx_buffer.head = i;
|
|
|
-
|
|
|
- // Enable TX ISR - Non atomic, but it will eventually enable TX ISR
|
|
|
- B_UDRIE = 1;
|
|
|
}
|
|
|
}
|
|
|
+}
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::flushTX() {
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::write(const uint8_t c) {
|
|
|
+ if (Cfg::TX_SIZE == 0) {
|
|
|
|
|
|
- if (Cfg::TX_SIZE == 0) {
|
|
|
- // No bytes written, no need to flush. This special case is needed since there's
|
|
|
- // no way to force the TXC (transmit complete) bit to 1 during initialization.
|
|
|
- if (!_written) return;
|
|
|
+ _written = true;
|
|
|
+ while (!B_UDRE) sw_barrier();
|
|
|
+ R_UDR = c;
|
|
|
|
|
|
- // Wait until everything was transmitted
|
|
|
- while (!B_TXC) sw_barrier();
|
|
|
+ }
|
|
|
+ else {
|
|
|
|
|
|
- // At this point nothing is queued anymore (DRIE is disabled) and
|
|
|
- // the hardware finished transmission (TXC is set).
|
|
|
+ _written = true;
|
|
|
|
|
|
- }
|
|
|
- else {
|
|
|
+ // If the TX interrupts are disabled and the data register
|
|
|
+ // is empty, just write the byte to the data register and
|
|
|
+ // be done. This shortcut helps significantly improve the
|
|
|
+ // effective datarate at high (>500kbit/s) bitrates, where
|
|
|
+ // interrupt overhead becomes a slowdown.
|
|
|
+ // Yes, there is a race condition between the sending of the
|
|
|
+ // XOFF char at the RX ISR, but it is properly handled there
|
|
|
+ if (!B_UDRIE && B_UDRE) {
|
|
|
+ R_UDR = c;
|
|
|
|
|
|
- // No bytes written, no need to flush. This special case is needed since there's
|
|
|
- // no way to force the TXC (transmit complete) bit to 1 during initialization.
|
|
|
- if (!_written) return;
|
|
|
+ // clear the TXC bit -- "can be cleared by writing a one to its bit
|
|
|
+ // location". This makes sure flush() won't return until the bytes
|
|
|
+ // actually got written
|
|
|
+ B_TXC = 1;
|
|
|
+ return;
|
|
|
+ }
|
|
|
|
|
|
- // If global interrupts are disabled (as the result of being called from an ISR)...
|
|
|
- if (!ISRS_ENABLED()) {
|
|
|
+ const uint8_t i = (tx_buffer.head + 1) & (Cfg::TX_SIZE - 1);
|
|
|
|
|
|
- // Wait until everything was transmitted - We must do polling, as interrupts are disabled
|
|
|
- while (tx_buffer.head != tx_buffer.tail || !B_TXC) {
|
|
|
+ // If global interrupts are disabled (as the result of being called from an ISR)...
|
|
|
+ if (!ISRS_ENABLED()) {
|
|
|
|
|
|
- // If there is more space, send an extra character
|
|
|
- if (B_UDRE) _tx_udr_empty_irq();
|
|
|
+ // Make room by polling if it is possible to transmit, and do so!
|
|
|
+ while (i == tx_buffer.tail) {
|
|
|
|
|
|
- sw_barrier();
|
|
|
- }
|
|
|
+ // If we can transmit another byte, do it.
|
|
|
+ if (B_UDRE) _tx_udr_empty_irq();
|
|
|
|
|
|
+ // Make sure compiler rereads tx_buffer.tail
|
|
|
+ sw_barrier();
|
|
|
}
|
|
|
- else {
|
|
|
- // Wait until everything was transmitted
|
|
|
- while (tx_buffer.head != tx_buffer.tail || !B_TXC) sw_barrier();
|
|
|
- }
|
|
|
-
|
|
|
- // At this point nothing is queued anymore (DRIE is disabled) and
|
|
|
- // the hardware finished transmission (TXC is set).
|
|
|
}
|
|
|
- }
|
|
|
-
|
|
|
- /**
|
|
|
- * Imports from print.h
|
|
|
- */
|
|
|
-
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::print(char c, int base) {
|
|
|
- print((long)c, base);
|
|
|
- }
|
|
|
-
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::print(unsigned char b, int base) {
|
|
|
- print((unsigned long)b, base);
|
|
|
- }
|
|
|
-
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::print(int n, int base) {
|
|
|
- print((long)n, base);
|
|
|
- }
|
|
|
-
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::print(unsigned int n, int base) {
|
|
|
- print((unsigned long)n, base);
|
|
|
- }
|
|
|
-
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::print(long n, int base) {
|
|
|
- if (base == 0) write(n);
|
|
|
- else if (base == 10) {
|
|
|
- if (n < 0) { print('-'); n = -n; }
|
|
|
- printNumber(n, 10);
|
|
|
+ else {
|
|
|
+ // Interrupts are enabled, just wait until there is space
|
|
|
+ while (i == tx_buffer.tail) sw_barrier();
|
|
|
}
|
|
|
- else
|
|
|
- printNumber(n, base);
|
|
|
- }
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::print(unsigned long n, int base) {
|
|
|
- if (base == 0) write(n);
|
|
|
- else printNumber(n, base);
|
|
|
- }
|
|
|
+ // Store new char. head is always safe to move
|
|
|
+ tx_buffer.buffer[tx_buffer.head] = c;
|
|
|
+ tx_buffer.head = i;
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::print(double n, int digits) {
|
|
|
- printFloat(n, digits);
|
|
|
+ // Enable TX ISR - Non atomic, but it will eventually enable TX ISR
|
|
|
+ B_UDRIE = 1;
|
|
|
}
|
|
|
+}
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::println() {
|
|
|
- print('\r');
|
|
|
- print('\n');
|
|
|
- }
|
|
|
-
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::println(const String& s) {
|
|
|
- print(s);
|
|
|
- println();
|
|
|
- }
|
|
|
-
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::println(const char c[]) {
|
|
|
- print(c);
|
|
|
- println();
|
|
|
- }
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::flushTX() {
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::println(char c, int base) {
|
|
|
- print(c, base);
|
|
|
- println();
|
|
|
- }
|
|
|
+ if (Cfg::TX_SIZE == 0) {
|
|
|
+ // No bytes written, no need to flush. This special case is needed since there's
|
|
|
+ // no way to force the TXC (transmit complete) bit to 1 during initialization.
|
|
|
+ if (!_written) return;
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::println(unsigned char b, int base) {
|
|
|
- print(b, base);
|
|
|
- println();
|
|
|
- }
|
|
|
+ // Wait until everything was transmitted
|
|
|
+ while (!B_TXC) sw_barrier();
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::println(int n, int base) {
|
|
|
- print(n, base);
|
|
|
- println();
|
|
|
- }
|
|
|
+ // At this point nothing is queued anymore (DRIE is disabled) and
|
|
|
+ // the hardware finished transmission (TXC is set).
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::println(unsigned int n, int base) {
|
|
|
- print(n, base);
|
|
|
- println();
|
|
|
}
|
|
|
+ else {
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::println(long n, int base) {
|
|
|
- print(n, base);
|
|
|
- println();
|
|
|
- }
|
|
|
+ // No bytes written, no need to flush. This special case is needed since there's
|
|
|
+ // no way to force the TXC (transmit complete) bit to 1 during initialization.
|
|
|
+ if (!_written) return;
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::println(unsigned long n, int base) {
|
|
|
- print(n, base);
|
|
|
- println();
|
|
|
- }
|
|
|
+ // If global interrupts are disabled (as the result of being called from an ISR)...
|
|
|
+ if (!ISRS_ENABLED()) {
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::println(double n, int digits) {
|
|
|
- print(n, digits);
|
|
|
- println();
|
|
|
- }
|
|
|
+ // Wait until everything was transmitted - We must do polling, as interrupts are disabled
|
|
|
+ while (tx_buffer.head != tx_buffer.tail || !B_TXC) {
|
|
|
|
|
|
- // Private Methods
|
|
|
+ // If there is more space, send an extra character
|
|
|
+ if (B_UDRE) _tx_udr_empty_irq();
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::printNumber(unsigned long n, uint8_t base) {
|
|
|
- if (n) {
|
|
|
- unsigned char buf[8 * sizeof(long)]; // Enough space for base 2
|
|
|
- int8_t i = 0;
|
|
|
- while (n) {
|
|
|
- buf[i++] = n % base;
|
|
|
- n /= base;
|
|
|
+ sw_barrier();
|
|
|
}
|
|
|
- while (i--)
|
|
|
- print((char)(buf[i] + (buf[i] < 10 ? '0' : 'A' - 10)));
|
|
|
- }
|
|
|
- else
|
|
|
- print('0');
|
|
|
- }
|
|
|
|
|
|
- template<typename Cfg>
|
|
|
- void MarlinSerial<Cfg>::printFloat(double number, uint8_t digits) {
|
|
|
- // Handle negative numbers
|
|
|
- if (number < 0.0) {
|
|
|
- print('-');
|
|
|
- number = -number;
|
|
|
}
|
|
|
-
|
|
|
- // Round correctly so that print(1.999, 2) prints as "2.00"
|
|
|
- double rounding = 0.5;
|
|
|
- LOOP_L_N(i, digits) rounding *= 0.1;
|
|
|
- number += rounding;
|
|
|
-
|
|
|
- // Extract the integer part of the number and print it
|
|
|
- unsigned long int_part = (unsigned long)number;
|
|
|
- double remainder = number - (double)int_part;
|
|
|
- print(int_part);
|
|
|
-
|
|
|
- // Print the decimal point, but only if there are digits beyond
|
|
|
- if (digits) {
|
|
|
- print('.');
|
|
|
- // Extract digits from the remainder one at a time
|
|
|
- while (digits--) {
|
|
|
- remainder *= 10.0;
|
|
|
- int toPrint = int(remainder);
|
|
|
- print(toPrint);
|
|
|
- remainder -= toPrint;
|
|
|
- }
|
|
|
+ else {
|
|
|
+ // Wait until everything was transmitted
|
|
|
+ while (tx_buffer.head != tx_buffer.tail || !B_TXC) sw_barrier();
|
|
|
}
|
|
|
- }
|
|
|
|
|
|
- // Hookup ISR handlers
|
|
|
- ISR(SERIAL_REGNAME(USART,SERIAL_PORT,_RX_vect)) {
|
|
|
- MarlinSerial<MarlinSerialCfg<SERIAL_PORT>>::store_rxd_char();
|
|
|
+ // At this point nothing is queued anymore (DRIE is disabled) and
|
|
|
+ // the hardware finished transmission (TXC is set).
|
|
|
}
|
|
|
+}
|
|
|
|
|
|
- ISR(SERIAL_REGNAME(USART,SERIAL_PORT,_UDRE_vect)) {
|
|
|
- MarlinSerial<MarlinSerialCfg<SERIAL_PORT>>::_tx_udr_empty_irq();
|
|
|
- }
|
|
|
-
|
|
|
- // Preinstantiate
|
|
|
- template class MarlinSerial<MarlinSerialCfg<SERIAL_PORT>>;
|
|
|
-
|
|
|
- // Instantiate
|
|
|
- MarlinSerial<MarlinSerialCfg<SERIAL_PORT>> customizedSerial1;
|
|
|
-
|
|
|
- #ifdef SERIAL_PORT_2
|
|
|
+/**
|
|
|
+ * Imports from print.h
|
|
|
+ */
|
|
|
|
|
|
- // Hookup ISR handlers
|
|
|
- ISR(SERIAL_REGNAME(USART,SERIAL_PORT_2,_RX_vect)) {
|
|
|
- MarlinSerial<MarlinSerialCfg<SERIAL_PORT_2>>::store_rxd_char();
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::print(char c, int base) {
|
|
|
+ print((long)c, base);
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::print(unsigned char b, int base) {
|
|
|
+ print((unsigned long)b, base);
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::print(int n, int base) {
|
|
|
+ print((long)n, base);
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::print(unsigned int n, int base) {
|
|
|
+ print((unsigned long)n, base);
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::print(long n, int base) {
|
|
|
+ if (base == 0) write(n);
|
|
|
+ else if (base == 10) {
|
|
|
+ if (n < 0) { print('-'); n = -n; }
|
|
|
+ printNumber(n, 10);
|
|
|
+ }
|
|
|
+ else
|
|
|
+ printNumber(n, base);
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::print(unsigned long n, int base) {
|
|
|
+ if (base == 0) write(n);
|
|
|
+ else printNumber(n, base);
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::print(double n, int digits) {
|
|
|
+ printFloat(n, digits);
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::println() {
|
|
|
+ print('\r');
|
|
|
+ print('\n');
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::println(const String& s) {
|
|
|
+ print(s);
|
|
|
+ println();
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::println(const char c[]) {
|
|
|
+ print(c);
|
|
|
+ println();
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::println(char c, int base) {
|
|
|
+ print(c, base);
|
|
|
+ println();
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::println(unsigned char b, int base) {
|
|
|
+ print(b, base);
|
|
|
+ println();
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::println(int n, int base) {
|
|
|
+ print(n, base);
|
|
|
+ println();
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::println(unsigned int n, int base) {
|
|
|
+ print(n, base);
|
|
|
+ println();
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::println(long n, int base) {
|
|
|
+ print(n, base);
|
|
|
+ println();
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::println(unsigned long n, int base) {
|
|
|
+ print(n, base);
|
|
|
+ println();
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::println(double n, int digits) {
|
|
|
+ print(n, digits);
|
|
|
+ println();
|
|
|
+}
|
|
|
+
|
|
|
+// Private Methods
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::printNumber(unsigned long n, uint8_t base) {
|
|
|
+ if (n) {
|
|
|
+ unsigned char buf[8 * sizeof(long)]; // Enough space for base 2
|
|
|
+ int8_t i = 0;
|
|
|
+ while (n) {
|
|
|
+ buf[i++] = n % base;
|
|
|
+ n /= base;
|
|
|
}
|
|
|
-
|
|
|
- ISR(SERIAL_REGNAME(USART,SERIAL_PORT_2,_UDRE_vect)) {
|
|
|
- MarlinSerial<MarlinSerialCfg<SERIAL_PORT_2>>::_tx_udr_empty_irq();
|
|
|
+ while (i--)
|
|
|
+ print((char)(buf[i] + (buf[i] < 10 ? '0' : 'A' - 10)));
|
|
|
+ }
|
|
|
+ else
|
|
|
+ print('0');
|
|
|
+}
|
|
|
+
|
|
|
+template<typename Cfg>
|
|
|
+void MarlinSerial<Cfg>::printFloat(double number, uint8_t digits) {
|
|
|
+ // Handle negative numbers
|
|
|
+ if (number < 0.0) {
|
|
|
+ print('-');
|
|
|
+ number = -number;
|
|
|
+ }
|
|
|
+
|
|
|
+ // Round correctly so that print(1.999, 2) prints as "2.00"
|
|
|
+ double rounding = 0.5;
|
|
|
+ LOOP_L_N(i, digits) rounding *= 0.1;
|
|
|
+ number += rounding;
|
|
|
+
|
|
|
+ // Extract the integer part of the number and print it
|
|
|
+ unsigned long int_part = (unsigned long)number;
|
|
|
+ double remainder = number - (double)int_part;
|
|
|
+ print(int_part);
|
|
|
+
|
|
|
+ // Print the decimal point, but only if there are digits beyond
|
|
|
+ if (digits) {
|
|
|
+ print('.');
|
|
|
+ // Extract digits from the remainder one at a time
|
|
|
+ while (digits--) {
|
|
|
+ remainder *= 10.0;
|
|
|
+ int toPrint = int(remainder);
|
|
|
+ print(toPrint);
|
|
|
+ remainder -= toPrint;
|
|
|
}
|
|
|
+ }
|
|
|
+}
|
|
|
|
|
|
- // Preinstantiate
|
|
|
- template class MarlinSerial<MarlinSerialCfg<SERIAL_PORT_2>>;
|
|
|
+// Hookup ISR handlers
|
|
|
+ISR(SERIAL_REGNAME(USART, SERIAL_PORT, _RX_vect)) {
|
|
|
+ MarlinSerial<MarlinSerialCfg<SERIAL_PORT>>::store_rxd_char();
|
|
|
+}
|
|
|
|
|
|
- // Instantiate
|
|
|
- MarlinSerial<MarlinSerialCfg<SERIAL_PORT_2>> customizedSerial2;
|
|
|
+ISR(SERIAL_REGNAME(USART, SERIAL_PORT, _UDRE_vect)) {
|
|
|
+ MarlinSerial<MarlinSerialCfg<SERIAL_PORT>>::_tx_udr_empty_irq();
|
|
|
+}
|
|
|
|
|
|
- #endif
|
|
|
+// Preinstantiate
|
|
|
+template class MarlinSerial<MarlinSerialCfg<SERIAL_PORT>>;
|
|
|
|
|
|
-#endif // !USBCON && (UBRRH || UBRR0H || UBRR1H || UBRR2H || UBRR3H)
|
|
|
+// Instantiate
|
|
|
+MarlinSerial<MarlinSerialCfg<SERIAL_PORT>> customizedSerial1;
|
|
|
|
|
|
-#ifdef INTERNAL_SERIAL_PORT
|
|
|
+#ifdef SERIAL_PORT_2
|
|
|
|
|
|
- ISR(SERIAL_REGNAME(USART,INTERNAL_SERIAL_PORT,_RX_vect)) {
|
|
|
- MarlinSerial<MarlinInternalSerialCfg<INTERNAL_SERIAL_PORT>>::store_rxd_char();
|
|
|
+ // Hookup ISR handlers
|
|
|
+ ISR(SERIAL_REGNAME(USART, SERIAL_PORT_2, _RX_vect)) {
|
|
|
+ MarlinSerial<MarlinSerialCfg<SERIAL_PORT_2>>::store_rxd_char();
|
|
|
}
|
|
|
|
|
|
- ISR(SERIAL_REGNAME(USART,INTERNAL_SERIAL_PORT,_UDRE_vect)) {
|
|
|
- MarlinSerial<MarlinInternalSerialCfg<INTERNAL_SERIAL_PORT>>::_tx_udr_empty_irq();
|
|
|
+ ISR(SERIAL_REGNAME(USART, SERIAL_PORT_2, _UDRE_vect)) {
|
|
|
+ MarlinSerial<MarlinSerialCfg<SERIAL_PORT_2>>::_tx_udr_empty_irq();
|
|
|
}
|
|
|
|
|
|
// Preinstantiate
|
|
|
- template class MarlinSerial<MarlinInternalSerialCfg<INTERNAL_SERIAL_PORT>>;
|
|
|
+ template class MarlinSerial<MarlinSerialCfg<SERIAL_PORT_2>>;
|
|
|
|
|
|
// Instantiate
|
|
|
- MarlinSerial<MarlinInternalSerialCfg<INTERNAL_SERIAL_PORT>> internalSerial;
|
|
|
+ MarlinSerial<MarlinSerialCfg<SERIAL_PORT_2>> customizedSerial2;
|
|
|
|
|
|
#endif
|
|
|
|
|
|
-#ifdef DGUS_SERIAL_PORT
|
|
|
-
|
|
|
- template<typename Cfg>
|
|
|
- typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::get_tx_buffer_free() {
|
|
|
- const ring_buffer_pos_t t = tx_buffer.tail, // next byte to send.
|
|
|
- h = tx_buffer.head; // next pos for queue.
|
|
|
- int ret = t - h - 1;
|
|
|
- if (ret < 0) ret += Cfg::TX_SIZE + 1;
|
|
|
- return ret;
|
|
|
- }
|
|
|
+#ifdef MMU2_SERIAL_PORT
|
|
|
|
|
|
- ISR(SERIAL_REGNAME(USART,DGUS_SERIAL_PORT,_RX_vect)) {
|
|
|
- MarlinSerial<MarlinInternalSerialCfg<DGUS_SERIAL_PORT>>::store_rxd_char();
|
|
|
+ ISR(SERIAL_REGNAME(USART, MMU2_SERIAL_PORT, _RX_vect)) {
|
|
|
+ MarlinSerial<MMU2SerialCfg<MMU2_SERIAL_PORT>>::store_rxd_char();
|
|
|
}
|
|
|
|
|
|
- ISR(SERIAL_REGNAME(USART,DGUS_SERIAL_PORT,_UDRE_vect)) {
|
|
|
- MarlinSerial<MarlinInternalSerialCfg<DGUS_SERIAL_PORT>>::_tx_udr_empty_irq();
|
|
|
+ ISR(SERIAL_REGNAME(USART, MMU2_SERIAL_PORT, _UDRE_vect)) {
|
|
|
+ MarlinSerial<MMU2SerialCfg<MMU2_SERIAL_PORT>>::_tx_udr_empty_irq();
|
|
|
}
|
|
|
|
|
|
// Preinstantiate
|
|
|
- template class MarlinSerial<MarlinInternalSerialCfg<DGUS_SERIAL_PORT>>;
|
|
|
+ template class MarlinSerial<MMU2SerialCfg<MMU2_SERIAL_PORT>>;
|
|
|
|
|
|
// Instantiate
|
|
|
- MarlinSerial<MarlinInternalSerialCfg<DGUS_SERIAL_PORT>> internalDgusSerial;
|
|
|
+ MarlinSerial<MMU2SerialCfg<MMU2_SERIAL_PORT>> mmuSerial;
|
|
|
|
|
|
#endif
|
|
|
|
|
|
-#ifdef ANYCUBIC_LCD_SERIAL_PORT
|
|
|
+#ifdef LCD_SERIAL_PORT
|
|
|
|
|
|
- ISR(SERIAL_REGNAME(USART,ANYCUBIC_LCD_SERIAL_PORT,_RX_vect)) {
|
|
|
- MarlinSerial<AnycubicLcdSerialCfg<ANYCUBIC_LCD_SERIAL_PORT>>::store_rxd_char();
|
|
|
+ ISR(SERIAL_REGNAME(USART, LCD_SERIAL_PORT, _RX_vect)) {
|
|
|
+ MarlinSerial<LCDSerialCfg<LCD_SERIAL_PORT>>::store_rxd_char();
|
|
|
}
|
|
|
|
|
|
- ISR(SERIAL_REGNAME(USART,ANYCUBIC_LCD_SERIAL_PORT,_UDRE_vect)) {
|
|
|
- MarlinSerial<AnycubicLcdSerialCfg<ANYCUBIC_LCD_SERIAL_PORT>>::_tx_udr_empty_irq();
|
|
|
+ ISR(SERIAL_REGNAME(USART, LCD_SERIAL_PORT, _UDRE_vect)) {
|
|
|
+ MarlinSerial<LCDSerialCfg<LCD_SERIAL_PORT>>::_tx_udr_empty_irq();
|
|
|
}
|
|
|
|
|
|
// Preinstantiate
|
|
|
- template class MarlinSerial<AnycubicLcdSerialCfg<ANYCUBIC_LCD_SERIAL_PORT>>;
|
|
|
+ template class MarlinSerial<LCDSerialCfg<LCD_SERIAL_PORT>>;
|
|
|
|
|
|
// Instantiate
|
|
|
- MarlinSerial<AnycubicLcdSerialCfg<ANYCUBIC_LCD_SERIAL_PORT>> anycubicLcdSerial;
|
|
|
+ MarlinSerial<LCDSerialCfg<LCD_SERIAL_PORT>> lcdSerial;
|
|
|
+
|
|
|
+ #if HAS_DGUS_LCD
|
|
|
+ template<typename Cfg>
|
|
|
+ typename MarlinSerial<Cfg>::ring_buffer_pos_t MarlinSerial<Cfg>::get_tx_buffer_free() {
|
|
|
+ const ring_buffer_pos_t t = tx_buffer.tail, // next byte to send.
|
|
|
+ h = tx_buffer.head; // next pos for queue.
|
|
|
+ int ret = t - h - 1;
|
|
|
+ if (ret < 0) ret += Cfg::TX_SIZE + 1;
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+ #endif
|
|
|
|
|
|
#endif
|
|
|
|
|
|
+#endif // !USBCON && (UBRRH || UBRR0H || UBRR1H || UBRR2H || UBRR3H)
|
|
|
+
|
|
|
// For AT90USB targets use the UART for BT interfacing
|
|
|
#if defined(USBCON) && ENABLED(BLUETOOTH)
|
|
|
HardwareSerial bluetoothSerial;
|
Scott Lahteine