cpu.c 3.9 KB

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  1. /*
  2. * CPU detection code, extracted from mmx.h
  3. * (c)1997-99 by H. Dietz and R. Fisher
  4. * Converted to C and improved by Fabrice Bellard.
  5. *
  6. * This file is part of FFmpeg.
  7. *
  8. * FFmpeg is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU Lesser General Public
  10. * License as published by the Free Software Foundation; either
  11. * version 2.1 of the License, or (at your option) any later version.
  12. *
  13. * FFmpeg is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * Lesser General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU Lesser General Public
  19. * License along with FFmpeg; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  21. */
  22. #include <stdlib.h>
  23. #include <string.h>
  24. #include "libavutil/x86_cpu.h"
  25. #include "libavutil/cpu.h"
  26. /* ebx saving is necessary for PIC. gcc seems unable to see it alone */
  27. #define cpuid(index,eax,ebx,ecx,edx)\
  28. __asm__ volatile\
  29. ("mov %%"REG_b", %%"REG_S"\n\t"\
  30. "cpuid\n\t"\
  31. "xchg %%"REG_b", %%"REG_S\
  32. : "=a" (eax), "=S" (ebx),\
  33. "=c" (ecx), "=d" (edx)\
  34. : "0" (index));
  35. /* Function to test if multimedia instructions are supported... */
  36. int ff_get_cpu_flags_x86(void)
  37. {
  38. int rval = 0;
  39. int eax, ebx, ecx, edx;
  40. int max_std_level, max_ext_level, std_caps=0, ext_caps=0;
  41. int family=0, model=0;
  42. union { int i[3]; char c[12]; } vendor;
  43. #if ARCH_X86_32
  44. x86_reg a, c;
  45. __asm__ volatile (
  46. /* See if CPUID instruction is supported ... */
  47. /* ... Get copies of EFLAGS into eax and ecx */
  48. "pushfl\n\t"
  49. "pop %0\n\t"
  50. "mov %0, %1\n\t"
  51. /* ... Toggle the ID bit in one copy and store */
  52. /* to the EFLAGS reg */
  53. "xor $0x200000, %0\n\t"
  54. "push %0\n\t"
  55. "popfl\n\t"
  56. /* ... Get the (hopefully modified) EFLAGS */
  57. "pushfl\n\t"
  58. "pop %0\n\t"
  59. : "=a" (a), "=c" (c)
  60. :
  61. : "cc"
  62. );
  63. if (a == c)
  64. return 0; /* CPUID not supported */
  65. #endif
  66. cpuid(0, max_std_level, vendor.i[0], vendor.i[2], vendor.i[1]);
  67. if(max_std_level >= 1){
  68. cpuid(1, eax, ebx, ecx, std_caps);
  69. family = ((eax>>8)&0xf) + ((eax>>20)&0xff);
  70. model = ((eax>>4)&0xf) + ((eax>>12)&0xf0);
  71. if (std_caps & (1<<23))
  72. rval |= AV_CPU_FLAG_MMX;
  73. if (std_caps & (1<<25))
  74. rval |= AV_CPU_FLAG_MMX2
  75. #if HAVE_SSE
  76. | AV_CPU_FLAG_SSE;
  77. if (std_caps & (1<<26))
  78. rval |= AV_CPU_FLAG_SSE2;
  79. if (ecx & 1)
  80. rval |= AV_CPU_FLAG_SSE3;
  81. if (ecx & 0x00000200 )
  82. rval |= AV_CPU_FLAG_SSSE3;
  83. if (ecx & 0x00080000 )
  84. rval |= AV_CPU_FLAG_SSE4;
  85. if (ecx & 0x00100000 )
  86. rval |= AV_CPU_FLAG_SSE42;
  87. #endif
  88. ;
  89. }
  90. cpuid(0x80000000, max_ext_level, ebx, ecx, edx);
  91. if(max_ext_level >= 0x80000001){
  92. cpuid(0x80000001, eax, ebx, ecx, ext_caps);
  93. if (ext_caps & (1<<31))
  94. rval |= AV_CPU_FLAG_3DNOW;
  95. if (ext_caps & (1<<30))
  96. rval |= AV_CPU_FLAG_3DNOWEXT;
  97. if (ext_caps & (1<<23))
  98. rval |= AV_CPU_FLAG_MMX;
  99. if (ext_caps & (1<<22))
  100. rval |= AV_CPU_FLAG_MMX2;
  101. }
  102. if (!strncmp(vendor.c, "GenuineIntel", 12) &&
  103. family == 6 && (model == 9 || model == 13 || model == 14)) {
  104. /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah")
  105. * theoretically support sse2, but it's usually slower than mmx,
  106. * so let's just pretend they don't. */
  107. if (rval & AV_CPU_FLAG_SSE2) rval ^= AV_CPU_FLAG_SSE2SLOW|AV_CPU_FLAG_SSE2;
  108. if (rval & AV_CPU_FLAG_SSE3) rval ^= AV_CPU_FLAG_SSE3SLOW|AV_CPU_FLAG_SSE3;
  109. }
  110. return rval;
  111. }